Changes between Version 3 and Version 4 of TBR/BSP/H8sim


Ignore:
Timestamp:
Nov 7, 2018, 5:50:32 AM (6 months ago)
Author:
Mehr Mohammad Sachal
Comment:

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  • TBR/BSP/H8sim

    v3 v4  
    22
    33
    4 {{Infobox BSP
    5 |BSP_name     = h8sim
    6 |Manufacturer = FSF GNU Debugger
    7 |image        =
    8 |caption      =
    9 |Board_URL    = http://www.gnu.org/s/gdb/
    10 |Architecture = H8/300
    11 |CPU_model    = varies
    12 |Monitor      = NA
    13 |Simulator    = Only
    14 |Aliases      = Any RTEMS BSP Aliases?
    15 |RAM          = configurable
    16 |NVMEM        = NA
    17 |Serial       = one synthetic UART
    18 |NICs         = NA
    19 |Other        = NA
    20 }}
     4= BSP Infobox =
     5||'''BSP_name'''||h8sim||
     6||'''Manufacturer'''||FSF GNU Debugger||
     7||'''image'''||-||
     8||'''caption'''||-||
     9||'''Board_URL'''||http://www.gnu.org/s/gdb/||
     10||'''Architecture'''||H8/300||
     11||'''CPU_model'''||varies||
     12||'''Monitor'''||NA||
     13||'''Simulator'''||Only||
     14||'''Aliases'''||Any RTEMS BSP Aliases?||
     15||'''RAM'''||configurable||
     16||'''NVMEM'''||NA||
     17||'''Serial'''||one synthetic UART||
     18||'''NICs'''||NA||
     19||'''Other'''||NA||
     20
    2121
    2222This BSP uses the simulator built into gdb.  That simulator does not support a clock interrupt source so is capable of running only limited tests.