Changes between Version 12 and Version 13 of TBR/BSP/Gen5200

Timestamp:

11/10/18 19:01:11 (6 years ago)

Author:

Kathryn

Comment:

--

TBR/BSP/Gen5200

@@ -2 +2 @@
 
 
-{{Infobox BSP
-|image        = TSP3289_IMG_LITE5200.jpg
-|BSP_name     = gen5200
-|Manufacturer = Multiple
-|Board_URL       = http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=Lite5200B
-|Architecture = PowerPC
-|CPU_model    = Freescale MPC5200
-|RAM     = 128 MB DDR SDRAM, 32 MB Flash
-|Serial = 2 serial ports
-|Aliases      = icecube, pm520_cr285, pm520_ze30, brs51
-}}
+= Infobox BSP =
+||'''image'''        ||TSP3289_IMG_LITE5200.jpg
+||'''BSP_name'''     ||gen5200
+||'''Manufacturer''' ||Multiple
+||'''Board_URL'''    ||http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=Lite5200B
+||'''Architecture''' ||PowerPC
+||'''CPU_model'''    ||Freescale MPC5200
+||'''RAM'''          ||128 MB DDR SDRAM, 32 MB Flash
+||'''Serial'''       ||2 serial ports
+||'''Aliases'''      ||icecube, pm520_cr285, pm520_ze30, brs51
+
 
 This BSP supports boards based on the Freescale MPC5200 microcontroller. The following boards are known to work with this BSP:
@@ -106 +106 @@
 
 
-{{Test Report
-|Version = CVS head
-|Date    = 25 March 2011
-|User    = [wiki:User:Richard_Campbell User:Richard Campbell]
-|Report  = Successfully ran ticker and File I/O test on the Lite5200B in the RTEMS Lab. 
-}}
+Test Report
+||'''Version''' ||CVS head||
+||'''Date'''    ||25 March 2011||
+||'''User'''    ||[wiki:User:Richard_Campbell User:Richard Campbell]||
+||'''Report'''  ||Successfully ran ticker and File I/O test on the Lite5200B in the RTEMS Lab. ||
+
 
 CVS Head 2007-06-20: [wiki:TBR/User/JoelSherrill JoelSherrill] reports that he has run most tests successfully on an EP5200C.  Some tmtests exit with an Exception 3 but still report reasonable times.