{{Infobox BSP |BSP_name = DY-4 DMV177 |Manufacturer = Dy 4 Systems |image = pic2.jpg |caption = DMV177 |Board_URL = |Architecture = PowerPC |CPU_model = PowerPC 603e RISC CPU at 100MHz* |Monitor = DyBug? |Simulator = N/A |Aliases = none |RAM = DMV-177 SBC DRAM 8, 16, 32 or 64 Mbytes. |NVMEM = 2Mbytes low cost boot Flash™ EPROM, 256kbyte EEPROM, 512 byte serial EEPROM |Serial = four serial ports included on-board |Video = non

}}= Overview =


  • PowerPC 603e RISC CPU at 100MHz*
  • Up to 64M bytes DRAM with EDAC
  • 8Mbytes 64-bit Flash™ EPROM
  • 2Mbytes low cost boot Flash™ EPROM
  • 256kbyte EEPROM
  • 512 byte serial EEPROM
  • Support for one MAXPack module,

providing flexible I/O expansion

  • On-board Ethernet with AUI interface
  • On-board SCSI-2 interface
  • Four 16-bit counter/timers
  • Two EIA-422 and two EIA-423 serial


  • Real-Time Clock (RTC)
  • Tick and watchdog timers
  • Advanced VME Interface Chip (SCV64)
  • A32:D32 VMEbus interface with

A64:D64 MBLT support per ANSI/VITA 1-1994, VME64

  • Location monitor with FIFO buffer
  • Bus Isolation mode (BI-mode®)
  • Auto-ID and Auto-SYSCON
  • System controller functions
  • Built-In-Test (BIT)
  • 95% fault coverage
  • Front-panel JTAG/COP™ Interface
  • Foundation firmware including:
  • Debug monitor
  • Diagnostics
  • Card Support Services
  • Execution Sequencer
  • Non Volatile Memory Programmer
  • Conduction cooled per IEEE 1101.2 (0.80-

inch pitch) for MIL-E-5400/4158, and MIL-STD-2036 applications

  • Optional levels of ruggedization
  • Contact DY 4 for latest CPU speed availability

Board Setup

<h4>DMV-177</h4> DY 4 Systems Inc. MS00252 Revision C March 1997 The DMV-177 provides a highly integrated approach in a single-slot solution with raw processing performance, industry standard I/O, and User-specific I/O which traditionally required multiple boards. Figure 1 shows a block diagram of the DMV- 177 SBC. The DMV-177’s design features address mission-critical demands of military and aerospace systems integrators with increased computing performance, selftest coverage and functional density. The card supports DY 4 Systems' common features including an VME64 VMEbus interface, Built-In-Test (BIT), BI-mode, location monitor, and Auto ID. These features bring benefits in performance, logistics and maintenance. DY 4's industry-standard SCV64 chip implements all VMEbus interface functions with software-programmable features. It combines low-latency access to the VMEbus with high sustained throughputs. Built-In-Test (BIT) hardware features verify all operational circuits on the module. Bus Isolation mode (BI-mode®) increases ease of testing and system fault location. The location monitor supports efficient interprocessor messaging, to minimize overhead in real-time software. Auto-ID allows boards to be self-configuring, based on slotlocation. These features allow users to: · build high-performance multi-processor systems · detect and isolate faults during operation · minimize field maintenance and sparing logistics. All versions of the DMV-177 are functionally identical with the exception that Ethernet is omitted on level 200/300 product and not all memory configurations are available. DMV air-cooled versions are available in DY 4 ruggedization levels 000, 100 and 200. The conduction-cooled DMV version is designed for airborne, land-mobile, and naval military applications where circuit cards could be sealed in a chassis to prevent moisture, salt-fog, sand, and dust contamination. DY 4 Systems' conduction-cooled products are designed for severe environmental conditions defined by MIL-E-4158, MIL-E-5400, and MILSTD-

  1. A Copper Core Cooled PWB

conducts heat away from the electronics. An additional stiffening frame improves heat dissipation and vibration resistance. Standard wedgelock fasteners give a reliable thermal connection to the chassis. DMV conductioncooled versions are available in DY 4 ruggedization levels 100 and 200.



The PowerPC 603e CPU is a highperformance, low-power 64-bit RISC microprocessor developed by Apple, IBM, and Motorola for the growing commercial desktop industry. The PowerPC 603e on the DMV-177 runs at 100 MHz on-chip and offers estimated benchmarks 120 SPECint92 and 105 SPECfp92 (with internal cache on). Containing separate instruction and data caches, 64-bit data paths, and software programmable power-saving modes, the PowerPC 603e CPU integrates the following: · Superscalar multiple instruction-per-cycle architecture · 32- and 64-bit Floating Point Processor (FPP) · 5 separate parallel instruction units · 16K byte instruction cache · 16K byte data cache · 32- or 64-bit data bus · 3.3V design with 4 power-down modes <h4>Memory</h4> DMV-177 SBC DRAM is located on a memory mezzanine module. Memory consists of high performance DRAM which can be factory configured as either 8, 16, 32 or 64 Mbytes. The memory is accessible from the on-board CPU, the VMEbus, the SCSI and Ethernet chips, and the MAXPack interface. The memory interface design supports PowerPC 603e burst mode accesses, providing burst performance with EDAC turned off ( with EDAC on). The DMV-177 supports of a mix of Flash EPROM and EEPROM devices for over 10M bytes of on-board non-volatile memory storage. On-board non-volatile memory consists of: · 64-bit wide Application Flash · 16-bit wide low-cost boot Flash · 16-bit wide Application EEPROM Application Flash provides the capability of high performance program execution directly from EPROM. A low-cost 2M bytes Flash memory boot site and 256K bytes of EEPROM are also available. Non-volatile memory is not VME-visible and is re-programmable in-circuit via DY 4's integrated Non-Volatile Memory Programmer (NVMP) or FlashProg? utility over the VMEbus, the serial port, or the Ethernet port. The DMV-177 SBC has a 512 byte serial EEPROM for storing configuration data.= Downloading and Executing =

Describe the download procedure.


It has a Debug monitor

Test Reports

{{Test Report |Version = CVS head |Date = DATE |User = User:WhoTestedThis? |Report = reports that something happened. }}


  • TBD

The DY-4 DMV177 is a very basic and old PPC603e based VMEBus board with basic capabilities including 10BaseT networking using a SONIC NIC. It had a proprietary mezzanine and was rapidly obsoleted when the PMC standard was approved.


Last modified on Jan 10, 2013 at 1:34:45 AM Last modified on Jan 10, 2013, 1:34:45 AM