Version 34 (modified by Stormlann, on Nov 28, 2010 at 9:26:01 PM) (diff)


{{Infobox BSP |BSP_name = GDB ARM Simulator |Manufacturer = ARM Holdings |Architecture = ARM |image = Armulator.jpg |Board_URL = |CPU_model = ARM11 |Simulator = GDB ARM Simulator |NVMEM = 32 MB Flash, 16 KB EEPROM |Video = }} ARM Instruction Set Simulator, ARMulator, is one of the software development tools provided by the development systems business unit of ARM Limited to all users of ARM-based chips. It owes its heritage to the early development of the instruction set by Sophie Wilson. Part of this heritage is still visible in the provision of a Tube BBC Micro model in ARMulator.

ARMulator is written in C, and provides more than just an instruction set simulator, it provides a virtual platform for system emulation. It comes ready to emulate an ARM processor and certain ARM Coprocessors. If the processor is part of an embedded system, then licensees may extend ARMulator to add their own implementations of the additional hardware to the ARMulator model. ARMulator provides a number of services to help with the time-based behaviour and event scheduling. ARMulator ships with examples of memory mapped and co-processor expansions. This way, they can use ARMulator to emulate their entire embedded system. A key limitation for ARMulator is that it can only simulate a single ARM CPU at one time, although almost all ARM cores up to ARM11 are available.= ARM architecture =

The ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by ARM Holdings. It was known as the Advanced RISC Machine, and before that as the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in terms of numbers produced.They were originally conceived as a processor for desktop personal computers by Acorn Computers, a market now dominated by the x86 family used by IBM PC compatible and Apple Macintosh computers. The relative simplicity of ARM processors made them suitable for low power applications. This has made them dominant in the mobile and embedded electronics market as relatively low cost and small microprocessors and microcontrollers.


Performance of ARMulator is good for the technology employed, it's about 1000 host (PC) instructions per ARM instruction. This means that emulated speeds of 1MHz were normal for PCs of the mid to late 90s. Accuracy is good too, although it is classed as cycle count accurate rather than cycle accurate, this is because the ARM pipeline isn't fully modeled (although register interlocks are). Resolution is to an instruction, as a consequence when single stepping the register interlocks are ignored and different cycle counts are returned than if the program had simply run, this was unavoidable.= ARMulator II =

ARMulator II formed the basis for the high accuracy, cycle callable co-verification models of ARM processors, these CoVs? models (see Cycle Accurate Simulator were the basis of many CoVerification? systems for ARM processors. Mentor Graphic's Seamless have the market leading CoVs? system that supports many ARM cores, and many other CPUs. ARMulator II shipped in early ARM toolkits as well as the later SDT 2.5, SDT 2.5.1, ADS 1.0, ADS 1.1, ADS 1.2, RCVT 1.0 and also separately as RVISS.

Key contributors to ARMulator II were Mike Williams, Louise Jameson, Charles Lavender, Donald Sinclair, Chris Lamb and Rebecca Bryan (who worked on ARMulator as both an engineer and later as product manager). Significant input was also made by Allan Skillman, who was working on ARM CoVerification? models at the time. Special models were produced during the development of CPUs, notably the ARM9E, ARM10 and ARM11, these models helped with architectural decisions such as Thumb-2 and TrustZone?.

ARMulator has been gradually phased out and has been replaced by Just-in-time compilation-based high performance CPU and system models.


ARMulator allows runtime debugging using either armsd (ARM Symbolic Debugger), or either of the graphical debuggers that were shipped in SDT and the later ADS products. ARMulator suffered from being an invisible tool with a text file configuration (armul.conf) that many found complex to configure.The GNU ARMulator is available as part of the GDB debugger in the ARM GNU Tools.

Test Reports

Testing ARMulator was always a time consuming challenge, the full ARM architecture validation suites being employed. At over 1 million lines of C code it was a fairly hefty product.

ARMulator was available on a very broad range of platforms through its life, including Mac, Risc OS platforms, DEC Alpha, HP-UX, Solaris, SunOS, Windows, Linux. In the mid-90s there was reluctance to support Windows platforms, pre-Windows 95 it was a relatively challenging platform. Through the late 90's and early 00's support was removed for all but Solaris, Windows and Linux - although undoubtedly the code base remains littered with pragmas such as #ifdef RISCOS.

External links