= OpenRISC Port =



[[TOC(Projects/GSoC/OpenRISC, depth=2)]]


'''Mentors:''' Ben Gras, Chris Johns, Christian Svensson

'''Students:''' Hesham ALMatary

'''Status:''' The project has just started. It's currently in design phase. 

'''Introduction:''' The project aims to port RTEMS to OpenRISC architecture.

'''Goal:''' The overall goal of the project is to have a long-term reliable port of RTEMS to OpenRISC. This requires working on three different sub-tasks: tool-chain, RTEMS cpukit, and BSP(s).

 *  tool-chain: Basic tools needed to compile and build RTEMS for or1k.
 *  RTEMS/cpukit: Common OpenRISC architecture code that all or1k targets share.
 *  BSP(s): The front-end interface for OpenRISC architecture including drivers like: UART, Timer, and/or IRQ. 

[wiki:File:OpenRISC_Port_Project.jpg File:OpenRISC Port Project.jpg]
= '''[wiki:Tool-chain tool-chain]''' =


Currently, or1k folks are working on submitting their tool-chain upstream, binutils has already been merged. When this project reaches a stable state, the code for building the tool-chain for RTEMS should be upstream too (after or1k code has been merged). Meanwhile, all the work in this area is some sort of patches that can referenced from RSB.

 *  binutils: By now, binutils support for or1k architecture is now upstreamed to cvs. 
 *  newlib: setjmp/longjmp have been provided along with all other necessary configurations and/or code to build gcc/newlib for RTEMS. newlib work is now upstreamed to cvs without any libgloss stuff. In the future, or1k folks may add to/modify this code when they push their work to cvs.
 *  GCC: it's now building with newlib and able to compile all RTEMS code for or1k targets. We and OpenRISC folks are working to push the code soon to GCC upstream.
 *  GDB: For GDB, it's now able to debug any or1k/RTEMS code by connecting it remotely to or1ksim emulator.
 *  or1ksim: It's able to running test cases and used for debugging purposes along with GDB. There is a configuration script that must be provided though that describes the architecture specifications and supported devices.
= '''[wiki:RTEMS RTEMS]''' =

TBD
= '''[wiki:BSP(s) BSP(s)]''' =

TBD


'''Requirements:''' Developers who wish to contribute to this project should have a fair knowledge with C programming, OpenRISC architecture, and/or GNU tool-chain internals.    

'''Howto'''
TBD

'''Tasks'''
TBD

'''Resources:'''

[1] [http://opencores.org/or1k/ or1k page at opencores.org]

[2] [https://github.com/openrisc/ or1k repositories at github]

[3] [https://github.com/heshamelmatary?tab=repositories Hesham ALMatary repositories at github ]

'''Acknowledgements''' 
TBD
= Miscellaneous Sections =


'''Acronyms'''

or1k: OpenRISC 1000 architecture.

RSB: RTEMS Source Builder.
=  =References==


 *  TBD