Changes between Version 3 and Version 4 of GSoC/2019/PRU_support


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Timestamp:
May 15, 2019, 4:45:54 PM (8 days ago)
Author:
Nils Hölscher
Comment:

Altered Hardware section

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  • GSoC/2019/PRU_support

    v3 v4  
    5353*Note2: The PRU0 Registers{30,31} Bit 6 (GPIO3_20) is routed to P9_41-GPIO0_20(CLKOUT2). You must set GPIO0_20 to input mode in pinmuxing.
    5454
    55 The Table is taken from [5].
     55The table is taken from [5].
    5656
    5757The high i/o speed of the PRU is realised by using the registers R30 and R31 s bits to access the SoC s pins as seen in the table.
     58The PRU1 unit is blocked by HDMI, so this unit can only be utilised when HDMI is not needed.
    5859== Project ==
    5960