Changes between Version 2 and Version 3 of GSoC/2019/PRU_support


Ignore:
Timestamp:
May 15, 2019, 4:24:58 PM (4 days ago)
Author:
Nils Hölscher
Comment:

Added Hardware section.

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  • GSoC/2019/PRU_support

    v2 v3  
    1010
    1111== Introduction ==
    12 This Project intends to add the PRU support to RTEMS, using the Beaglebone Black (BBB). The BBB has an Texas Instruments AM3358 SoC [3][4] with an Programmable Real-Time Unit (PRU).
     12This Project intends to add the PRU support to RTEMS, using the Beaglebone Black (BBB). The BBB has an Texas Instruments AM3358 SoC [3][4] with two Programmable Real-Time Unit(PRU) running @200MHz.
    1313The PRU is able to connect to the SoC s i/o within one cycle.
    1414This will enable the RTEMS community to develop heavily i/o dependent tasks on the Texas Instruments SoC s with PRUs.
    1515For more Information about PRU see [5].
    1616
    17 == Starting Point ==
     17== Hardware ==
     18
     19=== PRU i/o pins and modes ===
     20
     21||=PRU #=||=R30(output) bit=||=Pinmux Mode=||=R31(input) bit=||=Pinmux Mode=||=BB Header=||=BB Pin Name=||=Conflict=||=ZCZ Ball Name=||=Offset Reg=||=DT Offset=||-
     22||0||0||Mode_5||0||Mode_6||P9_31||SPI1_SCLK||McASP||mcasp0_aclkx||990h||0x190||-
     23||0||1||Mode_5||1||Mode_6||P9_29||SPI1_D0||McASP||mcasp0_fsx||994h||0x194||-
     24||0||2||Mode_5||2||Mode_6||P9_30||SPI1_D1||McASP||mcasp0_axr0||998h||0x198||-
     25||0||3||Mode_5||3||Mode_6||P9_28||SPI1_CS0||McASP||mcasp0_ahclkr||99Ch||0x19C||-
     26||0||4||Mode_5||4||Mode_6||P9_42||(*note1)||McASP||mcasp0_aclkr||9A0h||0x1A0||-
     27||0||5||Mode_5||5||Mode_6||P9_27||GPIO3_19||McASP||mcasp0_fsr||9A4h||0x1A4||-
     28||0||6||Mode_5||6||Mode_6||P9_41||(*note2)||    ||mcasp0_axr1||9A8h||0x1A8||-
     29||0||7||Mode_5||7||Mode_6||P9_25||GPIO3_21||McASP||mcasp0_ahclkx||9ACh||0x1AC||-
     30||0||14||Mode_6||N/A||  ||P8_12||GPIO1_12|| ||gpmc_ad12||830h||0x030||-
     31||0||15||Mode_6||N/A|| ||P8_11||GPIO1_13|| ||gpmc_ad13||834h||0x034||-
     32||0||N/A|| ||14||Mode_6||P8_16||GPIO1_14|| ||gpmc_ad14||838h||0x038||-
     33||0||N/A|| ||15||Mode_6||P8_15||GPIO1_15|| ||gpmc_ad15||83Ch||0x03C||-
     34||0||N/A|| ||16||Mode_6||P9_24||UART1_TXD|| ||uart1_txd||984h||0x184||-
     35||1||0||Mode_5||0||Mode_6||P8_45||GPIO2_6||HDMI||lcd_data0||8A0h||0x0A0||-
     36||1||1||Mode_5||1||Mode_6||P8_46||GPIO2_7||HDMI||lcd_data1||8A4h||0x0A4||-
     37||1||2||Mode_5||2||Mode_6||P8_43||GPIO2_8||HDMI||lcd_data2||8A8h||0x0A8||-
     38||1||3||Mode_5||3||Mode_6||P8_44||GPIO2_9||HDMI||lcd_data3||8ACh||0x0AC||-
     39||1||4||Mode_5||4||Mode_6||P8_41||GPIO2_10||HDMI||lcd_data4||8B0h||0x0B0||-
     40||1||5||Mode_5||5||Mode_6||P8_42||GPIO2_11||HDMI||lcd_data5||8B4h||0x0B4||-
     41||1||6||Mode_5||6||Mode_6||P8_39||GPIO2_12||HDMI||lcd_data6||8B8h||0x0B8||-
     42||1||7||Mode_5||7||Mode_6||P8_40||GPIO2_13||HDMI||lcd_data7||8BCh||0x0BC||-
     43||1||8||Mode_5||8||Mode_6||P8_27||GPIO2_22||HDMI||lcd_vsync||8E0h||0x0E0||-
     44||1||9||Mode_5||9||Mode_6||P8_29||GPIO2_23||HDMI||lcd_hsync||8E4h||0x0E4||-
     45||1||10||Mode_5||10||Mode_6||P8_28||GPIO2_24||HDMI||lcd_pclk||8E8h||0x0E8||-
     46||1||11||Mode_5||11||Mode_6||P8_30||GPIO2_25||HDMI||lcd_ac_bias_en||8ECh||0x0EC||-
     47||1||12||Mode_5||12||Mode_6||P8_21||GPIO1_30||emmc2||gpmc_csn1||880h||0x080||-
     48||1||13||Mode_5||13||Mode_6||P8_20||GPIO1_31||emmc2||gpmc_csn2||884h||0x084||-
     49||1||N/A|| ||16||Mode_6||P9_26||UART1_RXD|| ||uart1_rxd||980h||0x180||-
     50
     51*Note1: The PRU0 Registers{30,31} Bit 4 (GPIO3_18) is routed to P9_42-GPIO0_7 pin.  You MUST set GPIO0_7 to input mode in pinmuxing.
     52
     53*Note2: The PRU0 Registers{30,31} Bit 6 (GPIO3_20) is routed to P9_41-GPIO0_20(CLKOUT2). You must set GPIO0_20 to input mode in pinmuxing.
     54
     55The Table is taken from [5].
     56
     57The high i/o speed of the PRU is realised by using the registers R30 and R31 s bits to access the SoC s pins as seen in the table.
     58== Project ==
     59
     60=== Starting Point ===
    1861Since the Beagle Board community already uses the PRU, I will start by trying out their drivers.[1][2]
    1962After reproducing these results with the Linux, the drivers have to be ported to RTEMS to reproduce these Results on RTEMS.
    2063
    21 == Proof of Concept ==
     64=== Proof of Concept ===
    2265Since the PRU is designed to be more predictable than your normal CPU, it is able to access I/O peripherals in a deterministic manner.
    23 This behavior will be used to demonstrate that code is running on the PRU and not the CPU.
     66This behaviour will be used to demonstrate that code is running on the PRU and not the CPU.
    2467The PRU is able to output a square wave with constant small wavelength on the BBB s Pins.
    2568The SOC s CPU is not capable of this, due to pre-emptive behaviour of most OS s.