9 | | Xi Yang's project was to provide more RTEMS Board Support Packages (BSPs) that run on the free Skyeye (http://www.skyeye.org/) simulator and improve testing capabilities when using Skyeye. We use Skyeye to test RTEMS as well as GCC (http://gcc.gnu.org). Another student, Santosh Vattam, was working on improving the Object Coverage (http://code.google.com/p/rtems-coverage-analysis/ | blog) of our testsuites for a core part of RTEMS. Our initial coverage reports were generated for the SPARC/ERC32 using the closed source simulator TSIM (http://www.gaisler.com). As the coverage began to approach 100%, I began to run the coverage reports on various ARM targets using Skyeye using Xi's work. Santosh and I addressed cases which appeared to be test suite deficiencies while apparent simulator anomalies were passed on to Xi. During this, an obscure bug in RTEMS was uncovered and Xi and I worked together via chat to solve it. At the end of the summer, 3 SPARC and 2 ARM configurations were either at 100% or very close. The graph shown below is the coverage progress of sparc/erc32 through the GSoC timeline. Work has continued since GSoC concluded and current results are available at http://www.rtems.org/ftp/pub/rtems/people/joel/coverage/ for ARM, m68k, PowerPC, SPARC, and x86. |
| 9 | Xi Yang's project was to provide more RTEMS Board Support Packages (BSPs) that run on the free Skyeye (http://www.skyeye.org/) simulator and improve testing capabilities when using Skyeye. We use Skyeye to test RTEMS as well as GCC (http://gcc.gnu.org). Another student, Santosh Vattam (blogs at: http://vattamsantosh.info), was working on improving the Object Coverage (http://code.google.com/p/rtems-coverage-analysis/) of our testsuites for a core part of RTEMS. Our initial coverage reports were generated for the SPARC/ERC32 using the closed source simulator TSIM (http://www.gaisler.com). As the coverage began to approach 100%, I began to run the coverage reports on various ARM targets using Skyeye using Xi's work. Santosh and I addressed cases which appeared to be test suite deficiencies while apparent simulator anomalies were passed on to Xi. During this, an obscure bug in RTEMS was uncovered and Xi and I worked together via chat to solve it. At the end of the summer, 3 SPARC and 2 ARM configurations were either at 100% or very close. The graph shown below is the coverage progress of sparc/erc32 through the GSoC timeline. Work has continued since GSoC concluded and current results are available at http://www.rtems.org/ftp/pub/rtems/people/joel/coverage/ for ARM, m68k, PowerPC, SPARC, and x86. |