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Changes between Version 66 and Version 67 of Developer/SMP
- Timestamp:
- 04/18/14 00:30:26 (10 years ago)
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Developer/SMP
v66 v67 122 122 = Low-Level Start = 123 123 124 = = Status ==124 = Status = 125 125 126 126 … … 130 130 131 131 [wiki:File:rtems-smp-low-level-states.png File:rtems-smp-low-level-states.png] 132 = = Future Directions ==132 = Future Directions = 133 133 134 134 … … 136 136 = Processor Affinity = 137 137 138 = = Status ==138 = Status = 139 139 140 140 … … 142 142 143 143 The APIs for <sys/cpuset.h>, pthread affinity, and Classic API task affinity have been community reviewed and patches have been posted. The current work is "data complete" in that one can get and set using the APIs but no scheduler currently supports affinity. 144 = = Background ==144 = Background = 145 145 146 146 … … 161 161 162 162 Work remains to be done on adding affinity to a new SMP Scheduler variant. The current plan calls for having the schedulers without affinity ignore input on a set affinity operation and return a cpu set with all CPUs set on all get affinity operations. A new SMP scheduler variant will be added to support affinity. Initially, this scheduler will only be sufficient to properly manage the thread's CPU set as a data element. Then an assignment algorithm will be added. 163 = = Theory ==163 = Theory = 164 164 165 165 … … 253 253 = Atomic Operations = 254 254 255 = = Status ==255 = Status = 256 256 257 257 … … 321 321 .size release, .-release 322 322 .ident "GCC: (GNU) 4.9.0 20130917 (experimental)" 323 = = Future Directions ==323 = Future Directions = 324 324 325 325 … … 328 328 = SMP Locks = 329 329 330 = = Status ==330 = Status = 331 331 332 332 333 333 SMP locks are implemented as a ticket lock using CPU architecture specific atomic operations. The SMP locks use a local context to be able to use scalable lock implementations like the Mellor-Crummey and Scotty (MCS) queue-based locks. 334 = = Future Directions ==334 = Future Directions = 335 335 336 336 … … 338 338 = ISR Locks = 339 339 340 = = Status ==340 = Status = 341 341 342 342 … … 347 347 on single processor configurations. On SMP configurations they use an SMP lock 348 348 to ensure mutual exclusion throughout the system. 349 = = Future Directions ==349 = Future Directions = 350 350 351 351 … … 354 354 = Giant Lock vs. Fine Grained Locking = 355 355 356 = = Status ==356 = Status = 357 357 358 358 … … 381 381 likely lead to undesirable high worst case latencies which linear increase with 382 382 the processor count <ref name="Brandenburg2011">[https://www.cs.unc.edu/~anderson/diss/bbbdiss.pdf Björn B. Brandenburg, Scheduling and Locking in Multiprocessor Real-Time Operating Systems, 2011.]</ref>. 383 = = Future Directions ==383 = Future Directions = 384 384 385 385 … … 421 421 = Watchdog Handler = 422 422 423 = = Status ==423 = Status = 424 424 425 425 … … 427 427 RTEMS. It is a core service of the operating system and used by the high level APIs. It is used for time of day maintenance and time events based on ticks or 428 428 wall clock time for example. The term ''watchdog'' has nothing to do with hardware watchdogs. 429 = = Future Directions ==429 = Future Directions = 430 430 431 431 … … 435 435 = Per-CPU Control = 436 436 437 = = Status ==437 = Status = 438 438 439 439 … … 443 443 code. CPU ports can add custom fields to the per-CPU control. This is used on 444 444 SPARC for the ISR dispatch disable indication. 445 = = Future Directions ==445 = Future Directions = 446 446 447 447 … … 449 449 = Interrupt Support = 450 450 451 = = Status ==451 = Status = 452 452 453 453 454 454 The interrupt support is BSP specific in general. 455 = = Future Directions ==455 = Future Directions = 456 456 457 457 … … 460 460 = Global Scheduler = 461 461 462 = = Status ==462 = Status = 463 463 464 464 … … 466 466 * Basic SMP support for schedulers like processor allocation and extended thread state information. 467 467 * Two global fixed priority schedulers (G-FP) are available with SMP support. 468 = = Future Directions ==468 = Future Directions = 469 469 470 470 … … 477 477 = Clustered Scheduling = 478 478 479 = = Status ==479 = Status = 480 480 481 481 482 482 Clustered scheduling is not supported. 483 = = Future Directions ==483 = Future Directions = 484 484 485 485 … … 512 512 = Task Variables = 513 513 514 = = Status ==514 = Status = 515 515 516 516 … … 519 519 of the executing thread. For Newlib the access to the re-entrancy structure is 520 520 now performed via ''__getreent()'', see also ''__DYNAMIC_REENT__'' in Newlib. The POSIX keys and the POSIX once function are now available for all RTEMS configurations (they no longer depend on POSIX enabled). Task variables have been replaced with POSIX keys for the RTEMS shell, the file system environment and the C++ support. 521 = = Future Directions ==521 = Future Directions = 522 522 523 523 … … 525 525 = Non-Preempt Mode for Mutual Exclusion = 526 526 527 = = Status ==527 = Status = 528 528 529 529 … … 532 532 a mode change request is issued. The alternatives are mutexes and condition 533 533 variables. 534 = = Future Directions ==534 = Future Directions = 535 535 536 536 … … 541 541 = Thread Restart = 542 542 543 = = Status ==543 = Status = 544 544 545 545 546 546 The restart of threads is implemented. 547 = = Future Directions ==547 = Future Directions = 548 548 549 549 … … 572 572 = Thread Delete = 573 573 574 = = Status ==574 = Status = 575 575 576 576 577 577 Deletion of threads is implemented. 578 = = Future Directions ==578 = Future Directions = 579 579 580 580 … … 582 582 = Semaphores and Mutexes = 583 583 584 = = Status ==584 = Status = 585 585 586 586 … … 588 588 configurations this first acquires the Giant lock and then interrupts are 589 589 disabled. 590 = = Future Directions ==590 = Future Directions = 591 591 592 592 593 593 Use an ISR lock per object to improve the performance for uncontested 594 594 operations. See also [wiki:#Giant_Lock_vs._Fine_Grained_Locking Giant Lock vs. Fine Grained Locking]. 595 = Implementations=595 = Implementations = 596 596 597 597 = Tool Chain = 598 598 599 = = Binutils ==599 = Binutils = 600 600 601 601 602 602 A Binutils 2.24 or later release must be used due to the LEON3 support. 603 = = GCC ==603 = GCC = 604 604 605 605 606 606 A GCC 4.8 2013-11-25 (e.g. 4.8.3) or later must be used due to the LEON3 support. The LEON3 support for GCC includes a proper C11 memory model definition for this processor and C11 atomic operations using the CAS instruction. The backport of the LEON3 support was initiated by EB [http://gcc.gnu.org/ml/gcc-patches/2013-11/msg02255.html]. 607 = = GDB ==607 = GDB = 608 608 609 609 … … 611 611 = Profiling = 612 612 613 = = Reason ==613 = Reason = 614 614 615 615 … … 617 617 observability requirements. Vital timing data can be gathered on a per object 618 618 basis through profiling. 619 = = RTEMS API Changes ==619 = RTEMS API Changes = 620 620 621 621 622 622 None. 623 = = High-Performance CPU Counters ==623 = High-Performance CPU Counters = 624 624 625 625 … … 650 650 */ 651 651 uint64_t _CPU_counter_To_nanoseconds( CPU_counter counter ) 652 = = SMP Lock Profiling ==652 = SMP Lock Profiling = 653 653 654 654 … … 774 774 */ 775 775 void _SMP_lock_Iterate( SMP_lock_Visitor visitor, void *arg ); 776 = = Interrupt and Thread Profiling ==776 = Interrupt and Thread Profiling = 777 777 778 778 … … 859 859 Per_CPU_Stats Stats; 860 860 }; 861 = = Status ==861 = Status = 862 862 863 863 … … 865 865 = Interrupt Support = 866 866 867 = = Reason ==867 = Reason = 868 868 869 869 … … 871 871 system. In combination with partitioned/clustered scheduling this can reduce 872 872 the amount of inter-processor synchronization and thread migrations. 873 = = RTEMS API Changes ==873 = RTEMS API Changes = 874 874 875 875 … … 927 927 = Clustered Scheduling = 928 928 929 = = Reason ==929 = Reason = 930 930 931 931 … … 936 936 scheduling it is possible to honor the cache topology of a system and thus 937 937 avoid expensive cache synchronization traffic. 938 = = RTEMS API Changes ==938 = RTEMS API Changes = 939 939 940 940 … … 1065 1065 rtems_id *scheduler_id 1066 1066 ); 1067 = = Scheduler Configuration ==1067 = Scheduler Configuration = 1068 1068 1069 1069 … … 1157 1157 configuration approach enables an additional error source which is avoided by 1158 1158 the processor configuration table. 1159 = = Scheduler Implementation ==1159 = Scheduler Implementation = 1160 1160 1161 1161 … … 1203 1203 all dependencies explicit and easier to access (allows more efficient machine 1204 1204 code). 1205 = = Status ==1205 = Status = 1206 1206 1207 1207 … … 1209 1209 = Multiprocessor Resource Sharing Protocol - MrsP = 1210 1210 1211 = = Reason ==1211 = Reason = 1212 1212 1213 1213 … … 1236 1236 Feature (a) prevents lower-priority threads from running in preference to the waiting higher-priority thread and stealing resources that it might want to use in the future as part of the current execution; should that stealing happen, the blocking penalty potentially suffered on access to global resources would skyrocket to untenable levels. 1237 1237 Feature (b), which brings in the sole welcome extent of migration in the proposed model, which is useful when higher-priority tasks running on the processor of the global resource prevent it from completing execution; in that case, the slack allowed for by local spinning on other processors where other threads are waiting, is used to speed up the completion of the execution in the global resource and therefore reduce blocking. 1238 = = RTEMS API Changes ==1238 = RTEMS API Changes = 1239 1239 1240 1240 … … 1282 1282 size_t priority_ceilings_count 1283 1283 ); 1284 = = Implementation ==1284 = Implementation = 1285 1285 1286 1286 … … 1293 1293 = Fine Grained Locking = 1294 1294 1295 = = Reason ==1295 = Reason = 1296 1296 1297 1297 … … 1305 1305 the operating system state is distributed allowing true parallelism of 1306 1306 independent components. 1307 = = RTEMS API Changes ==1307 = RTEMS API Changes = 1308 1308 1309 1309 1310 1310 None. 1311 = = Locking Protocol Analysis ==1311 = Locking Protocol Analysis = 1312 1312 1313 1313 … … 1487 1487 to the mutex SMP lock. Later mutex timeout or release operations can then get 1488 1488 the waiting thread and deal with it accordingly. 1489 = = Implementation ==1489 = Implementation = 1490 1490 1491 1491 … … 1503 1503 The thread queue operations must no longer use internal locks (e.g. ISR 1504 1504 disable/enable). This simplifies them considerable. The thread queue 1505 operations must be pe 1505 operations must be performed under the SMP lock of the object. The drawback is 1506 that the time of disabled interrupts increases. Th
