Changes between Version 64 and Version 65 of Developer/SMP


Ignore:
Timestamp:
Apr 17, 2014, 6:09:56 PM (6 years ago)
Author:
Sh
Comment:

/* SMP Locks */

Legend:

Unmodified
Added
Removed
Modified
  • Developer/SMP

    v64 v65  
    331331
    332332
    333 SMP locks are implemented as a ticket lock using CPU architecture specific atomic operations.
     333SMP locks are implemented as a ticket lock using CPU architecture specific atomic operations.  The SMP locks use a local context to be able to use scalable lock implementations like the Mellor-Crummey and Scotty (MCS) queue-based locks.
    334334==  Future Directions  ==
    335335
    336336
    337  *  Use a local context to be able to use scalable lock implementations like the Mellor-Crummey and Scotty (MCS) queue-based locks.
    338  *  Introduce read-write locks.  Use phase-fair read-write lock implementation.  This can be used for example by the time management code.  The system time may be read frequently, but updates are infrequent.
     337Introduce read-write locks.  Use phase-fair read-write lock implementation.  This can be used for example by the time management code.  The system time may be read frequently, but updates are infrequent.
    339338=  ISR Locks  =
    340339
     
    15051504disable/enable).  This simplifies them considerable.  The thread queue
    15061505operations must be performed under the SMP lock of the object.  The drawback is
    1507 that the time of disabled interrupts increases.  The FIFO thread queue
    1508 o
     1506that the time of disabled interrupts increases.  The FIFO thread