Changes between Version 61 and Version 62 of Developer/SMP
- Timestamp:
- 04/15/14 19:54:53 (10 years ago)
Legend:
- Unmodified
- Added
- Removed
- Modified
-
Developer/SMP
v61 v62 9 9 10 10 The [http://en.wikipedia.org/wiki/Symmetric_multiprocessing SMP] support for RTEMS is work in progress. Basic support is available for ARM, PowerPC, SPARC and Intel x86. 11 12 TBD: Insert table of status per task here with links to task13 11 14 12 {| border="1" style="margin: 1em auto 1em auto;text-align: center;" … … 1505 1503 that the time of disabled interrupts increases. The FIFO thread queue 1506 1504 operations are trivial doubly-linked list operations. The priority thread 1507 queue operations execute in a worst-case t 1505 queue operations execute in a worst-case time which depends only on the maximum 1506 number of priorities. 1507 =