Changes between Version 12 and Version 13 of Developer/SMP


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Timestamp:
Jan 13, 2014, 2:25:01 PM (6 years ago)
Author:
Sh
Comment:

/* Design Issues */

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  • Developer/SMP

    v12 v13  
    229229 *  Use a local context to be able to use scalable lock implementations like the Mellor-Crummey and Scotty (MCS) queue-based locks.
    230230 *  Introduce read-write locks.  Use phase-fair read-write lock implementation.  This can be used for example by the time management code.  The system time may be read frequently, but updates are infrequent.
    231 =  Implementation  =
    232 
    233 =  = Testing ==
     231=  ISR Locks  =
     232
     233==  Status  ==
     234
     235
     236On single processor configurations disabling of interrupts ensures mutual
     237exclusion.  This is no longer true on SMP since other processors continue to
     238execute freely.  On SMP the disabling of interrupts must be combined with an
     239SMP lock.  The ISR locks degrade to simple interrupt disable/enable sequences
     240on single processor configurations.  On SMP configurations they use an SMP lock
     241to ensure mutual exclusion throughout the system.
     242=  = Future Directions ====
     243
     244
     245 *  See [wiki:#SMP_Locks #SMP Locks].
     246 *  Ensure via a RTEMS assertion that normal interrupt disable/sequences are only used intentional outside of the Giant lock critical sections.  Review usage of ISR disable/enable sequences of the complete code base.
     247=  = Implementation ==
     248
     249
     250== Testing ==
    234251
    235252