Changes between Version 12 and Version 13 of Developer/SMP

Timestamp:

01/13/14 14:25:01 (10 years ago)

Author:

Sh

Comment:

/* Design Issues */

Developer/SMP

@@ -229 +229 @@
  *  Use a local context to be able to use scalable lock implementations like the Mellor-Crummey and Scotty (MCS) queue-based locks.
  *  Introduce read-write locks.  Use phase-fair read-write lock implementation.  This can be used for example by the time management code.  The system time may be read frequently, but updates are infrequent.
-=  Implementation  =
-
-=  = Testing ==
+=  ISR Locks  =
+
+==  Status  ==
+
+
+On single processor configurations disabling of interrupts ensures mutual
+exclusion.  This is no longer true on SMP since other processors continue to
+execute freely.  On SMP the disabling of interrupts must be combined with an
+SMP lock.  The ISR locks degrade to simple interrupt disable/enable sequences
+on single processor configurations.  On SMP configurations they use an SMP lock
+to ensure mutual exclusion throughout the system.
+=  = Future Directions ====
+
+
+ *  See [wiki:#SMP_Locks #SMP Locks].
+ *  Ensure via a RTEMS assertion that normal interrupt disable/sequences are only used intentional outside of the Giant lock critical sections.  Review usage of ISR disable/enable sequences of the complete code base.
+=  = Implementation ==
+
+
+== Testing ==