wiki:Developer/Projects/Open/MicroblazePort

Port RTEMS to Microblaze

Mentors: Joel Sherrill

Students: Past, Present, and Potential Students

Status: The tools build from RSB properly, but GDB is not compatible with current XDM (Xilinx Debugging Module), Xilinx GDB version is working fine.

Introduction: A new architecture port, not just BSP. Include a BSP for GDB simulator. Also needs BSP for more complete HW on simulator.

Goal: Concise statement of the overall goal of the project. Refine this initial statement to include: project deliverables (code, docs, testing), required/suggested methodology, standards of quality, possible goal extensions beyond the main objective.

Requirements: List the requirements and level of expertise you estimate are required by the developer tackling this project will have to have: Required level of programming language(s), specific areas of RTEMS or tools, level of familiarity with RTEMS, cross-development, GNU/Linux, etx., development/documentation/testing tools, mathematical/algorithmic background, other desirable skills.

Resources: Current RTEMS developers, papers, etc that may help you in this project.

Acknowledgements

  • who helped and did work
  • Some work has been initiated here [1] (By Joel Sherrill and Hesham ALMatary) to get hello world working. It has been tested on Atlys FPGA board [2]. The BSP can run virtually on every FPGA board the Xilinx tools support building MicroBlaze? on.

Miscellaneous Sections

As the project progresses, you will need to add build instructions, etc and this page will evolve from a project description into a HOWTO.

References

Other sections: If you have more to say about the project that doesn't fit in the proposed sections of this template, feel free to add other sections at will.

Last modified on Mar 23, 2015 at 4:46:39 PM Last modified on Mar 23, 2015, 4:46:39 PM