= Atomic support =

= Architectures atomic support =


The following table summarizes the atomic support among the CPU architectures supported by the git development head.  The RTEMS-SMP means whether the SMP mode is supported by the latest SMP. The atomic-hardware means whether the architecture has atomic hardware instruction support. 

{| border="1" style="margin: 1em auto 1em auto;text-align: center;"
|+
|-
|'''Architecture''' || '''Target CPU''' || '''RTEMS SMP''' || '''atomic-hardware''' || '''atomic-instruction''' || '''memory-ordering'''
|-
| X86 || i386 || Yes || Yes || cmpxchg || Stronger
|-
| PowerPC || powerpc || No || Yes || lwarx/stwcx || Weaker
|-
| SPARC (V7-V8) || sparc || No || Yes || ldstub/swap || Stronger (TSO-mode)
|-
| SPARC V9 || sparc64 || No || Yes || ldstub/swap/cas || Stronger (TSO-mode)
|-
| MIPS || mips || No || Yes || ll/sc || Weaker
|-
| ARM || arm || No || Yes (V6 above) || ldstub/swap (V6 above) || Weaker
|-
| M68K || m68k || No || Yes || cad/cas32/tas || 
|-
| Blackfin || bfin || No || no || no || 
|-
| SH || sh || No || Yes ||  || 
|-
|}
= References =

 *  http://dsc.sun.com/solaris/articles/atomic_sparc/
 *  http://semipublic.comp-arch.net/wiki/Load-linked/store-conditional_%28LL/SC%29
 *  http://en.wikipedia.org/wiki/Memory_ordering
 *  http://www.sigma.me/2011/12/14/mips-llsc-instruction.html