wiki:Developer/AtomicSupport

Version 2 (modified by WeiY, on 04/05/13 at 11:53:56) (diff)

Atomic support

Architectures atomic support

The following table summarizes the atomic support among the CPU architectures supported by the git development head. The RTEMS-SMP means whether the SMP mode is supported by the latest SMP. The atomic-hardware means whether the architecture has atomic hardware instruction support.

{| border="1" style="margin: 1em auto 1em auto;text-align: center;" |+

|Architecture | X86 | PowerPC | SPARC (V7-V8) | SPARC V9 | MIPS | ARM | M68K | Blackfin | SH
Target CPU RTEMS SMP atomic-hardware atomic-instruction memory-ordering
i386 Yes Yes cmpxchg Stronger
powerpc No Yes lwarx/stwcx Weaker
sparc No Yes ldstub/swap Stronger (TSO-mode)
sparc No Yes ldstub/swap/cas Stronger (TSO-mode)
mips No Yes ll/sc Weaker
arm No Yes (V6 above) ldstub/swap (V6 above) Weaker
m68k No Yes cad/cas32/tas
bfin No no no
sh No Yes

|}

References:

  1. http://dsc.sun.com/solaris/articles/atomic_sparc/
  2. http://semipublic.comp-arch.net/wiki/Load-linked/store-conditional_%28LL/SC%29
  3. http://en.wikipedia.org/wiki/Memory_ordering
  4. http://www.sigma.me/2011/12/14/mips-llsc-instruction.html