Version 13 (modified by Ralph Holmes, on Jan 6, 2016 at 12:23:22 AM) (diff)

Fix dead links and formatting.


Table of Contents

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In order to support the ARM Cortex-M architecture (ARMv7-M) on RTEMS we need an appropriate GCC configuration. See also #1765. This GCC configuration is based on EABI version 5 as defined by ARM. One benefit of EABI version 5 is that this brings RTEMS more in line with the primary GCC platform arm-linux-gnueabi. For standards related to this please have a look at the following documents:


The name of the ARM EABI version 5 tool chain target is: arm-rtems4.11. It is available through the standard RTEMS tool distribution.

The intermediate name arm-rtemseabi4.11 is now obsolete.


  • The EABI makes the VFP floating point format mandatory and enables us to use hardware floating point support.
  • The Thumb interwork support is mandatory with this ABI.
  • The exception handling implementation changes from SJLJ to a table-based system, which is not based on DWARF unwinding tables as they are too bulky for use on small embedded systems.
  • Short enums. The standard ARM EABI configuration in GCC uses short enums by default. See also ARM Architecture Procedure Call Standard (AAPCS) section 7.1.3 "Enumerated Types". This may lead to portability problems since many architectures use int as the base type for enums. The XDR library is one problem candidate.


The multilib is a term used by GCC and it is a library provided by the tool chain (e.g. libc, libm, libgcc, libstdc++) which is provided for a set of GCC options (usually machine options). Each library set corresponds to an application binary interface (ABI) and instruction set. So if you build for certain ABI and instruction set, then you need a compatible multilib which provides you with for example memcpy(). The set of options which define the multilibs is provided by the GCC configuration. The '.' denotes the default multilib set and is used if no other option set matches.

  1. .: ARMv4T, ARM instruction set
  2. thumb: ARMv4T, Thumb-1 instruction set
  3. thumb/armv6-m: ARMv6M, subset of Thumb-2 instruction set
  4. thumb/armv7-a: ARMv7-A, Thumb-2 instruction set
  5. thumb/armv7-a/neon/hard: ARMv7-A, Thumb-2 instruction set with hard-float ABI Neon and VFP-D32 support
  6. thumb/armv7-r: ARMv7-R, Thumb-2 instruction set
  7. thumb/armv7-r/vfpv3-d16/hard: ARMv7-R, Thumb-2 instruction set with hard-float ABI VFP-D16 support
  8. thumb/armv7-m: ARMv7-M, Thumb-2 instruction set with hardware integer division (SDIV/UDIV)
  9. thumb/armv7-m/fpv4-sp-d16: ARMv7-M, Thumb-2 instruction set with hardware integer division (SDIV/UDIV) and hard-float ABI FPv4-SP support
  10. eb/thumb/armv7-r: ARMv7-R, Big-endian Thumb-2 instruction set
  11. eb/thumb/armv7-r/vfpv3-d16/hard: ARMv7-R, Big-endian Thumb-2 instruction set with hard-float ABI VFP-D16 support

Multilib 1. and 2. support the standard ARM7TDMI and ARM926EJ-S targets.

Multilib 3. supports the Cortex-M0 and Cortex-M1 cores.

Multilib 8. supports the Cortex-M3 and Cortex-M4 cores, which have a special hardware integer division instruction (this is not present in the A and R profiles).

Multilib 9. supports the Cortex-M4 cores with a floating point unit.

Use for example the following GCC options:

-mthumb -march=armv7-a -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9

It is important to select the options used for the multilibs. For example:

-mthumb -mcpu=cortex-a9

alone will not select the ARMv7-A multilib.

Board Support Package Update HOWTO

Throw away your linker command file and use c/src/lib/libbsp/arm/shared/startup/linkcmds.base instead. The linker command file must support the .preinit_array, .init_array, and .fini_array sections.

Legacy ARM GCC Configuration

The legacy ARM GCC configuration (also called ARM ELF, arm-none-elf) is based on a GNU EABI. This configuration is not actively maintained in GCC. There is no support for recent ARM architectures. The name ELF is a bit misleading since the file format is ELF in both cases.

The legacy configuration has been removed for RTEMS in GCC 4.8.