Timeline




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Oct 22, 2019:

10:20 AM Changeset in rtems [a7f5e42c] by Pragnesh Patel <pragnesh.patel@…>
riscv: add freedom E310 Arty A7 bsp Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel <pragnesh.patel@…>

Oct 19, 2019:

4:54 AM Changeset in rtems [32c9b83] by Chris Johns <chrisj@…>
libdebugger/arm: Clean up the building on arm variants.
4:53 AM Changeset in rtems [2fdbdbc] by Chris Johns <chrisj@…>
arm/beanglebone: Fix i2c build error.

Oct 17, 2019:

3:20 PM Changeset in rtems-tools [4cb2ddc] by Chris Johns <chrisj@…>
rtemstoolkit: Interpolate realing rtems configuration files.
3:12 PM Changeset in rtems-source-builder [68870df] by Joel Sherrill <joel@…>
Update Spike RSB recipe and correct installed permissions Updates #3802.
1:32 PM Changeset in rtems-source-builder [6424fe0] by Sebastian Huber <sebastian.huber@…>
6: Update unstable RTEMS 6 tool chain
1:25 PM Ticket #3802 (RSB Build of Spike Fails on Second TIme (bug in upstream spike)) created by Joel Sherrill
See https://github.com/riscv/riscv-isa-sim/issues/348 When this is …

Oct 15, 2019:

3:10 PM Changeset in rtems [9620dfa4] by Christian Mauderer <christian.mauderer@…>
bsp/atsam: Use PIO for SC16IS752. This allows to mix SC16IS752 chips with other interrupts.
3:10 PM Changeset in rtems [d60b6d7c] by Christian Mauderer <christian.mauderer@…>
bsp/atsam: Add additional PIO helper.
3:09 PM Changeset in rtems [d4b92da2] by Christian Mauderer <christian.mauderer@…>
bsps/atsam: Improve case for level triggered IRQs. For level triggered interrupts currently the handler would have been called two times (assuming no one cleared the mask in a handler which would have been bad because the handler couldn't process all other that got cleared by accident). This patch allows the handler only to return if nothing is left to do.
9:47 AM Ticket #3801 (Rtems 5 BSP Test Failing) created by Nigel W Sewell
When following the instructions in: …

Oct 13, 2019:

8:51 AM Changeset in rtems-docs [bb47f89] by Chris Johns <chrisj@…>
user/rsb: Update 3rd party package build and add packaging details.

Oct 10, 2019:

12:55 PM Changeset in rtems [43a6991] by Hesham Almatary <Hesham.Almatary@…>
Add myself to the MAINTAINERS

Oct 9, 2019:

7:34 PM Ticket #3800 (termios - Add Capability to Generate SIGINTR and SIGQUIT) closed by Joel Sherrill <joel@…>
fixed: In 667501a/rtems: […]
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