Timeline




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Jul 4, 2018:

5:23 PM GSoC/2018 edited by Vijay Kumar Banerjee
(diff)
2:15 PM Changeset in rtems [d3dff40] by Sebastian Huber <sebastian.huber@…>
bsps: Update headers.am
2:14 PM Changeset in rtems [877aeab] by Sebastian Huber <sebastian.huber@…>
linux: Install <linux/rbtree.h> This makes it possible to test this API. Update #3465.
2:12 PM Changeset in rtems [22d9575] by Sebastian Huber <sebastian.huber@…>
linux: Add rbtree_postorder_for_each_entry_safe() Update #3465.
5:19 AM Changeset in rtems-libbsd [e6f6b5e]5-freebsd-12 by Nicolas Tsiogkas <lou.nick@…>
BPF(9): Pass flags to bpfopen()

Jul 3, 2018:

6:32 PM Changeset in rtems [0cb4257] by Sebastian Huber <sebastian.huber@…>
linux: Simplify <linux/rbtree.h> Remove the placeholder struct rb_node and use RBTree_Node directly via some C pre-processor defines to adjust the member names. Update #3465.
4:17 PM GSoC/2018 edited by Danxue Huang
(diff)
9:50 AM Changeset in rtems [77fbbd6] by Sebastian Huber <sebastian.huber@…>
posix: Check for new <pthread.h> prototypes Update #3342. Update #3343.
7:54 AM Changeset in rtems [e755782] by Sebastian Huber <sebastian.huber@…>
riscv: Clear reservations See also RISC-V User-Level ISA V2.3, comment in section 8.2 "Load-Reserved/Store?-Conditional Instructions". Update #3433.
5:11 AM Changeset in rtems-source-builder [25f4db0] by Sebastian Huber <sebastian.huber@…>
5: Update tools to not build obsolete BSP variants Update #3459.
5:06 AM Changeset in rtems-tools [156b227] by Sebastian Huber <sebastian.huber@…>
tester: Remove obsolete BSP variants Update #3459.

Jul 2, 2018:

1:21 PM Changeset in rtems [e07b51a7] by Sebastian Huber <sebastian.huber@…>
riscv: Fix fcsr initialization Update #3433.
7:16 AM Changeset in rtems-libbsd [a1e4757]5-freebsd-12 by Sebastian Huber <sebastian.huber@…>
syscalls01: Fix sporadic test failures
6:21 AM Changeset in rtems-libbsd [94b5368]5-freebsd-12 by Sebastian Huber <sebastian.huber@…>
Avoid malloc() in getsockaddr() The getsockaddr() function is used to allocate a struct sockaddr of the right length and initialize it with userspace provided data. It is used for the connect(), bind() and sendit() family functions. In particular, the sendit() function is used by the UDP send functions. This means each UDP send needs a malloc() and free() invocation. This is a performance problem in RTEMS (first-fit heap) and may lead to heap fragmentation. Replace the malloc() allocation with a stack allocation. This requires SOCK_MAXADDRLEN (= 255) of additional stack space for libbsd. A further optimization would be to get rid of the stack copy of the socket address. However, this would require to check each consumer of the address to ensure that it is not modified.
5:40 AM Ticket #3465 (Integrate all changes from Linux v3.11 to v4.17 made in the JFFS2 sources) created by Sebastian Huber
The original import version of the JFFS2 sources was Linux v3.11 …

Jul 1, 2018:

11:40 PM GSoC/2018 edited by udit agarwal
Updated status (diff)

Jun 30, 2018:

10:27 PM GSoC/2018 edited by Danxue Huang
(diff)

Jun 29, 2018:

6:00 PM Changeset in rtems [6539bea] by Sebastian Huber <sebastian.huber@…>
score: Add postorder tree iteration support Update #3465.
12:24 PM Changeset in rtems [97d2c44] by Daniel Hellstrom <daniel@…>
spglobalcon01: LLVM optimization makes variable i always 1 Declare i volatile to avoid compiler optimization putting i into data section with initialization value 1.
10:55 AM Changeset in rtems [b36bf5b] by Sebastian Huber <sebastian.huber@…>
score: Increase PER_CPU_CONTROL_SIZE_APPROX Increase the PER_CPU_CONTROL_SIZE_APPROX on 64-bit targets. Update #3433.
10:08 AM Changeset in rtems [79d69ae] by Sebastian Huber <sebastian.huber@…>
riscv: Fix SMP context switch support Update #3433.
9:53 AM Ticket #3436 (Remove clock driver Clock_driver_support_shutdown_hardware() hook) closed by Sebastian Huber <sebastian.huber@…>
fixed: In 7ee59313/rtems: […]
8:30 AM Changeset in rtems-tools [7b7e340] by Sebastian Huber <sebastian.huber@…>
tester: Add rv64imafd_medany.ini Update #3433.
6:07 AM Changeset in rtems [109bc1c7] by Sebastian Huber <sebastian.huber@…>
riscv: Add SMP context switch support Update #3433.

Jun 28, 2018:

8:37 PM Changeset in rtems [1d00acb1] by dab <dab@…>
Fix compilation error in r335765 under gcc 4.2.1. The anonymous object initialization introduced in r335765 was acceptable to clang, but not gcc 4.2.1. Fix it for both. Reported by: jhibbits@ Pointy Hat: myself MFC after: 1 week X-MFC-with: r335765 Sponsored by: Dell EMC
5:01 PM Changeset in rtems [b37ef68] by dab <dab@…>
Remove potential identifier conflict in the EV_SET macro. PR43905 pointed out a problem with the EV_SET macro if the passed struct kevent pointer were specified with an expression with side effects (e.g., "kevp++"). This was fixed in rS110241, but by using a local block that defined an internal variable (named "kevp") to get the pointer value once. This worked, but could cause issues if an existing variable named "kevp" is in scope. To avoid that issue, jilles@ pointed out that "C99 compound literals and designated initializers allow doing this cleanly using a macro". This change incorporates that suggestion, essentially verbatim from jilles@ comment on PR43905, except retaining the old definition for pre-C99 or non-STDC (e.g., C++) compilers. PR: 43905 Submitted by: Jilles Tjoelker (jilles@) Reported by: Lamont Granquist <lamont@…> Reviewed by: jmg (no comments), jilles MFC after: 1 week Sponsored by: Dell EMC Differential Revision: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=43905
12:59 PM Changeset in rtems [bc3bdf2] by Sebastian Huber <sebastian.huber@…>
riscv: Optimize and fix interrupt disable/enable Use the atomic read and clear operation to disable interrupts. Do not write the complete mstatus. Instead, set only the MIE bit depending on the level parameter. Update #3433.
12:43 PM Changeset in rtems [655108e4] by Daniel Hellstrom <daniel@…>
psxfile01: floating point context required when calling fprintf This avoids an exception (FP disabled) when RTEMS/Newlib have been built with LLVM/Sparc.
12:42 PM Changeset in rtems [26c3f9f] by Daniel Hellstrom <daniel@…>
psx13: floating point context required when calling fprintf This avoids an exception (FP disabled) when RTEMS/Newlib have been built with LLVM/Sparc.
12:39 PM Changeset in rtems [0d51b6d8] by Daniel Hellstrom <daniel@…>
capture: prevent unaligned access when reading time LLVM warns about this: cpukit/libmisc/capture/capture.c:405:30: warning: taking address of packed member 'time' of class or structure 'rtems_capture_record' may result in an unaligned pointer value [-Waddress-of-packed-member] rtems_capture_get_time (&in.time); And on sparc it generates an unaligned trap which makes smpcapture01 and smpcapture02 test to fail on sparc.
11:55 AM Changeset in rtems [dffc08c] by Sebastian Huber <sebastian.huber@…>
riscv: Fix interrupt save/restore Update #3433.
11:04 AM Changeset in rtems [c558cc4] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Fix vector table for lp64 Update #3433.
7:32 AM Changeset in rtems [5235238] by Sebastian Huber <sebastian.huber@…>
riscv: Add floating-point support Update #3433.
6:21 AM Changeset in rtems [995e91e8] by Sebastian Huber <sebastian.huber@…>
riscv: Fix global construction Update #3433.
6:20 AM Changeset in rtems [694e79a0] by Sebastian Huber <sebastian.huber@…>
riscv: Add TLS support Update #3433.

Jun 27, 2018:

2:45 PM GSoC/2018 edited by Vijay Kumar Banerjee
(diff)
2:12 PM GSoC/2018 edited by Vidushi Vashishth
(diff)
1:56 PM GSoC/2018 edited by Amaan Cheval
(diff)
1:47 PM GSoC/2018 edited by udit agarwal
Updated status (diff)
12:46 PM Changeset in rtems [afb60eb] by Sebastian Huber <sebastian.huber@…>
riscv: Remove dead code Update #3433.
10:18 AM Changeset in rtems [40f81ce6] by Sebastian Huber <sebastian.huber@…>
riscv: Implement _CPU_Context_validate() Update #3433.
10:17 AM Changeset in rtems [71af1a4] by Sebastian Huber <sebastian.huber@…>
riscv: Make some CPU port defines visible to asm Move SREG and LREG assembler defines to <rtems/score/asm.h>. Update #3433.
8:05 AM Changeset in rtems [e43994d] by Sebastian Huber <sebastian.huber@…>
riscv: Optimize context switch and interrupts Save/restore non-volatile registers in _CPU_Context_switch(). Save/restore volatile registers in _ISR_Handler(). Update #3433.
7:43 AM Changeset in rtems [a8188730] by Sebastian Huber <sebastian.huber@…>
riscv: Fix _CPU_Context_Initialize() prototype Update #3433.
6:57 AM Changeset in rtems [8f035cb] by Sebastian Huber <sebastian.huber@…>
riscv: Implement _CPU_Context_volatile_clobber() Update #3433.
6:54 AM Changeset in rtems [b706b4a] by Sebastian Huber <sebastian.huber@…>
riscv: Remove mstatus from thread context The mstatus register contains no thread-specific state which must be saved/restored during a context switch. Machine interrupts (MIE) must be enabled during a context switch. Create separate CPU_Interrupt_frame structure. Update #3433.
6:43 AM Changeset in rtems [2987c4f] by Sebastian Huber <sebastian.huber@…>
riscv: Remove x8 initialization The RISC-V psABI https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md does not mention that this is a frame pointer. Update #3433.
6:42 AM Changeset in rtems [04698eb] by Sebastian Huber <sebastian.huber@…>
riscv: Properly align the thread stack Update #3433.
6:37 AM Changeset in rtems [a49a3c8e] by Sebastian Huber <sebastian.huber@…>
riscv: Do not clear thread context Do not clear the complete thread context. Initialize only the necessary members. The Context_Control::is_executing member must be preserved across _CPU_Context_Initialize() calls. Update #3433.
6:35 AM Changeset in rtems [9510742] by Sebastian Huber <sebastian.huber@…>
riscv: Fix CPU_STACK_ALIGNMENT According to the RISC-V psABI https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md the stack alignment is 128 bits (16 bytes). Update #3433.
6:17 AM Changeset in rtems [718a84af] by Sebastian Huber <sebastian.huber@…>
Remove unused CPU_MODES_INTERRUPT_LEVEL
6:08 AM Changeset in rtems [98f051e] by Sebastian Huber <sebastian.huber@…>
riscv: Remove RISCV_GCC_RED_ZONE_SIZE The current ABI says that there is no stack red zone: https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md "Procedures must not rely upon the persistence of stack-allocated data whose addresses lie below the stack pointer." Update #3433.
5:47 AM Changeset in rtems [ff7b104] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Remove bsp_interrupt_handler_default() It duplicated the default implementation. Update #3433.

Jun 26, 2018:

11:54 AM Changeset in rtems-libbsd [9ea8664]5-freebsd-12 by Christian Mauderer <christian.mauderer@…>
random: Implement read_random via getentropy.
9:18 AM Ticket #3464 (Move all BSP documentation to the User Manual) created by Sebastian Huber
Gather all the information from READMEs, wiki pages, blogs, etc. for …
9:10 AM Changeset in rtems-docs [2c2c6cc] by Sebastian Huber <sebastian.huber@…>
user: Add BSP chapter for each architecture Update #3464.
6:53 AM Changeset in rtems [9704d86f] by Sebastian Huber <sebastian.huber@…>
riscv: Enable interrupts during dispatch after ISR The code sequence is derived from the ARM code (see _ARMV4_Exception_interrupt). Update #2751. Update #3433.
5:48 AM Changeset in rtems [52f4fb6] by Sebastian Huber <sebastian.huber@…>
riscv: Format assembler files Use tabs to match the GCC generated assembler output. Update #3433.
5:15 AM Changeset in rtems [0fd8287] by Sebastian Huber <sebastian.huber@…>
riscv: Add _CPU_Get_current_per_CPU_control() Update #3433.
5:13 AM Changeset in rtems [3be4478f] by Sebastian Huber <sebastian.huber@…>
riscv: Avoid namespace pollution Remove <rtems/score/riscv-utility.h> include from <rtems/score/cpu.h> (which is visible via <rtems.h> for example). Update #3433.

Jun 25, 2018:

9:12 AM Changeset in rtems [cdfed94f] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Rework clock driver Use device tree provided timebase frequency. Do not write to read-only mtime register. Update #3433.
6:44 AM Changeset in rtems [1232cd46] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Add device tree support for console Update #3433.

Jun 24, 2018:

5:37 AM Changeset in rtems-tools [ddcf29f] by Chris Johns <chrisj@…>
rtemstoolkit/dwarf: Fix function loading with an DW_AT_specification attr.

Jun 22, 2018:

8:42 PM GSoC/2018/coverage_analysis_toolset edited by Vijay Kumar Banerjee
(diff)
8:40 PM GSoC/2018/coverage_analysis_toolset edited by Vijay Kumar Banerjee
(diff)
3:05 PM Changeset in rtems-tools [e86646c] by Joel Sherrill <joel@…>
covoar: Address kill() on Cygwin
11:58 AM Changeset in rtems [5f5c450] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Add SMP startup synchronization Update #3433.
11:30 AM Changeset in rtems [7c3b0df1] by Sebastian Huber <sebastian.huber@…>
riscv: Implement ISR set/get level Fix prototypes. Update #3433.
11:30 AM Changeset in rtems [9b2ef07f] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Load global pointer Update #3433.
9:14 AM Changeset in rtems [b0ee789] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Use memset() to clear .bss Update #3433.
9:00 AM Changeset in rtems [38024362] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Fix some warnings Update #3444.
7:03 AM Changeset in rtems [fef0a41] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Do not clear integer registers at start There is no need to do this. Update #3433.
6:01 AM Changeset in rtems [fe2cd01] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Add device tree support Update #3433.
5:51 AM Changeset in rtems [16d905f] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Add BSP options to define RAM region Update #3433.
5:35 AM Changeset in rtems [37a1fc2] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Remove unused BSP options Update #3433.
5:10 AM Changeset in rtems [f3da074a] by Sebastian Huber <sebastian.huber@…>
bsp/riscv: Add new BSP variants The latest RISC-V tool chain introduced new multilib variants. Add corresponding BSP variants. Update #3433.
5:06 AM Changeset in rtems [6f5d88a] by Sebastian Huber <sebastian.huber@…>
bsp/riscv_generic: Rename to "riscv" Update #3433.
5:04 AM Changeset in rtems [41e2295] by Sebastian Huber <sebastian.huber@…>
bsp/riscv_generic: Use standard optimization flags Update #3433.

Jun 21, 2018:

10:54 AM Changeset in rtems [196ce18] by Sebastian Huber <sebastian.huber@…>
console: Add missing return status Update #3320.
10:10 AM Changeset in rtems-source-builder [4bd8de5] by Sebastian Huber <sebastian.huber@…>
5: Use GCC 8 snapshot for RISC-V This picks up the new multilib set for RISC-V. Update #3452.
8:05 AM GSoC/2018 edited by Vidushi Vashishth
(diff)
7:55 AM Changeset in rtems-tools [bf8e59f] by Chris Johns <chrisj@…>
covoar: Covert CoverageMapBase? C to C++ Updates #3462
7:46 AM Ticket #3463 (Convert covoar to use DWARF function data) created by Chris Johns
Convert covoar to use DWARF function data for the executable symbol …
7:45 AM Ticket #3462 (Convert covoar C code to C++) created by Chris Johns
Some of the code in covoar is C while the program is C++. Convert …
5:32 AM Changeset in rtems [78ad048] by David Gibson <david@…>
libfdt: Add helpers for accessing unaligned words This adds some helpers to load (32 or 64 bit) words from an fdt blob, even if they're unaligned and we're on a platform that doesn't like plain unaligned loads and stores. We then use the helpers in a number of places. There are two purposes for this: 1) This makes libfdt more robust against a blob loaded at an unaligned address. It's usually good practice to load a blob at a 64-bit alignment, but it's nice to work even then. 2) Users can use these helpers to load integer values from within property values. These can often be unaligned, even if the blob as a whole is aligned, since some property encodings have integers and strings mixed together without any alignment gaps. Signed-off-by: David Gibson <david@…>

Jun 20, 2018:

5:44 PM GSoC/2018 edited by Danxue Huang
(diff)
3:24 PM GSoC/2018 edited by Amaan Cheval
(diff)
12:51 PM GSoC/2018 edited by Vijay Kumar Banerjee
(diff)
10:03 AM Changeset in rtems [c47ad8e] by Sebastian Huber <sebastian.huber@…>
stackchk: Add SMP support Check the interrupt stacks of all processors. Set up the interrupt stack of the current processor for high water testing in the thread begin extension. This must be done after multi-threading started, since the initialization stacks may reuse the interrupt stacks. Disable thread dispatching in SMP configurations to prevent thread migration. Writing to the interrupt stack is only safe if done from the corresponding processor in thread context. Update #3459.
9:29 AM Changeset in rtems [1cb2e748] by Sebastian Huber <sebastian.huber@…>
stackchk: Refactor Stack_check_Dump_threads_usage Update #3459.
9:13 AM Changeset in rtems [8ff5916c] by Sebastian Huber <sebastian.huber@…>
stackchk: Remove dead code Update #3459.
7:55 AM Changeset in rtems [cc3edaa] by Sebastian Huber <sebastian.huber@…>
config: SMP only CONFIGURE_MAXIMUM_PROCESSORS Do not set the CONFIGURE_MAXIMUM_PROCESSORS in uni-processor default configuration, since this may lead to an oversize workspace. Update #3459.
7:23 AM Changeset in rtems [408fad3] by Daniel Hellstrom <daniel@…>
leon,grspw_pkt: remove incorrect comment on SMP not being tested To clarify, SMP with GRSWP_PKT driver API has been extended to take advantage of multi-core, is now SMP-safe, and has been tested on GR740.
5:37 AM Changeset in rtems-source-builder [8ee4e8c] by Sebastian Huber <sebastian.huber@…>
5: Update RISC-V Binutils and GDB This includes the following bug fix: https://sourceware.org/bugzilla/show_bug.cgi?id=23305 Update #3452.
2:59 AM GSoC/2018 edited by Vidushi Vashishth
(diff)
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