Timeline




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Mar 10, 2014:

4:35 PM Changeset in rtems [89e72a80]4.11 by Joel Sherrill <joel.sherrill@…>
smp.t: Add Background and Operation Sections
3:31 PM Changeset in rtems [9391f6d]4.11 by Sebastian Huber <sebastian.huber@…>
tests/samples: Use <rtems/test.h>
2:47 PM Changeset in rtems [2aeeaa0]4.11 by Joel Sherrill <joel.sherrill@…>
doc: Improve description of rtems_status_text for ToC
2:17 PM Changeset in rtems [e72bc923]4.11 by Sebastian Huber <sebastian.huber@…>
sapi: Add profiling report for tests
1:39 PM Changeset in rtems [4dad4b8]4.11 by Sebastian Huber <sebastian.huber@…>
sapi: Add profiling application level support
1:39 PM Changeset in rtems [840ae71]4.11 by Sebastian Huber <sebastian.huber@…>
sapi: Add <rtems/test.h> Provide support functions to print the begin/end of test message. Provide a test fatal extension to print out profiling reports in the future.
12:39 PM Changeset in rtems [4575ae0]4.11 by Sebastian Huber <sebastian.huber@…>
smptests/smpload01: New test
12:27 PM Changeset in rtems [909f61b]4.11 by Sebastian Huber <sebastian.huber@…>
smptests/smppsxaffinity02: Fix end of test message
9:20 AM Changeset in rtems [350f88d]4.11 by Sebastian Huber <sebastian.huber@…>
sapi: Add SMP lock profiling app. level data
9:04 AM Changeset in rtems [f980561]4.11 by Sebastian Huber <sebastian.huber@…>
score: Add per-CPU profiling Add per-CPU profiling stats API. Implement the thread dispatch disable level profiling. The interrupt profiling must be implemented in CPU port specific parts (mostly assembler code). Add a support function _Profiling_Outer_most_interrupt_entry_and_exit() for this purpose.
9:03 AM Changeset in rtems [29c9eb6]4.11 by Sebastian Huber <sebastian.huber@…>
sapi: Add per-CPU profiling application level data
8:49 AM Changeset in rtems [0c25ba68]4.11 by Sebastian Huber <sebastian.huber@…>
posix: Fix NULL pointer access in pthread_create()
7:25 AM Changeset in rtems [d50acdbb]4.11 by Sebastian Huber <sebastian.huber@…>
score: Add local context to SMP lock API Add a local context structure to the SMP lock API for acquire and release pairs. This context can be used to store the ISR level and profiling information. It may be later used to enable more sophisticated lock algorithms, e.g. MCS locks. There is only one lock that cannot be used with a local context. This is the per-CPU lock since here we would have to transfer the local context through a context switch which is very complicated.
7:15 AM Changeset in rtems [ae88aa7]4.11 by Sebastian Huber <sebastian.huber@…>
sapi: Use one SMP lock for all chains This partially reverts commit 1215fd4d9426a59d568560e9a485628560363133. In order to support profiling of SMP locks and provide a future compatible SMP locks API it is necessary to add an SMP lock destroy function. Since the commit above adds an SMP lock to each chain control we would have to add a rtems_chain_destroy() function as well. This complicates the chain usage dramatically. Thus revert the patch above. A global SMP lock for all chains is used to implement the protected chain operations. Advantages: * The SAPI chain API is now identical on SMP and non-SMP configurations. * The size of the chain control is reduced and is then equal to the Score chains. * The protected chain operations work correctly on SMP. Disadvantage: * Applications using many different chains and the protected operations may notice lock contention. The chain control size drop is a huge benefit (SAPI chain controls are 66% larger than the Score chain controls). The only disadvantage is not really a problem since these applications can use specific interrupt locks and unprotected chain operations to avoid this issue.
7:13 AM Changeset in rtems [b1196e3]4.11 by Sebastian Huber <sebastian.huber@…>
printk: Add support for long long

Mar 9, 2014:

1:22 PM Changeset in rtems [fac9da63]4.11 by Pavel Pisa <ppisa@…>
bsps/arm: Add DP83848 PHY support to LPC Ethernet
11:35 AM GSoC edited by Hesham
/* Students' Proposals */ (diff)

Mar 7, 2014:

9:00 PM Changeset in rtems [48198f1b]4.11 by Joel Sherrill <joel.sherrill@…>
cpright.texi: Update to 2014.
7:20 PM Changeset in rtems [d46ab11b]4.11 by Joel Sherrill <joel.sherrill@…>
Classic API Users Guide: Add SMP and affinity services. This patch adds the initial version of the SMP chapter to the Users Guide.
7:18 PM Changeset in rtems [4013d25]4.11 by Joel Sherrill <joel.sherrill@…>
POSIX Users Guide: Add thread affinity services.
7:18 PM Changeset in rtems [653ed5e]4.11 by Joel Sherrill <joel.sherrill@…>
gen_section: Update for use with new SMP chapters.
3:06 PM Changeset in rtems [5c332349]4.11 by Jennifer Averett <jennifer.averett@…>
Remove trailing whitespace in previous patches
1:36 PM Changeset in rtems [53ad908]4.11 by Sebastian Huber <sebastian.huber@…>
score: Add SMP lock profiling support
11:53 AM Changeset in rtems [28779c7]4.11 by Sebastian Huber <sebastian.huber@…>
score: Add function to destroy SMP locks
6:52 AM Changeset in rtems [234ecedd]4.11 by Sebastian Huber <sebastian.huber@…>
bsps/leon3: Add interrupt delay profiling support
3:23 AM Changeset in rtems [9d9c426]4.11 by Nick Withers <nick.withers@…>
Teach rtems_tarfs_load() about symlinks

Mar 6, 2014:

2:51 PM Changeset in rtems [148d6e9]4.11 by Sebastian Huber <sebastian.huber@…>
arm: Add support for interrupt profiling
2:37 PM Changeset in rtems [cfe457f]4.11 by Jennifer Averett <jennifer.averett@…>
score: score: Add get/set affinity to Scheduler Framework.
2:16 PM Changeset in rtems [e7d3967]4.11 by Sebastian Huber <sebastian.huber@…>
arm: Fix stack alignment in interrupt handler According to AAPCS, section 5.2.1.2, "Stack constraints at a public interface" the stack must be 8 byte aligned. This was not the case during interrupt processing.
1:22 PM Developer/SMP edited by Sh
/* Requirements */ Restrict owning resources to semaphores (diff)
1:21 PM Developer/SMP edited by Sh
/* Requirements */ Examples for concurrent object deletion (diff)
12:17 PM Changeset in rtems [6b115b3]4.11 by Sebastian Huber <sebastian.huber@…>
bsp/leon3: Use interrupt timestamping counter Use the interrupt controller timestamping counter for the CPU counter if available since it runs with a high frequency.
10:19 AM Changeset in rtems [f4accfd]4.11 by Sebastian Huber <sebastian.huber@…>
bsps/sparc: Remove fix for ERC32 with FPU rev. B/C
10:11 AM Changeset in rtems [79e2d9b]4.11 by Sebastian Huber <sebastian.huber@…>
score: Add per-CPU state function Add _Per_CPU_State_wait_for_ready_to_start_multitasking(). Add new fatal SMP error SMP_FATAL_SHUTDOWN_EARLY.
9:53 AM Changeset in rtems [3ca84d0c]4.11 by Sebastian Huber <sebastian.huber@…>
score: Fix per-CPU state documentation
8:26 AM Changeset in rtems [ba15b92]4.11 by Sebastian Huber <sebastian.huber@…>
bsps/sparc: Add missing IRQMP registers

Mar 5, 2014:

10:28 PM Developer/SMP edited by JoelSherrill
/* Future Directions */ Update (diff)
10:23 PM Developer/SMP edited by JoelSherrill
/* Status */ Update (diff)
4:14 PM Changeset in rtems [1550242]4.11 by Sebastian Huber <sebastian.huber@…>
bsps/powerpc: Add support for interrupt profiling
11:07 AM Changeset in rtems [de5d6d0]4.11 by Sebastian Huber <sebastian.huber@…>
sparc: Add support for interrupt profiling
8:14 AM Changeset in rtems [34568acf]4.11 by Ralf Kirchner <ralf.kirchner@…>
bsp/arm: SMP support for a9mpcore_clock_cleanup()

Mar 4, 2014:

11:16 PM Developer/SMP edited by JoelSherrill
Add right to TOC (diff)
9:54 PM Changeset in rtems [e6c87f7]4.11 by Joel Sherrill <joel.sherrill@…>
POSIX keys now enabled in all configurations. Formerly POSIX keys were only enabled when POSIX threads were enabled. Because they are a truly safe alternative to per-task variables in an SMP system, they are being enabled in all configurations.
9:32 PM GSoC edited by Youren Shen
/* Students' Proposals */ (diff)
6:48 PM GSoC edited by Json
/* Students' Proposals */ (diff)
6:46 PM GSoC edited by Json
/* Students' Proposals */ (diff)
12:44 PM Changeset in rtems [eafb040]4.11 by Sebastian Huber <sebastian.huber@…>
score: Add --enable-profiling configure option
12:16 PM Developer/Coding/Conventions edited by Sh
/* RTEMS Coding Style */ Inline functions (diff)
12:02 PM Changeset in rtems [825cb1f]4.11 by Sebastian Huber <sebastian.huber@…>
score: Delete _Thread_Dispatch_set_disable_level() This function was only used in some tests and can be replaced with other functions.
12:00 PM Changeset in rtems [b323e1fb]4.11 by Sebastian Huber <sebastian.huber@…>
tmtests/tm26: Fix deadlock for SMP configurations Some _Context_Switch() invocations end up in _Thread_Handler(). Create the right context for this function.

Mar 3, 2014:

7:54 PM Developer/SMP edited by Sh
/* Requirements */ Add link (diff)
7:52 PM Developer/SMP edited by Sh
/* Requirements */ Reference for phase-fair (diff)
6:38 PM Developer/SMP edited by Sh
Move TOC to the top (diff)
6:37 PM Developer/SMP edited by Sh
Beautify link (diff)
6:34 PM Developer/SMP edited by Sh
Restore requirements section (diff)
6:32 PM Developer/SMP edited by Sh
/* Requirements */ Add some requirements (diff)
3:47 PM Developer/SMP edited by Sh
/* RTEMS API Changes */ Add new semaphore attribute (diff)
9:18 AM Changeset in rtems [718124e]4.11 by Sebastian Huber <sebastian.huber@…>
rtems: Add RTEMS_INTERRUPT_REPLACE A new option RTEMS_INTERRUPT_REPLACE is introduced that permits updating the first interrupt handler for the registered interrupt vector and matching argument. If no match is found, the install function fails with RTEMS_UNSATISFIED. The Interrupt Manager Extension offers interrupt handlers with an argument pointer. It is impossible to update two words (handler and argument) atomically on most architectures. In order to avoid an SMP lock in bsp_interrupt_handler_dispatch() which would degrade the interrupt response time an alternative must be provided that makes it possible to tear-down interrupt sources without an SMP lock. Add RTEMS_INTERRUPT_REPLACE option to Interrupt Manager Extension. This enables a clean tear-down of interrupt sources on SMP configurations. Instead of an interrupt handler removal a replacement handler can be installed to silence an interrupt source. This can be used in contexts that allow no sophisticated synchronization (e.g. in atexit() or fatal handlers).
8:49 AM Changeset in rtems [e0609ac]4.11 by Sebastian Huber <sebastian.huber@…>
bsps: SMP support for generic interrupt support
8:09 AM Changeset in rtems [8b50a55]4.11 by Sebastian Huber <sebastian.huber@…>
score: Add _Atomic_Fence()
7:38 AM Changeset in rtems [a418b2f]4.11 by Sebastian Huber <sebastian.huber@…>
libnetworking: Typo

Feb 28, 2014:

6:14 PM Developer/SMP edited by JoelSherrill
/* Low-Level Broadcasts */ Add termios framework issue (diff)
4:17 PM Developer/SMP edited by JoelSherrill
/* Design Issues */ Add application impact (diff)
4:07 PM Developer/SMP edited by JoelSherrill
/* Future Directions */ (diff)

Feb 27, 2014:

9:20 PM Developer/Simulators/QEMU edited by André Marques
(diff)
9:11 PM Developer/Simulators/QEMU edited by André Marques
(diff)
7:32 AM Changeset in rtems [80186ca8]4.11 by Sebastian Huber <sebastian.huber@…>
bsp/leon3: Add and use cache register functions

Feb 26, 2014:

10:15 PM Developer/OpenProjects edited by Gedare
/* Executive (SuperCore?, SuperCoreCPU, libcpu): a.k.a. kernel */ (diff)
10:14 PM Developer/OpenProjects edited by Gedare
/* Executive (SuperCore?, SuperCoreCPU, libcpu): a.k.a. kernel */ (diff)
7:28 PM GSoC/2013/ParavirtualizationOfRTEMS edited by Phipse
added Paper of the 15th RTLWS (diff)
6:53 PM GSoC/2013/ParavirtualizationOfRTEMS edited by Phipse
merged remaining and open issues and named it open issues. (diff)
6:50 PM GSoC/2013/ParavirtualizationOfRTEMS edited by Phipse
added open issues sections (diff)
3:57 PM Changeset in rtems [2ef0328]4.11 by Jennifer Averett <jennifer.averett@…>
smptests: Add smppsxaffinity02. This method exercises the ability to dynamically get and set the affinity of POSIX threads. NOTE: There is no scheduler support for affinity. This is simply a data integrity test.
3:41 PM Changeset in rtems [f3e6b18]4.11 by Jennifer Averett <jennifer.averett@…>
smptests: Add smppsxaffinity01. This test exercises the ability to obtain and modify the affinity field of the POSIX thread attributes.
2:45 PM Changeset in rtems [6faf789]4.11 by Sebastian Huber <sebastian.huber@…>
bsps: Fix empty interrupt handler entry The vector number of spurious interrupts was wrong after the interrupt handler removal on SMP configurations.
12:12 PM Developer/OpenProjects edited by Sh
Atomic operations are now supported http://git.rtems.org/rtems/tree/cpukit/score/include/rtems/score/atomic.h (diff)
12:10 PM Developer/OpenProjects edited by Sh
All BSPs have now at least an empty cache manager http://git.rtems.org/rtems/commit/?id=0b9fd991a7b734102054b9d45785a16d10bc9c3c (diff)
11:59 AM Changeset in rtems [31494ab]4.11 by Sebastian Huber <sebastian.huber@…>
sptests/spcache01: Detect write-through cache
11:14 AM Changeset in rtems [c5b1e20]4.11 by Sebastian Huber <sebastian.huber@…>
bsp/leon3: Add L2C registers
10:31 AM Changeset in rtems [9ec4a48d]4.11 by Sebastian Huber <sebastian.huber@…>
bsp/leon3: Add L2 cache support
10:08 AM Changeset in rtems [e1d7bf0]4.11 by Sebastian Huber <sebastian.huber@…>
rtems: Add cache size functions Add rtems_cache_get_data_cache_size() and rtems_cache_get_instruction_cache_size().
10:00 AM Changeset in rtems [e7549ff4]4.11 by Sebastian Huber <sebastian.huber@…>
rtems: Use size_t for cache line size A cache line cannot have a negative size.
9:35 AM Changeset in rtems [5e8301d]4.11 by Sebastian Huber <sebastian.huber@…>
rtems: Cache manager documentation Move useful functions to the top of the file.
8:22 AM Changeset in rtems [b0553f47]4.11 by Ralf Kirchner <ralf.kirchner@…>
bsp/xilinx-zynq: Add arm-errata.h and arm-release-id.h
8:20 AM Changeset in rtems [f2bb3ccb]4.11 by Ralf Kirchner <ralf.kirchner@…>
bsp/realview-pbx-a9: Add arm-errata.h and arm-release-id.h
8:19 AM Changeset in rtems [f2a8b60]4.11 by Ralf Kirchner <ralf.kirchner@…>
bsp/raspberrypi: Add arm-errata.h and arm-release-id.h
8:17 AM Changeset in rtems [deccde3]4.11 by Ralf Kirchner <ralf.kirchner@…>
bsp/lpc32xx: Add arm-errata.h and arm-release-id.h
2:27 AM Changeset in rtems [4dc16ea] by Brian Norris <computersforpeace@…>
jffs2: fix unbalanced locking Li Zefan reported an unbalanced locking issue, found by his internal debugging feature on runtime. The particular case he was looking at doesn't lead to a deadlock, as the structure that this lock is embedded in is freed on error. But we should straighten out the error handling. Because several callers of jffs2_do_read_inode_internal() / jffs2_do_read_inode() already handle the locking/unlocking and inode clearing at their own level, let's just push any unlocks/clearing down to the caller. This consistency is much easier to verify. Reported-by: Li Zefan <lizefan@…> Cc: David Woodhouse <dwmw2@…> Cc: Artem Bityutskiy <artem.bityutskiy@…> Cc: Andrew Morton <akpm@…> Signed-off-by: Brian Norris <computersforpeace@…>
12:46 AM Developer/OpenProjects edited by Gedare
/* Executive (SuperCore?, SuperCoreCPU, libcpu): a.k.a. kernel */ (diff)
12:42 AM Developer/GSoC/ProjectManagement edited by Gedare
(diff)
12:41 AM Developer/GSoC/ProjectManagement edited by Gedare
/* Q&A */ (diff)
12:38 AM GSoC edited by Gedare
/* Student Information */ (diff)
12:22 AM GSoC edited by Gedare
(diff)
12:20 AM GSoC edited by Gedare
/* Students' Proposals */ (diff)
12:19 AM GSoC edited by Gedare
/* Students' Summer of Code Tracking Table */ (diff)
12:14 AM Developer/GSoC/ProjectManagement edited by Gedare
/* Q&A */ (diff)
12:13 AM Developer/GSoC/ProjectManagement edited by Gedare
/* update content to make current */ (diff)

Feb 25, 2014:

11:54 PM GSoC edited by Gedare
/* General Information */ Add link to last year's (2013) SOC page. (diff)
10:36 PM GSoC/GettingStarted edited by Gedare
/* Configure and Build RTEMS for SPARC/SIS */ (diff)
10:35 PM GSoC/GettingStarted edited by Gedare
/* Configure a Development Computer */ (diff)
10:34 PM GSoC/GettingStarted edited by Gedare
/* Configure a Development Computer */ (diff)
10:33 PM Developer/Tools/RSB edited by Gedare
/* Feedback from Students about using RSB for the GSoC Getting Started */ (diff)
10:32 PM GSoC/GettingStarted edited by Gedare
/* Configure a Development Computer */ (diff)
10:31 PM Developer/Tools/RSB edited by Gedare
/* Feedback from Students about using RSB for the GSoC Getting Started */ (diff)
10:30 PM Developer/Tools/RSB edited by Gedare
Add student feedback table (diff)
10:26 PM GSoC edited by Gedare
Update for year and fix some links that were broken from before. (diff)
10:23 PM GSoC created by Gedare
Regenerate page.
10:18 PM GSoC/2013 edited by Gedare
Gedare moved page RTEMSSummerOfCode to RTEMSSummerOfCode2013 without leaving a redirect: To save state reflective of 2013. (diff)

Feb 24, 2014:

4:06 PM Changeset in rtems [0a2096b]4.11 by Sebastian Huber <sebastian.huber@…>
bsp/leon3: Use ambapp_freq_get() for CPU counter
3:25 PM Changeset in rtems [dce7bba7]4.11 by Sebastian Huber <sebastian.huber@…>
bsps: Delete LEON3_FATAL_CPU_COUNTER_INIT
12:42 PM Changeset in rtems-testing [2631321]4.11 by Sebastian Huber <sebastian.huber@…>
sim-scripts/gdb-sim.in: Add _Terminate() support
11:45 AM Changeset in rtems [a4bc90af]4.11 by Sebastian Huber <sebastian.huber@…>
sparc: Fix CPU counter support The SPARC processors supported by RTEMS have no built-in CPU counter support. We have to use some hardware counter module for this purpose. The BSP must provide a 32-bit register which contains the current CPU counter value and a function for the difference calculation. It can use for example the GPTIMER instance used for the clock driver.
9:48 AM Changeset in rtems [64f4ac2]4.11 by Sebastian Huber <sebastian.huber@…>
bsp/leon3: Add new cache manager implementation The previous implementation used an instruction cache line size of 0, this is a bogus value. Use a instruction cache line size of 64 since the L2 cache may have a line size of 32 or 64. A greater value should cause no harm. Use a FLUSH operation for _CPU_cache_invalidate_instruction_range(). This is a preperation step to support the L2 cache.
9:13 AM Changeset in rtems [95d0c98]4.11 by Sebastian Huber <sebastian.huber@…>
score: Fix thread TLS area initialization Do not use _TLS_Size here since this will lead GCC to assume that this symbol is not 0 and the later > 0 test will be optimized away.
8:53 AM Changeset in rtems [07dc970]4.11 by Sebastian Huber <sebastian.huber@…>
sptests/spcpucounter01: Adjust test Adjust test to work with clock driver based CPU counters. They have a period equal to the clock tick interval.
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