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#737 closed defect (fixed)

cpu_asm multi-instruction sequence in branch slot warning

Reported by: gregory.menke Owned by: Joel Sherrill
Priority: lowest Milestone: 2
Component: bsps Version: 4.7
Severity: normal Keywords:
Cc: bugs@…, gregory.menke@… Blocked By:


Fixes gcc warning about instructions in branch delay slot when compiling cpu_asm.S. Warnings refered to multi-instruction sequences that load the address of dword counters into a register for later load/save. If the branch is taken, the sequences are partically executed, causing the destination registor to be partially loaded. This is not a problem because the branch target is going to load registers as it desires, overwriting the partial load. Fix is to add a nop after the branches, forcing the register loads out of the delay slot.


All mips bsp's

Change History (1)

comment:1 Changed on 01/03/05 at 16:42:27 by gregory.menke

Status: assignedclosed

State-Changed-From-To: open->closed
State-Changed-Why: Committed as cpu_asm.S 1.36

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