bsps/i386: TSC calibration inaccurate

[Jan Sommer]

The current implementation of the TSC calibration during startup yields inaccurate results.

There are 2 issues:

1. Rounding error:

The calibrate_tsc function calibrates for 1s by waiting for rtems_clock_get_ticks_per_second() ticks via the PIT.

The PIT has a frequency of 1193182 Hz. For a rtems tick of 1ms this yields 1193. Waiting for 1s means then waiting for 1193000 PIT ticks (instead of the full 1193182).
For a 1 GHz TSC clock this would yield already ~150 kHz less then the correct TSC frequency.

2. Waiting for the first loop at begin of timer period

for (i = rtems_clock_get_ticks_per_second() * pc386_isrs_per_tick;
     i != 0; --i ) {
  /* We know we've just completed a tick when timer goes from low to high */
  then_lsb = then_msb = 0xff;
  do {                            <== First loop does not start at begin of clock period 
    READ_8254(now_lsb, now_msb); 
    if ((then_msb < now_msb) ||
        ((then_msb == now_msb) && (then_lsb < now_lsb)))
      break;
    then_lsb = now_lsb;
    then_msb = now_msb;
  } while (1);
}

This can yield deviations of several MHz for the TSC frequency.
For example, for a tested CPU with a TSC frequency of 19167.1 MHz yields a calibration result of 1912.3 MHz.

Proposed solution

• Just wait 1193182 PIT ticks for 1 s instead of a number of rtems ticks
• Use the raw timer value instead of waiting for clock ticks.

[Joel Sherrill]

Any progress on this?

[Jan Sommer]

Seems I created this ticket twice by accident. It is a duplicate of #4455 which was fixed by this commit ​https://git.rtems.org/rtems/commit/?id=93f96455957a943f1a4c17655a09612a93a34bf4 .