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#3807 closed defect (fixed)
Windows / MSYS2 build error for Sparc/SIS
| Reported by: | Jeff Mayes | Owned by: | Jiri Gaisler |
|---|---|---|---|
| Priority: | normal | Milestone: | |
| Component: | arch/sparc | Version: | 5 |
| Severity: | normal | Keywords: | |
| Cc: | Blocked By: | ||
| Blocking: |
Description
TEMS Tools Project - Source Builder Error Report
Build: error: building s2xwm1
Command Line: ../source-builder/sb-set-builder --prefix=C:/msys64/home/mayes/dev/rtems/5 5/rtems-sparc
Python: 2.7.16 (default, Aug 15 2019, 17:51:40) [GCC 9.2.0 64 bit (AMD64)]
git://git.rtems.org/rtems-source-builder.git/origin/5ecf0181b494db3c93a5d88cc9e91a663ff47583
Windows
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...
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x86_64-w64-mingw32-gcc -DHAVE_CONFIG_H -I. -DFAST_UART -O2 -g -pipe -I/c/msys64/home/mayes/dev/rtems/rsb/rtems/b1uild/tmp/sb-mayes/5s/c/msys64/home/mayes/dev/rtems/5/include -MT leon3.o -MD -MP -MF .deps/leon3.Tpo -c -o leon3.o leon3.c
leon3.c:145:8: error: unknown type name 'uint'
145 | static uint xcpu;
|
~
mv -f .deps/grlib.Tpo .deps/grlib.Po
make[1]: * [Makefile:381: leon3.o] Error 1
make[1]: * Waiting for unfinished jobs....
make[1]: Leaving directory '/c/msys64/home/mayes/dev/rtems/rsb/rtems/build/s2xwm1/sis-2.17'
make: * [Makefile:260: all] Error 2
shell cmd failed: sh -ex /c/msys64/home/mayes/dev/rtems/rsb/rtems/build/s2xwm1/do-build
error: building s2xwm1
Change History (5)
comment:1 follow-up: 3 Changed on 11/02/19 at 16:27:21 by Jiri Gaisler
comment:2 Changed on 11/02/19 at 18:56:14 by Jiri Gaisler <jiri@…>
| Resolution: | → fixed |
|---|---|
| Status: | assigned → closed |
comment:3 follow-up: 4 Changed on 11/03/19 at 00:33:57 by Chris Johns
Replying to Jiri Gaisler:
Maybe we should not build sis by default when building the sparc and riscv tool-chains, but only manually like we do for other simulators (qemu, spike ...)?
We have documented for a number of years building sparc and using the erc32 BSP as a starting point to play with RTEMS. This evolved because the SIS has always been available and it has always worked. Changing this would mean we would need to review the docmentation.
comment:4 Changed on 11/03/19 at 10:09:29 by Jiri Gaisler
Replying to Chris Johns:
Replying to Jiri Gaisler:
Maybe we should not build sis by default when building the sparc and riscv tool-chains, but only manually like we do for other simulators (qemu, spike ...)?
We have documented for a number of years building sparc and using the erc32 BSP as a starting point to play with RTEMS. This evolved because the SIS has always been available and it has always worked. Changing this would mean we would need to review the docmentation.
Makes sense. I just don't want to break someones RSB build because I made some less-than-brilliant fix ... :-)
comment:5 Changed on 11/03/19 at 15:53:46 by Joel Sherrill
I am strongly opposed to turning off SIS. Chris is right that it is the RTEMS on-ramp platform. I appreciate your concern but sis is important.
This is a typo, it should say 'static int xcpu'. I will make a patch and push it.
Maybe we should not build sis by default when building the sparc and riscv tool-chains, but only manually like we do for other simulators (qemu, spike ...)?