#3682 assigned project

Add BSP for Xilinx Zynq UltraScale+ MPSoC platform

Reported by: Sebastian Huber Owned by: Sebastian Huber
Priority: normal Milestone: 5.1
Component: arch/arm Version: 5
Severity: normal Keywords:
Cc: Blocked By:
Blocking:

Description

The goal is to add RTEMS support for the Cortex-A53 processors in AArch32 mode. There are currently no plans to support the Cortex-R5 or the AArch64 mode.

Change History (6)

comment:1 Changed on Mar 26, 2019 at 9:26:36 AM by Nils Hölscher

Hi,

I am interested in realizing this Project during GSoC 2019.
Hoping to find interested mentors.

Best,
Nils Hölscher

comment:2 Changed on Mar 27, 2019 at 6:36:53 AM by Sebastian Huber

This project is probably too complex for a GSoC project. I am not available as a mentor.

comment:3 Changed on Apr 11, 2019 at 5:29:34 AM by Jeff Kubascik <jeff.kubascik@…>

In b0c420b9/rtems:

bsp/zynq-uart: Remove zynq_uart_instances from header

This variable is BSP specific and should be removed from the driver
header file.

Update #3682.

comment:4 Changed on Apr 11, 2019 at 5:29:38 AM by Jeff Kubascik <jeff.kubascik@…>

In b004430/rtems:

bsp/zynq-uart: Move Zynq UART driver to shared directory

This driver will be shared with the xilinx-zynqmp BSP.

Update #3682.

comment:5 Changed on Apr 11, 2019 at 5:29:42 AM by Jeff Kubascik <jeff.kubascik@…>

In 677d5167/rtems:

bsp/xilinx-zynqmp: Stub out Xilinx MPSoC BSP

Source files were copied from xilinx-zynq.

Update #3682.

comment:6 Changed on Apr 11, 2019 at 5:29:46 AM by Jeff Kubascik <jeff.kubascik@…>

In 77f9a1b/rtems:

bsp/xilinx-zynqmp: Implement Ultra96 target

Modifications to get xilinx-zynqmp BSP working on an Ultra96 board.

Update #3682.

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