arm.h/ARM_HAS_CLZ

[Ralf Corsepius]

arm.h conditionally defines ARM_HAS_CLZ.

In doc/supplements/arm/cpumodel.t, it is documented as:
The macro @code{ARM_HAS_CLZ} is set to 1 to indicate that
the architectural version has the @code{clz} instruction.
On ARM architectural version 5 and above, the count
leading zeroes instruction (@code{clz}) is available and
can be used to speed up the find first bit operation.
The use of this instruction significantly speeds up the
scheduling associated with a thread blocking.

However,

• The only place inside of the source-tree, where ARM_HAS_CLZ is used is the BITFIELD-macros in cpukit/score/cpu/arm/rtems/score/cpu.h, where it is applied to raise an #error, instead of using the generic bitfield code.

• The implementation of setting up ARM_HAS_CLZ probably is doubtful. At least, gcc-3.x (up to current gcc-CVS trunk) supports CLZ for the armv5 (grep for clz in gcc/config/arm.md).

IMO, raising an #error when a generic implementation is available is not acceptable for a release.

Release:
RTEMS-4-6-branch

[Jay Monkman]

State-Changed-From-To: open->closed
State-Changed-Why: I removed the ARM_HAS_CLZ macro and references to it. The
change was checked into HEAD (4-6-99-2)