Opened on 03/14/18 at 21:06:00
Closed on 03/16/18 at 13:24:45
#3340 closed defect (fixed)
gen83xx warning for macros redefined
Reported by: | Joel Sherrill | Owned by: | Sebastian Huber |
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Priority: | normal | Milestone: | 5.1 |
Component: | arch/powerpc | Version: | 5 |
Severity: | normal | Keywords: | |
Cc: | Blocked By: | ||
Blocking: |
Description
log/powerpc-hsc_cm01.log:/home/joel/rtems-work/rtems-testing/rtems/rtems/bsps/powerpc/gen83xx/include/bsp/hwreg_vals.h:244:0: warning: "FPGA_START" redefined
log/powerpc-hsc_cm01.log:/home/joel/rtems-work/rtems-testing/rtems/rtems/bsps/powerpc/gen83xx/include/bsp/hwreg_vals.h:246:0: warning: "FPGA_SIZE" redefined
Looking at the code, it is pretty clear that the macros are redefined. Unfortunately one of the three has a different value the second time:
========================================
/* fpga BCSR register */
#define FPGA_START 0xF8000000
#define FPGA_SIZE 0x8000
#define FPGA_END (FPGA_START+FPGA_SIZE-1)
/*
- working values for various registers, used in start/start.S */
/* fpga config 16 MB size */
#define FPGA_CONFIG_START 0xF8000000
#define FPGA_CONFIG_SIZE 0x01000000
/* fpga register 8 MB size */
#define FPGA_REGISTER_START 0xF9000000
#define FPGA_REGISTER_SIZE 0x00800000
/* fpga fifo 8 MB size */
#define FPGA_FIFO_START 0xF9800000
#define FPGA_FIFO_SIZE 0x00800000
#define FPGA_START (FPGA_CONFIG_START)
fpga window size 32 MByte
#define FPGA_SIZE (0x02000000)
#define FPGA_END (FPGA_START+FPGA_SIZE-1)
========================================
Change History (2)
comment:1 Changed on 03/14/18 at 21:06:25 by Joel Sherrill
Owner: | changed from sebastian to Sebastian Huber |
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comment:2 Changed on 03/16/18 at 13:24:45 by Sebastian Huber <sebastian.huber@…>
Resolution: | → fixed |
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Status: | assigned → closed |
In 9b61342/rtems: