#3080 closed defect (fixed)

Infinite loop in SPARC rtems_invalidate_multiple_instruction_lines()

Reported by: Sebastian Huber Owned by: Sebastian Huber
Priority: normal Milestone: 5.1
Component: arch/sparc Version: 5
Severity: normal Keywords:
Cc: Blocked By:
Blocking:

Description

A

#define CPU_INSTRUCTION_CACHE_ALIGNMENT 0

is not a good idea in case the default range functions are used.

Change History (3)

comment:1 Changed on Jul 19, 2017 at 1:56:33 PM by Sebastian Huber <sebastian.huber@…>

Resolution: fixed
Status: assignedclosed

In 7ed8ad0/rtems:

bsps/sparc: Fix cache support

Fix infinite loop in rtems_invalidate_multiple_instruction_lines().
Implement this function.

Close #3080.

comment:2 Changed on Oct 10, 2017 at 6:53:06 AM by Sebastian Huber

Component: bspsarch/sparc

comment:3 Changed on Nov 9, 2017 at 6:27:14 AM by Sebastian Huber

Milestone: 4.12.05.1

Milestone renamed

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