Opened on 09/06/16 at 07:10:13
Closed on 10/02/16 at 08:47:15
#2782 closed defect (fixed)
Cache manager for ARM and libdl RTL for most of architectures are broken for 4.11 branch.
Reported by: | Pavel Pisa | Owned by: | Pavel Pisa <pisa@…> |
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Priority: | high | Milestone: | 4.11 |
Component: | lib/dl | Version: | 4.11 |
Severity: | critical | Keywords: | |
Cc: | Blocked By: | ||
Blocking: |
Description
Cache manager for ARM and libdl RTL for most of architectures are broken for 4.11 branch.
The reason is that instruction cache has to be invalidated for most cache enabled architectures after code modifications because local L1 instruction caches is not included in data cache synchronization protocols/snooping.
Affected architectures are ARM, probably most of PowerPC, SPARC, MIPS.
Not affected x86 which solve even instruction cache synchronization on hardware level.
Change History (2)
comment:1 Changed on 09/06/16 at 07:12:13 by Pavel Pisa
Summary: | Cache → Cache manager for ARM and libdl RTL for most of architectures are broken for 4.11 branch. |
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comment:2 Changed on 10/02/16 at 08:47:15 by Pavel Pisa <pisa@…>
Owner: | set to Pavel Pisa <pisa@…> |
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Resolution: | → fixed |
Status: | new → closed |
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