#2775 closed defect (fixed)
ARM CP15 arm_cp15_set_translation_table_entries fails if TTB in read-only memory
Reported by: | Chris Johns | Owned by: | Chris Johns <chrisj@…> |
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Priority: | normal | Milestone: | 5.1 |
Component: | arch/arm | Version: | 5 |
Severity: | normal | Keywords: | ARM |
Cc: | Blocked By: | ||
Blocking: |
Description
If the TTB is held in the text section and the section is set to read-only, and cached when booting no section change happen at run time because the table cannot be written too to change. The table cannot be changed unless the MMU is disabled.
I suggest the MMU be disabled, the table updated and then the MMU enabled.
Note, the issue only shows up on real hardware, qemu does not complain.
Change History (10)
comment:1 Changed on 08/14/16 at 21:51:15 by Pavel Pisa
comment:2 Changed on 08/14/16 at 22:38:09 by Chris Johns
I agree it is problematic for a running system. I had not seen the note in your git commit about adding the MMU tables section. I have a patch which add this to the default set. It removes the current issue we are facing.
comment:3 Changed on 08/14/16 at 23:23:05 by Chris Johns <chrisj@…>
Owner: | set to Chris Johns <chrisj@…> |
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Resolution: | → fixed |
Status: | new → closed |
comment:4 Changed on 08/17/16 at 07:34:22 by Sebastian Huber
Resolution: | fixed |
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Status: | closed → reopened |
This change breaks a lot of ARM BSPs since bsp_translation_table_end is not defined.
comment:5 Changed on 08/17/16 at 07:41:49 by Chris Johns
If you have a list I can add them to https://git.rtems.org/rtems-tools/tree/tester/rtems/rtems-bsps.ini and then they can be built.
Thanks.
comment:6 Changed on 08/17/16 at 08:18:38 by Sebastian Huber
You can use "/path/to/rtems/configure --target=arm-rtems4.12 --enable-maintainer-mode --enable-tests=samples" to build all ARM BSPs.
comment:7 Changed on 08/23/16 at 01:14:16 by Chris Johns <chrisj@…>
Resolution: | → fixed |
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Status: | reopened → closed |
comment:8 Changed on 05/11/17 at 07:31:02 by Sebastian Huber
Milestone: | 4.12 → 4.12.0 |
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comment:9 Changed on 10/10/17 at 06:32:23 by Sebastian Huber
Component: | libcpu → arch/arm |
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comment:10 Changed on 11/09/17 at 06:27:14 by Sebastian Huber
Milestone: | 4.12.0 → 5.1 |
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Milestone renamed
I think that disabling of MMU at runtime is highly problematic. You need to stop all parallel processes to ensure that all modifications held in cache are propagated to memory and then switch MMU off. If multiple CPUs are running (SMP) then there is almost no way hot to ensure fully synchronized case for at least some ARM architecture members. Coherency is maintained through MMU and guaranteed only for cache clean through VMA. The cache clean by level+set+way does not need to generate required snoop operations.
On the other hand, ARM architecture is prepared and operations are optimized for runtime page tables updates and switching and there are defined operations sequences to ensure correct page tables changes propagations in ARM architecture manuals. So I vote for this direction.