#2438 closed defect (fixed)

ARM cache problem after libdl load

Reported by: Patrick Gauvin Owned by: Chris Johns
Priority: normal Milestone: 4.11.1
Component: lib/dl Version: 4.11
Severity: normal Keywords: libdl, ARM, ZedBoard, Zynq
Cc: Chris Johns, Pavel Pisa Blocked By:
Blocking:

Description

  • RTEMS Version: Branch "4.11", commit edf77328c1813e15a293841dd33995fb11bd4bec
  • System type: ARM Cortex-A9, Xilinx Zynq 7020, xilinx_zynq_zedboard BSP
  • Compiler toolchain version: GCC 4.9.3, Newlib 2.2.0.20150423, Binutils 2.24
  • RTEMS configure options: --target=arm-rtems4.11 --enable-rtemsbsp="xilinx_zynq_a9_qemu xilinx_zynq_zedboard" --enable-posix --prefix=$HOME/development/rtems/4.11 --enable-tests
  • Code used to reproduce: testsuites/libtests/dl01

Expected Behavior

Successful execution of the loaded function from dl-o1.o. Note that the dl01 example runs successfully in QEMU with the xilinx_zynq_a9_qemu BSP.

Actual Behavior

System crash on execution of loaded code. After the first branch is taken to loaded code (dl-load.c:54), GDB indicates that the processor is executing instructions at the correct address, but they do not behave as expected, eventually leading to the system rebooting.

After discussion on the users mailing list, it was found that flushing the data cache and invalidating the instruction cache before calling the loaded function resulted in its successful execution. This was tested by adding the following at dl-load.c:54:

rtems_cache_flush_entire_data();
rtems_cache_invalidate_entire_instruction();

Change History (3)

comment:1 Changed on Nov 16, 2015 at 11:53:15 PM by Chris Johns

Patrick has added more information on the user list .. https://lists.rtems.org/pipermail/users/2015-November/029557.html

comment:2 Changed on May 20, 2016 at 9:12:41 PM by Pavel Pisa

For archival purpose store there my idea from the list

If the area is smaller than cache size then use of regions operations should take shorter and generally means less unrelated latencies to unrelated code/data

void rtems_cache_flush_multiple_data_lines( const void *, size_t );

void rtems_cache_invalidate_multiple_instruction_lines( const void *, size_t );

comment:3 Changed on Jul 21, 2016 at 12:40:29 AM by Pavel Pisa <pisa@…>

Resolution: fixed
Status: newclosed

In 8709aa0459217822ce4118416c8547ed08d96ac1/rtems:

libdl/rtl-obj.c: synchronize cache after code relocation.

Memory content changes caused by relocation has to be
propagated to memory/cache level which is used/snooped
during instruction cache fill.

Closes #2438

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