#1249 closed defect (fixed)

Cache Support Not Enabled on SPARC/LEON3

Reported by: Joel Sherrill Owned by: Joel Sherrill
Priority: normal Milestone: 4.8
Component: build Version: 4.7
Severity: normal Keywords:
Cc: Blocked By:
Blocking:

Description

I have found a very simple problem that needs to be corrected:
in c/src/lib/libcpu/sparc/configure.ac the line

AM_CONDITIONAL(has_instruction_cache, test "$RTEMS_CPU_MODEL" = "leon1" \

test "$RTEMS_CPU_MODEL" = "leon2" )

should be modified to also allow for the instruction cache in the leon3!!

This impacts 4.6, 4.7 and the CVS head.

Attachments (1)

pr1249.diff (616 bytes) - added by Joel Sherrill on Jul 31, 2007 at 5:57:26 PM.
Add leon3 to cache configure logic

Download all attachments as: .zip

Change History (2)

Changed on Jul 31, 2007 at 5:57:26 PM by Joel Sherrill

Attachment: pr1249.diff added

Add leon3 to cache configure logic

comment:1 Changed on Jul 31, 2007 at 7:24:39 PM by Joel Sherrill

Resolution: fixed
Status: newclosed

Patch applied to 4.6, 4.7, and CVS head.

Note: See TracTickets for help on using tickets.