#1237 closed defect (fixed)

Interrupt during dispatch may fill up task stack

Reported by: Johan Zandin Owned by: Joel Sherrill
Priority: normal Milestone: 4.8
Component: unspecified Version: 4.5
Severity: critical Keywords:
Cc: johan.zandin@…, mattias.holm@… Blocked By:
Blocking:

Description

In the following scenario, the stack of a task may be completely filled:
1) During a context switch from task A to task B, an interrupt occurs within the last critical region of _Thread_Dispatch (the one where _Thread_Dispatch_disable_level is cleared).
2) As soon as ISR:s are enabled, the interrupt causes a new context switch (either back to task A or to some other task) before the dispatching of task B is fully completed.
3) During step 2, RTEMS adds a new frame to the stack of task B.
4) Step 1 to 3 are repeated several times, without task B being completely dispatched a single time inbetween. Each time, RTEMS adds a new frame to the task B stack, without removing the previous ones.
5) Finally the stack of task B is full and the software starts trashing the preceding part of the memory instead.

Attachments (2)

sparc-2.diff (8.3 KB) - added by Joel Sherrill on 04/16/07 at 10:32:12.
Revised and cleaned up patch which appears to work with 4.7
pr1237-46.diff (35.1 KB) - added by Joel Sherrill on 05/10/07 at 17:44:04.
slightly different patch for 4.6

Download all attachments as: .zip

Change History (6)

comment:1 Changed on 04/10/07 at 11:34:29 by Johan Zandin

Cc: Johan Zandin added

comment:2 Changed on 04/16/07 at 10:27:15 by Mattias Holm

Cc: Mattias Holm added

Changed on 04/16/07 at 10:32:12 by Joel Sherrill

Attachment: sparc-2.diff added

Revised and cleaned up patch which appears to work with 4.7

Changed on 05/10/07 at 17:44:04 by Joel Sherrill

Attachment: pr1237-46.diff added

slightly different patch for 4.6

comment:3 Changed on 05/10/07 at 17:44:43 by Joel Sherrill

Resolution: fixed
Status: newclosed

The attached patches should be correct and applied to 4.6, 4.7, and the CVS head.

comment:4 Changed on 10/10/17 at 06:35:44 by Sebastian Huber

Component: miscunspecified
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