source: rtems/cpukit/score/cpu/riscv

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Diff Rev Age Author Log Message
(edit) @b74353e   07/20/18 06:06:46 Sebastian Huber score: Add _CPU_Instruction_no_operation() This helps to reduce the … 5
(edit) @42f2fdfd   07/20/18 05:56:43 Sebastian Huber score: Move context validation declarations The context validation … 5
(edit) @248ca7a   07/20/18 07:10:29 Sebastian Huber score: Remove obsolete CPU port defines 5
(edit) @bca36d9   07/06/18 09:07:20 Sebastian Huber riscv: Add LADDR assembler define An address must be loaded to a … 5
(edit) @dd32e2b2   07/06/18 06:12:40 Sebastian Huber riscv: Implement CPU counter Update #3433. 5
(edit) @e755782   07/03/18 07:54:47 Sebastian Huber riscv: Clear reservations See also RISC-V User-Level ISA V2.3, … 5
(edit) @e07b51a7   07/02/18 13:21:36 Sebastian Huber riscv: Fix fcsr initialization Update #3433. 5
(edit) @79d69ae   06/29/18 10:08:01 Sebastian Huber riscv: Fix SMP context switch support Update #3433. 5
(edit) @109bc1c7   06/29/18 06:07:02 Sebastian Huber riscv: Add SMP context switch support Update #3433. 5
(edit) @52352387   06/28/18 07:32:26 Sebastian Huber riscv: Add floating-point support Update #3433. 5
(edit) @995e91e8   06/28/18 06:21:44 Sebastian Huber riscv: Fix global construction Update #3433. 5
(edit) @694e79a0   06/28/18 06:20:47 Sebastian Huber riscv: Add TLS support Update #3433. 5
(edit) @afb60eb   06/27/18 12:46:06 Sebastian Huber riscv: Remove dead code Update #3433. 5
(edit) @e43994d   06/27/18 08:05:50 Sebastian Huber riscv: Optimize context switch and interrupts Save/restore … 5
(edit) @a8188730   06/27/18 07:43:39 Sebastian Huber riscv: Fix _CPU_Context_Initialize() prototype Update #3433. 5
(edit) @dffc08c   06/28/18 11:55:29 Sebastian Huber riscv: Fix interrupt save/restore Update #3433. 5
(edit) @40f81ce6   06/27/18 10:18:09 Sebastian Huber riscv: Implement _CPU_Context_validate() Update #3433. 5
(edit) @71af1a4   06/27/18 10:17:21 Sebastian Huber riscv: Make some CPU port defines visible to asm Move SREG and LREG … 5
(edit) @8f035cb   06/27/18 06:57:08 Sebastian Huber riscv: Implement _CPU_Context_volatile_clobber() Update #3433. 5
(edit) @b706b4a   06/27/18 06:54:13 Sebastian Huber riscv: Remove mstatus from thread context The mstatus register … 5
(edit) @2987c4f   06/27/18 06:43:25 Sebastian Huber riscv: Remove x8 initialization The RISC-V psABI … 5
(edit) @04698eb   06/27/18 06:42:48 Sebastian Huber riscv: Properly align the thread stack Update #3433. 5
(edit) @a49a3c8e   06/27/18 06:37:34 Sebastian Huber riscv: Do not clear thread context Do not clear the complete thread … 5
(edit) @9510742   06/27/18 06:35:13 Sebastian Huber riscv: Fix CPU_STACK_ALIGNMENT According to the RISC-V psABI … 5
(edit) @98f051e   06/27/18 06:08:10 Sebastian Huber riscv: Remove RISCV_GCC_RED_ZONE_SIZE The current ABI says that there … 5
(edit) @9704d86f   06/26/18 06:53:28 Sebastian Huber riscv: Enable interrupts during dispatch after ISR The code sequence … 5
(edit) @0fd8287   06/26/18 05:15:28 Sebastian Huber riscv: Add _CPU_Get_current_per_CPU_control() Update #3433. 5
(edit) @3be4478f   06/26/18 05:13:28 Sebastian Huber riscv: Avoid namespace pollution Remove <rtems/score/riscv-utility.h> … 5
(edit) @bc3bdf2   06/28/18 12:59:38 Sebastian Huber riscv: Optimize and fix interrupt disable/enable Use the atomic read … 5
(edit) @2086948a   05/11/18 04:54:59 Sebastian Huber riscv: Add dummy SMP support Update #3433. 5
(edit) @7c3b0df1   06/22/18 11:30:49 Sebastian Huber riscv: Implement ISR set/get level Fix prototypes. Update #3433. 5
(edit) @9b2ef07f   06/22/18 11:30:21 Sebastian Huber bsp/riscv: Load global pointer Update #3433. 5
(edit) @52f4fb6   06/26/18 05:48:06 Sebastian Huber riscv: Format assembler files Use tabs to match the GCC generated … 5
(edit) @511dc4b   06/19/18 07:09:51 Sebastian Huber Rework initialization and interrupt stack support Statically … 5
(edit) @c8df844   06/19/18 12:59:51 Sebastian Huber score: Add CPU_INTERRUPT_STACK_ALIGNMENT Add CPU port define for the … 5
(edit) @65f868c   05/23/18 12:17:25 Sebastian Huber Add _CPU_Counter_frequency() Add rtems_counter_frequency() API … 5
(edit) @f35c3be9   04/16/18 05:34:18 Sebastian Huber Remove register keyword from public header files The following code … 5
(edit) @5b88ec5   03/08/18 23:23:21 joel riscv/include/rtems/score/types.h: Eliminate this file Updates #3327. 5
(edit) @2afb22b   12/23/17 07:18:56 Chris Johns Remove make preinstall A speciality of the RTEMS build system was the … 5
(edit) @c3897697   11/29/17 16:32:18 joel riscv/rtems/score/cpu.h: Use RTEMS_NO_RETURN not deprecated … 5
(add) @11ff3a9   10/27/17 04:18:40 Hesham Almatary cpukit: RISC-V - make riscv32 code work for riscv64 - v2 * Use … 5
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