source: rtems/bsps/riscv

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Diff Rev Age Author Log Message
(edit) @db8f598   04/26/21 12:00:41 Sebastian Huber build: Remove old build system Close #3250. Close #4081.
(edit) @8b65b574   07/28/21 12:41:32 Sebastian Huber score: Canonicalize _CPU_Fatal_halt() Move _CPU_Fatal_halt() …
(edit) @c7b4eca7   07/27/21 07:58:43 Sebastian Huber bsps/irq: bsp_interrupt_facility_initialize() Do not return a status …
(edit) @85a3785   07/06/21 17:00:20 Sebastian Huber bsps/irq: bsp_interrupt_set_affinity() Return a status code for …
(edit) @23ec04c   07/06/21 16:39:57 Sebastian Huber bsps/irq: bsp_interrupt_get_affinity() Return a status code for …
(edit) @32f5a195   06/29/21 12:06:03 Sebastian Huber bsps/irq: bsp_interrupt_vector_disable() Return a status code for …
(edit) @bc86a5fa   06/29/21 12:01:17 Sebastian Huber bsps/irq: bsp_interrupt_vector_enable() Return a status code for …
(edit) @deb5afb   07/05/21 11:28:02 Sebastian Huber bsps/irq: Add rtems_interrupt_is_pending() Add a default …
(edit) @eebecd0   06/28/21 07:36:29 Sebastian Huber bsps/irq: Add rtems_interrupt_get_attributes() Add a default …
(edit) @9832652c   06/28/21 06:44:49 Sebastian Huber bsps/irq: Add rtems_interrupt_raise() Add rtems_interrupt_raise_on() …
(edit) @781213f9   06/28/21 06:20:53 Sebastian Huber bsps/irq: Add rtems_interrupt_vector_is_enabled() Add a default …
(edit) @94cf67c   06/19/21 10:48:27 Sebastian Huber bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAX This define is no longer …
(edit) @cd5573c   06/19/21 10:40:57 Sebastian Huber bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNT Assert …
(edit) @af73b7b6   06/18/21 05:37:18 Sebastian Huber bsps/irq: Remove BSP_INTERRUPT_VECTOR_MIN Remove …
(edit) @af69a869   06/10/21 13:01:49 Sebastian Huber grlib: Add apbuart_outbyte_wait()
(edit) @85febe7b   06/10/21 12:51:38 Sebastian Huber grlib: Remove NL -> CR in apbuart_outbyte_polled() This is already …
(edit) @2c07f24   06/10/21 11:04:13 Sebastian Huber grlib: Add ambapp_plb() Replace the global variable ambapp_plb with a …
(edit) @e10dec0   04/30/21 13:47:10 Sebastian Huber bsps: Support RTEMS_NOINIT in linkcmds Update #3866.
(edit) @c90fa83   02/25/21 02:09:56 vijay bsps: Remove networking drivers Update #3850
(edit) @1343fb5f   03/19/21 11:12:09 jan.sommer bsps/riscv: Add per cpu clock interrupt - Fixes failure of test smpclock01
(edit) @570992dc   02/09/21 07:17:21 Sebastian Huber bsp/riscv: Re-license to BSD-2-Clause Change license to BSD-2-Clause …
(edit) @b361eabd   01/28/21 05:28:33 Sebastian Huber bsps: Replace bsp_specs with an empty file This fixes an issue with …
(edit) @9eb9813   01/26/21 14:29:00 Sebastian Huber bsps: Add missing DWARF 5 sections Sort alphabetically.
(edit) @33c12d5   01/25/21 10:19:21 Sebastian Huber bsps: Support DWARF 5 sections GCC 11 uses DWARF 5 by default.
(edit) @b4c29b5   10/24/20 14:43:49 Jiri Gaisler Add networking support for griscv bsp * Only GRETH device supported …
(edit) @e1a0e0c3   10/08/20 05:50:10 Sebastian Huber grlib: Add and use irqmp_has_timestamp() Replace …
(edit) @e8450a6c   09/22/20 15:38:12 Sebastian Huber bsps/riscv: Add bsp_fdt_map_intr() This function is required by libbsd.
(edit) @4897a82d   09/15/20 07:07:29 Hesham.Almatary riscv: Make sifive_test finisher 4 bytes QEMU is now stricter with …
(edit) @2786b0a   09/13/20 14:13:14 Sebastian Huber bsps/riscv: Use far jump to boot_card() Use a far jump to avoid …
(edit) @764ea578   09/06/20 21:07:29 Hesham.Almatary htif_console_handler is defined in htif.c closes #4069.
(edit) @d556af36   08/31/20 12:12:14 Sebastian Huber bsps: Always install IPI in SMP configs The inter-processor interrupt …
(edit) @d35722e6   04/08/20 09:52:45 Sebastian Huber bsps/riscv: Fix multiple definition 5
(edit) @0161b93d   03/03/20 18:23:53 Sebastian Huber imfs: Replace devfs with an IMFS specialization Add a simplified path … 5
(edit) @c344e58   02/02/20 10:00:54 Sebastian Huber Use RTEMS_SYSINIT_ORDER_LAST_BUT_5 Use RTEMS_SYSINIT_ORDER_LAST_BUT_5 … 5
(edit) @ffa1153   12/14/19 20:36:09 Sebastian Huber bsps: Add RamEnd? to linker command files Update #3838. 5
(edit) @f4fda72   11/29/19 18:01:00 Sebastian Huber Regenerate headers.am 5
(edit) @ae554670   11/14/19 10:20:41 Sebastian Huber bsp/riscv: Fix format and warnings Update #3785. 5
(edit) @e9ae7436   11/14/19 10:15:19 Sebastian Huber bsp/riscv: Fix use of uninitialized integer 5
(edit) @df9426f   11/14/19 10:08:28 Sebastian Huber bsp/riscv: riscv_get_core_frequency() Always provide this function. … 5
(edit) @044687d3   03/31/19 12:49:19 Hesham.Almatary bsps/riscv: UART - Read reg-shift from DTB to properly set/get registers 5
(edit) @94481ce   10/24/19 12:05:07 Hesham.Almatary riscv: Add new BSP cfg variants to be built with llvm/clang 5
(edit) @ce5988e   10/23/19 11:52:54 Hesham.Almatary riscv: Add new offending input sections to the linker script 5
(edit) @7f0c41c7   10/23/19 11:50:55 Hesham.Almatary riscv: Add NOLOAD directive to the .work section ld.lld defaults … 5
(edit) @f462bcb   10/23/19 11:43:17 Hesham.Almatary riscv: Address differences in the linkerscript between GNU LD and … 5
(edit) @ca82ded7   10/23/19 11:37:12 Hesham.Almatary riscv: Generate linkcmds.base from the shared linkcmds.base.in This … 5
(edit) @a7f5e42c   10/22/19 10:20:05 pragnesh.patel riscv: add freedom E310 Arty A7 bsp Added support for Sifive Freedom … 5
(edit) @ad87de4   04/11/19 06:54:29 Sebastian Huber score: Rename _SMP_Get_processor_count() Rename … 5
(edit) @f9219db   04/05/19 06:16:05 Sebastian Huber rtems: Add rtems_scheduler_get_processor_maximum() Add … 5
(edit) @828276b   03/05/19 06:58:18 Sebastian Huber bsps: Adjust shared Doxygen groups Update #3706. 5
(edit) @c991eeec   03/04/19 14:32:15 Sebastian Huber bsps: Adjust bsp.h Doxygen groups Update #3706. 5
(edit) @212663be   02/26/19 14:44:50 Sebastian Huber bsps: Adjust architecture Doxygen groups - Use CamelCase as it is … 5
(edit) @568490a   02/08/19 11:40:45 Jiri Gaisler griscv: add additional cpu configurations * Also switch default … 5
(edit) @d3d4e77   01/18/19 11:37:55 Jiri Gaisler riscv: add griscv bsp Update #3678. 5
(edit) @9aee88a   01/08/19 13:43:02 Sebastian Huber bsp/riscv: Clear boot command line 5
(edit) @ff081aee   11/06/18 15:58:02 Sebastian Huber score: Rename interrupt stack symbols Rename * … 5
(edit) @9cda6f29   09/17/18 12:12:07 Hesham.Almatary riscv: Allow platforms with no PLIC to proceed Spike simulator and … 5
(edit) @141d502   08/02/18 11:23:26 Sebastian Huber bsp/riscv: Add missing BSP variant Update #3433. 5
(edit) @4c740de   08/02/18 12:13:25 Sebastian Huber bsp/riscv: Fix build with RTEMS_SMP undefined Update #3433. 5
(edit) @3d11c1e   08/01/18 08:06:37 Sebastian Huber bsp/riscv: Fix a synchronization issue for PLIC Update #3433. 5
(edit) @dee2ebb   08/01/18 09:15:55 Sebastian Huber bsp/riscv: Remove unused variable Update #3433. 5
(edit) @56b0387   08/01/18 06:13:39 Sebastian Huber bsp/riscv: Add NS16750 support to console driver Update #3433. 5
(edit) @529154b   07/31/18 07:15:00 Sebastian Huber bsp/riscv: Initialize FPU depending on ISA Initialize fcsr to zero … 5
(edit) @48cbd63   07/31/18 05:19:33 Sebastian Huber bsp/riscv: Fix clock driver Do not assume that mtime is zero at boot … 5
(edit) @44c2d393   07/27/18 13:04:38 Sebastian Huber bsp/riscv: Fix inter-processor interrupts The previous version worked … 5
(edit) @cfc9573   07/27/18 12:47:17 Sebastian Huber riscv: Rework CPU counter support Update #3433. 5
(edit) @581a0f88   07/24/18 12:47:05 Sebastian Huber bsp/riscv: Use interrupt driven NS16550 driver Update #3433. 5
(edit) @adede135   07/24/18 11:27:54 Sebastian Huber bsp/riscv: Add PLIC support Update #3433. 5
(edit) @bd560386   07/23/18 11:50:02 Sebastian Huber bsp/riscv: Add simple SMP support to clock driver This is a hack. … 5
(edit) @6552ba8   07/24/18 08:10:12 Sebastian Huber bsp/riscv: Use CPU counter btimer Update #3433. 5
(edit) @447fd89   07/20/18 11:11:04 Sebastian Huber bsp/riscv: Add basic SMP startup Update #3433. 5
(edit) @6b9ef09   07/20/18 08:57:59 Sebastian Huber riscv: Add CLINT and PLIC support The CLINT and PLIC need some … 5
(edit) @f5fd8eb   07/19/18 13:12:11 Sebastian Huber bsps/riscv: Update linker-symbols.h Update #3433. 5
(edit) @dda6e06   07/19/18 12:45:47 Sebastian Huber bsp/riscv: Add reset via for SiFive? Test Finisher Update #3433. 5
(edit) @3a263a9b   07/19/18 12:38:44 Sebastian Huber bsp/riscv: Add and use riscv_fdt_get_address() Update #3433. 5
(edit) @7fe4855   07/19/18 11:58:12 Sebastian Huber bsp/riscv: Fix HTIF warnings Update #3433. 5
(edit) @8db3f0e   07/19/18 10:11:19 Sebastian Huber riscv: Rework exception handling Remove … 5
(edit) @1a19239   07/06/18 09:20:31 Sebastian Huber bsp/riscv: Add console support for NS16550 devices Update #3433. 5
(edit) @31f90a2   07/06/18 11:52:22 Sebastian Huber bsp/riscv: Simplify printk() support This is a prepartion to add … 5
(edit) @bca36d9   07/06/18 09:07:20 Sebastian Huber riscv: Add LADDR assembler define An address must be loaded to a … 5
(edit) @dd32e2b2   07/06/18 06:12:40 Sebastian Huber riscv: Implement CPU counter Update #3433. 5
(edit) @d3dff40   07/04/18 14:15:22 Sebastian Huber bsps: Update headers.am 5
(edit) @0fd8287   06/26/18 05:15:28 Sebastian Huber riscv: Add _CPU_Get_current_per_CPU_control() Update #3433. 5
(edit) @3be4478f   06/26/18 05:13:28 Sebastian Huber riscv: Avoid namespace pollution Remove <rtems/score/riscv-utility.h> … 5
(edit) @ff7b104   06/27/18 05:47:33 Sebastian Huber bsp/riscv: Remove bsp_interrupt_handler_default() It duplicated the … 5
(edit) @cdfed94f   06/25/18 09:12:24 Sebastian Huber bsp/riscv: Rework clock driver Use device tree provided timebase … 5
(edit) @1232cd46   06/25/18 06:44:16 Sebastian Huber bsp/riscv: Add device tree support for console Update #3433. 5
(edit) @c558cc4   06/28/18 11:04:58 Sebastian Huber bsp/riscv: Fix vector table for lp64 Update #3433. 5
(edit) @5f5c450   06/22/18 11:58:11 Sebastian Huber bsp/riscv: Add SMP startup synchronization Update #3433. 5
(edit) @fe2cd01b   06/22/18 06:01:48 Sebastian Huber bsp/riscv: Add device tree support Update #3433. 5
(edit) @2086948a   05/11/18 04:54:59 Sebastian Huber riscv: Add dummy SMP support Update #3433. 5
(edit) @9b2ef07f   06/22/18 11:30:21 Sebastian Huber bsp/riscv: Load global pointer Update #3433. 5
(edit) @b0ee789   06/22/18 09:14:07 Sebastian Huber bsp/riscv: Use memset() to clear .bss Update #3433. 5
(edit) @52f4fb6   06/26/18 05:48:06 Sebastian Huber riscv: Format assembler files Use tabs to match the GCC generated … 5
(edit) @fef0a41   06/22/18 07:03:19 Sebastian Huber bsp/riscv: Do not clear integer registers at start There is no need … 5
(edit) @38024362   06/22/18 09:00:01 Sebastian Huber bsp/riscv: Fix some warnings Update #3444. 5
(edit) @16d905f   06/22/18 05:51:08 Sebastian Huber bsp/riscv: Add BSP options to define RAM region Update #3433. 5
(edit) @f3da074a   06/22/18 05:10:44 Sebastian Huber bsp/riscv: Add new BSP variants The latest RISC-V tool chain … 5
(edit) @6f5d88a   06/22/18 05:06:57 Sebastian Huber bsp/riscv_generic: Rename to "riscv" Update #3433. 5
(edit) @41e2295   06/22/18 05:04:12 Sebastian Huber bsp/riscv_generic: Use standard optimization flags Update #3433. 5
(edit) @92388f6   05/28/18 11:14:12 Hesham.Almatary bsps/riscv_generic: Rename and add variants Add BSP variants to match … 5
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