Index: bsps/sparc64/niagara/start/bspinit.S
===================================================================
--- bsps/sparc64/niagara/start/bspinit.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
+++ bsps/sparc64/niagara/start/bspinit.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
@@ -0,0 +1,35 @@
+/*
+ * bspinit.S
+ *
+ * COPYRIGHT (c) 2010 Gedare Bloom.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+/*
+ *
+ * BSP specific initialization for Sparc64 RTEMS -- sun4v BSP
+ *
+ * This code defines start code specific to the sun4v BSP
+ */
+
+#include <rtems/asm.h>
+#include <rtems/score/cpu.h>
+
+#define STACK_WINDOW_SAVE_AREA_SIZE (16*8)
+
+.section .text
+
+PUBLIC(_BSP_init)
+  .global _BSP_init
+  SYM(_BSP_init):
+
+  save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp  
+
+
+
+  ret
+  restore
+
Index: bsps/sparc64/shared/start/start.S
===================================================================
--- bsps/sparc64/shared/start/start.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
+++ bsps/sparc64/shared/start/start.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
@@ -0,0 +1,151 @@
+#
+# Copyright (c) 2006 Martin Decky
+# Copyright (c) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+/*
+ * start.S
+ *
+ * Start code for Sparc64 RTEMS
+ *
+ * This is based on the boot.S file of the HelenOS sparc64 architecture.
+ * http://www.helenos.org/
+ * ${helenos}/boot/arch/sparc64/loader/boot.S
+ *
+ * Modifications for the RTEMS executive are 
+ *   COPYRIGHT (c) 2010 Gedare Bloom.
+ *   COPYRIGHT (c) 2010 Eugen Leontie.
+ */
+
+#include <rtems/asm.h>
+#include <rtems/score/cpu.h>
+
+#define PSTATE_PRIV_BIT	4
+
+.register %g2, #scratch
+.register %g3, #scratch
+.register %g6, #scratch
+.register %g7, #scratch
+
+.section BOOTSTRAP, "ax"
+
+PUBLIC(_start)
+  .global _start
+  SYM(_start):
+    start:
+    b 1f
+    nop
+
+    /*
+     * This header forces SILO to load the image at 0x4000.
+     * More precisely, SILO will think this is an old version of Linux.
+     */
+    .ascii "HdrS"
+    .word 0
+    .half 0
+    .half 0
+    .half 0
+    .half 0
+    .global silo_ramdisk_image
+    silo_ramdisk_image:
+    .word 0
+    .global silo_ramdisk_size
+    silo_ramdisk_size:
+    .word 0
+
+    .align 8
+    1:	
+    /*
+     * Disable interrupts and disable address masking.
+     */
+    wrpr %g0, PSTATE_PRIV_BIT, %pstate
+
+    wrpr %g0, SPARC_NUMBER_OF_REGISTER_WINDOWS - 2, %cansave	! set maximum saveable windows
+    wrpr %g0, 0, %canrestore		! get rid of windows we will never need again
+    wrpr %g0, 0, %otherwin			! make sure the window state is consistent
+    wrpr %g0, SPARC_NUMBER_OF_REGISTER_WINDOWS - 1, %cleanwin	! prevent needless clean_window traps for kernel
+
+  /* g4 needs to be cleared for gcc */
+  mov %g0, %g4
+
+  /* Clear the bss */
+	setx	SYM(bss_start), %l0, %g2	! g2 = start of bss
+	setx	SYM(_end), %l0, %g3		    ! g3 = end of bss
+zerobss:
+	stx	%g0, [%g2]
+	add	%g2, 8, %g2
+	cmp	%g2, %g3
+	bleu,a	zerobss
+	nop
+
+  /* Install stack */
+setstack:
+	set SYM(StackStart), %sp
+	add %sp, -STACK_BIAS, %sp
+
+  /* BSP-specific pre-bootcard initializations */
+  call SYM(_BSP_init)
+  nop
+
+	setx ofw_cif, %l0, %l1
+ 
+	call ofw_init		! initialize OpenFirmware
+	stx %o4, [%l1]
+
+  call bootstrap
+  nop
+
+
+  /* Set up ISR handler for interrupt enable/disable */
+	setx SYM(syscall), %l0, %o1
+	setx param_space, %l0, %o2
+	call SYM(_CPU_ISR_install_raw_handler)
+	mov 0x100, %o0 
+
+  /* Don't need to copy initialized data to RAM--link puts all in RAM already */
+
+	mov	%g0, %o0		! clear command line passed to main
+	call SYM(boot_card)
+	sub	%sp, 0x60, %sp		! make room on stack (necessary?)
+
+  call SYM(halt)
+  nop
+
+halted:	nop
+	    b SYM(halted)
+
+.section BOOTSTRAP
+  .align CPU_ALIGNMENT
+  .space 32768 - SPARC64_MINIMUM_STACK_FRAME_SIZE ! 32K boot stack grows down
+  .global StackStart
+  StackStart:
+    .space SPARC64_MINIMUM_STACK_FRAME_SIZE ! initial stack frame
+
+.section BOOTSTRAP
+  .align CPU_ALIGNMENT
+  param_space:
+  	.space 8
Index: bsps/sparc64/shared/start/trap_table.S
===================================================================
--- bsps/sparc64/shared/start/trap_table.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
+++ bsps/sparc64/shared/start/trap_table.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
@@ -0,0 +1,155 @@
+/*
+ * trap_table.S
+ *
+ * trap code for Sparc64 RTEMS.
+ *
+ *  COPYRIGHT (c) 2010 Gedare Bloom.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ * 
+ *  This code defines the space for the trap table used by sun4u.
+ */
+
+#include <rtems/asm.h>
+#include <rtems/score/cpu.h>
+#include <traptable.h>
+
+.register %g2, #scratch
+
+.macro JUMP_TO_TRAP offset
+  sethi %hi(real_trap_table), %g1;
+  sethi %hi(\offset), %g2;
+  or    %g1, %lo(real_trap_table), %g1;
+  or    %g2, %lo(\offset), %g2;          ! g2 = offset
+  ldx   [%g1], %g1;                      ! g1 = real_trap_table
+  add   %g1, %g2, %g1;                   ! g1 = real_trap_table[offset]
+  jmpl  %g1, %g0;
+  nop;
+.endm
+
+! space to save a pointer to the real trap table
+.section  .data
+  .align 8
+  .global real_trap_table
+  SYM(real_trap_table):
+  .space 8
+
+.section .text
+  .align (TABLE_SIZE)
+PUBLIC(trap_table)
+  SYM(trap_table):
+
+  .irp idx, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, \
+    11, 12, 13, 14, 15, 16, 17, 18, 19, 20, \
+    21, 22, 23, 24, 25, 26, 27, 28, 29, 30, \
+    31, 32, 33, 34, 35, 36, 37, 38, 39, 40, \
+    41, 42, 43, 44, 45, 46, 47, 48, 49, 50, \
+    51, 52, 53, 54, 55, 56, 57, 58, 59, 60, \
+    61, 62, 63, 64, 65, 66, 67, 68, 69, 70, \
+    71, 72, 73, 74, 75, 76, 77, 78, 79, 80, \
+    81, 82, 83, 84, 85, 86, 87, 88, 89, 90, \
+    91, 92, 93, 94, 95, 96, 97, 98, 99, 100, \
+    101, 102, 103, 104, 105, 106, 107, 108, 109, 110, \
+    111, 112, 113, 114, 115, 116, 117, 118, 119, 120, \
+    121, 122, 123, 124, 125, 126, 127, 128, 129, 130, \
+    131, 132, 133, 134, 135, 136, 137, 138, 139, 140, \
+    141, 142, 143, 144, 145, 146, 147, 148, 149, 150, \
+    151, 152, 153, 154, 155, 156, 157, 158, 159, 160, \
+    161, 162, 163, 164, 165, 166, 167, 168, 169, 170, \
+    171, 172, 173, 174, 175, 176, 177, 178, 179, 180, \
+    181, 182, 183, 184, 185, 186, 187, 188, 189, 190, \
+    191, 192, 193, 194, 195, 196, 197, 198, 199, 200, \
+    201, 202, 203, 204, 205, 206, 207, 208, 209, 210, \
+    211, 212, 213, 214, 215, 216, 217, 218, 219, 220, \
+    221, 222, 223, 224, 225, 226, 227, 228, 229, 230, \
+    231, 232, 233, 234, 235, 236, 237, 238, 239, 240, \
+    241, 242, 243, 244, 245, 246, 247, 248, 249, 250, \
+    251, 252, 253, 254, 255, 256, 257, 258, 259, 260, \
+    261, 262, 263, 264, 265, 266, 267, 268, 269, 270, \
+    271, 272, 273, 274, 275, 276, 277, 278, 279, 280, \
+    281, 282, 283, 284, 285, 286, 287, 288, 289, 290, \
+    291, 292, 293, 294, 295, 296, 297, 298, 299, 300, \
+    301, 302, 303, 304, 305, 306, 307, 308, 309, 310, \
+    311, 312, 313, 314, 315, 316, 317, 318, 319, 320, \
+    321, 322, 323, 324, 325, 326, 327, 328, 329, 330, \
+    331, 332, 333, 334, 335, 336, 337, 338, 339, 340, \
+    341, 342, 343, 344, 345, 346, 347, 348, 349, 350, \
+    351, 352, 353, 354, 355, 356, 357, 358, 359, 360, \
+    361, 362, 363, 364, 365, 366, 367, 368, 369, 370, \
+    371, 372, 373, 374, 375, 376, 377, 378, 379, 380, \
+    381, 382, 383, 384, 385, 386, 387, 388, 389, 390, \
+    391, 392, 393, 394, 395, 396, 397, 398, 399, 400, \
+    401, 402, 403, 404, 405, 406, 407, 408, 409, 410, \
+    411, 412, 413, 414, 415, 416, 417, 418, 419, 420, \
+    421, 422, 423, 424, 425, 426, 427, 428, 429, 430, \
+    431, 432, 433, 434, 435, 436, 437, 438, 439, 440, \
+    441, 442, 443, 444, 445, 446, 447, 448, 449, 450, \
+    451, 452, 453, 454, 455, 456, 457, 458, 459, 460, \
+    461, 462, 463, 464, 465, 466, 467, 468, 469, 470, \
+    471, 472, 473, 474, 475, 476, 477, 478, 479, 480, \
+    481, 482, 483, 484, 485, 486, 487, 488, 489, 490, \
+    491, 492, 493, 494, 495, 496, 497, 498, 499, 500, \
+    501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511
+
+    .org trap_table + ((\idx)*32)
+      JUMP_TO_TRAP( ((\idx)*32) );
+  .endr
+
+  .irp idx, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, \
+    11, 12, 13, 14, 15, 16, 17, 18, 19, 20, \
+    21, 22, 23, 24, 25, 26, 27, 28, 29, 30, \
+    31, 32, 33, 34, 35, 36, 37, 38, 39, 40, \
+    41, 42, 43, 44, 45, 46, 47, 48, 49, 50, \
+    51, 52, 53, 54, 55, 56, 57, 58, 59, 60, \
+    61, 62, 63, 64, 65, 66, 67, 68, 69, 70, \
+    71, 72, 73, 74, 75, 76, 77, 78, 79, 80, \
+    81, 82, 83, 84, 85, 86, 87, 88, 89, 90, \
+    91, 92, 93, 94, 95, 96, 97, 98, 99, 100, \
+    101, 102, 103, 104, 105, 106, 107, 108, 109, 110, \
+    111, 112, 113, 114, 115, 116, 117, 118, 119, 120, \
+    121, 122, 123, 124, 125, 126, 127, 128, 129, 130, \
+    131, 132, 133, 134, 135, 136, 137, 138, 139, 140, \
+    141, 142, 143, 144, 145, 146, 147, 148, 149, 150, \
+    151, 152, 153, 154, 155, 156, 157, 158, 159, 160, \
+    161, 162, 163, 164, 165, 166, 167, 168, 169, 170, \
+    171, 172, 173, 174, 175, 176, 177, 178, 179, 180, \
+    181, 182, 183, 184, 185, 186, 187, 188, 189, 190, \
+    191, 192, 193, 194, 195, 196, 197, 198, 199, 200, \
+    201, 202, 203, 204, 205, 206, 207, 208, 209, 210, \
+    211, 212, 213, 214, 215, 216, 217, 218, 219, 220, \
+    221, 222, 223, 224, 225, 226, 227, 228, 229, 230, \
+    231, 232, 233, 234, 235, 236, 237, 238, 239, 240, \
+    241, 242, 243, 244, 245, 246, 247, 248, 249, 250, \
+    251, 252, 253, 254, 255, 256, 257, 258, 259, 260, \
+    261, 262, 263, 264, 265, 266, 267, 268, 269, 270, \
+    271, 272, 273, 274, 275, 276, 277, 278, 279, 280, \
+    281, 282, 283, 284, 285, 286, 287, 288, 289, 290, \
+    291, 292, 293, 294, 295, 296, 297, 298, 299, 300, \
+    301, 302, 303, 304, 305, 306, 307, 308, 309, 310, \
+    311, 312, 313, 314, 315, 316, 317, 318, 319, 320, \
+    321, 322, 323, 324, 325, 326, 327, 328, 329, 330, \
+    331, 332, 333, 334, 335, 336, 337, 338, 339, 340, \
+    341, 342, 343, 344, 345, 346, 347, 348, 349, 350, \
+    351, 352, 353, 354, 355, 356, 357, 358, 359, 360, \
+    361, 362, 363, 364, 365, 366, 367, 368, 369, 370, \
+    371, 372, 373, 374, 375, 376, 377, 378, 379, 380, \
+    381, 382, 383, 384, 385, 386, 387, 388, 389, 390, \
+    391, 392, 393, 394, 395, 396, 397, 398, 399, 400, \
+    401, 402, 403, 404, 405, 406, 407, 408, 409, 410, \
+    411, 412, 413, 414, 415, 416, 417, 418, 419, 420, \
+    421, 422, 423, 424, 425, 426, 427, 428, 429, 430, \
+    431, 432, 433, 434, 435, 436, 437, 438, 439, 440, \
+    441, 442, 443, 444, 445, 446, 447, 448, 449, 450, \
+    451, 452, 453, 454, 455, 456, 457, 458, 459, 460, \
+    461, 462, 463, 464, 465, 466, 467, 468, 469, 470, \
+    471, 472, 473, 474, 475, 476, 477, 478, 479, 480, \
+    481, 482, 483, 484, 485, 486, 487, 488, 489, 490, \
+    491, 492, 493, 494, 495, 496, 497, 498, 499, 500, \
+    501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511
+
+    .org trap_table + 512*32 + ((\idx)*32)
+      JUMP_TO_TRAP( 512*32 + ((\idx)*32) );
+  .endr
+
Index: bsps/sparc64/usiii/start/bspinit.S
===================================================================
--- bsps/sparc64/usiii/start/bspinit.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
+++ bsps/sparc64/usiii/start/bspinit.S	(revision fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc)
@@ -0,0 +1,53 @@
+/*
+ *  BSP specific initialization for Sparc64 RTEMS -- sun4u BSP
+ *
+ *  This code defines start code specific to the sun4u BSP
+ */
+
+/*
+ *  COPYRIGHT (c) 2010 Gedare Bloom.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/asm.h>
+#include <rtems/score/cpu.h>
+
+#include <traptable.h>
+
+#define LSU_CR_IM_MASK  (0x0004)  /* bit 2 */
+#define LSU_CR_DM_MASK  (0x0008)  /* bit 3 */
+
+#define STACK_WINDOW_SAVE_AREA_SIZE (16*8)
+
+.register %g2, #scratch
+.register %g3, #scratch
+
+.section .text
+
+PUBLIC(_BSP_init)
+.global _BSP_init
+  SYM(_BSP_init):
+  save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+
+  ! copy the tba
+  sethi %hi(real_trap_table), %o0
+  rdpr  %tba, %o2
+  stx   %o2, [%o0 + %lo(real_trap_table)]
+
+!  /* copy firmware trap table so that RTEMS can install ISR handlers */
+!  setx  SYM(trap_table), %l0, %o0
+!  rdpr  %tba, %o1
+!  set TABLE_SIZE, %o2
+!  call memcpy
+!  nop
+
+  mov %g0, %o0
+  call _take_mmu
+  nop
+
+  ret
+  restore
+
