Changeset fa40ec52 in rtems


Ignore:
Timestamp:
May 29, 2014, 7:09:00 PM (5 years ago)
Author:
Daniel Hellstrom <daniel@…>
Branches:
4.11, master
Children:
fad33860
Parents:
33ba808
git-author:
Daniel Hellstrom <daniel@…> (05/29/14 19:09:00)
git-committer:
Daniel Hellstrom <daniel@…> (10/09/14 07:07:22)
Message:

SPARC BSPs: added CPU aware interrupt ctrl operations

The LEON2 and ERC32 maps the new macros to CPU0 since they do not
support SMP. With the LEON3 a specific CPU's interrupt controller
registers can be modified using macros.

Location:
c/src/lib/libbsp/sparc
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/erc32/include/erc32.h

    r33ba808 rfa40ec52  
    406406  } while (0)
    407407
    408 /* Make all SPARC BSPs have common macros for interrupt handling */
     408/* Make all SPARC BSPs have common macros for interrupt handling on local CPU */
    409409#define BSP_Clear_interrupt(_source) ERC32_Clear_interrupt(_source)
    410410#define BSP_Force_interrupt(_source) ERC32_Force_interrupt(_source)
     
    418418        ERC32_Restore_interrupt(_source, _previous)
    419419
     420/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
     421#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
     422        BSP_Is_interrupt_masked(_source)
     423#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
     424        BSP_Unmask_interrupt(_source)
     425#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
     426        BSP_Mask_interrupt(_source)
     427#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
     428        BSP_Disable_interrupt(_source, _prev)
     429#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
     430        BSP_Cpu_Restore_interrupt(_source, _previous)
     431
    420432/*
    421433 *  The following macros attempt to hide the fact that the General Purpose
  • c/src/lib/libbsp/sparc/leon2/include/leon.h

    r33ba808 rfa40ec52  
    363363        LEON_Restore_interrupt(_source, _previous)
    364364
     365/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
     366#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
     367        BSP_Is_interrupt_masked(_source)
     368#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
     369        BSP_Unmask_interrupt(_source)
     370#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
     371        BSP_Mask_interrupt(_source)
     372#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
     373        BSP_Disable_interrupt(_source, _prev)
     374#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
     375        BSP_Cpu_Restore_interrupt(_source, _previous)
     376
    365377/*
    366378 *  Each timer control register is organized as follows:
  • c/src/lib/libbsp/sparc/leon3/include/leon.h

    r33ba808 rfa40ec52  
    157157  (LEON3_IrqCtrl_Regs->ipend & (1 << (_source)))
    158158
    159 #define LEON_Is_interrupt_masked( _source ) \
     159#define LEON_Cpu_Is_interrupt_masked( _source, _cpu ) \
    160160  do {\
    161      (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & (1 << (_source))); \
     161     (LEON3_IrqCtrl_Regs->mask[_cpu] & (1 << (_source))); \
    162162   } while (0)
    163163
    164 #define LEON_Mask_interrupt( _source ) \
     164#define LEON_Cpu_Mask_interrupt( _source, _cpu ) \
    165165  do { \
    166166    rtems_interrupt_lock_context _lock_context; \
    167167    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
    168      LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  &= ~(1 << (_source)); \
     168     LEON3_IrqCtrl_Regs->mask[_cpu]  &= ~(1 << (_source)); \
    169169    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
    170170  } while (0)
    171171
    172 #define LEON_Unmask_interrupt( _source ) \
     172#define LEON_Cpu_Unmask_interrupt( _source, _cpu ) \
    173173  do { \
    174174    rtems_interrupt_lock_context _lock_context; \
    175175    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
    176     LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  |= (1 << (_source)); \
     176    LEON3_IrqCtrl_Regs->mask[_cpu]  |= (1 << (_source)); \
    177177    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
    178178  } while (0)
    179179
    180 #define LEON_Disable_interrupt( _source, _previous ) \
     180#define LEON_Cpu_Disable_interrupt( _source, _previous, _cpu ) \
    181181  do { \
    182182    rtems_interrupt_lock_context _lock_context; \
    183183    uint32_t _mask = 1 << (_source); \
    184184    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
    185      (_previous) = LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]; \
    186      LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = _previous & ~_mask; \
     185     (_previous) = LEON3_IrqCtrl_Regs->mask[_cpu]; \
     186     LEON3_IrqCtrl_Regs->mask[_cpu] = _previous & ~_mask; \
    187187    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
    188188    (_previous) &= _mask; \
    189189  } while (0)
    190190
    191 #define LEON_Restore_interrupt( _source, _previous ) \
     191#define LEON_Cpu_Restore_interrupt( _source, _previous, _cpu ) \
    192192  do { \
    193193    rtems_interrupt_lock_context _lock_context; \
    194194    uint32_t _mask = 1 << (_source); \
    195195    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
    196       LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = \
    197         (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & ~_mask) | (_previous); \
     196      LEON3_IrqCtrl_Regs->mask[_cpu] = \
     197        (LEON3_IrqCtrl_Regs->mask[_cpu] & ~_mask) | (_previous); \
    198198    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
    199199  } while (0)
     200
     201/* Map single-cpu operations to local CPU */
     202#define LEON_Is_interrupt_masked( _source ) \
     203  LEON_Cpu_Is_interrupt_masked(_source, _LEON3_Get_current_processor())
     204
     205#define LEON_Mask_interrupt(_source) \
     206  LEON_Cpu_Mask_interrupt(_source, _LEON3_Get_current_processor())
     207
     208#define LEON_Unmask_interrupt(_source) \
     209  LEON_Cpu_Unmask_interrupt(_source, _LEON3_Get_current_processor())
     210
     211#define LEON_Disable_interrupt(_source, _previous) \
     212  LEON_Cpu_Disable_interrupt(_source, _previous, _LEON3_Get_current_processor())
     213
     214#define LEON_Restore_interrupt(_source, _previous) \
     215  LEON_Cpu_Restore_interrupt(_source, _previous, _LEON3_Get_current_processor())
    200216
    201217/* Make all SPARC BSPs have common macros for interrupt handling */
     
    211227        LEON_Restore_interrupt(_source, _previous)
    212228
     229/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
     230#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
     231        LEON_Cpu_Is_interrupt_masked(_source, _cpu)
     232#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
     233        LEON_Cpu_Unmask_interrupt(_source, _cpu)
     234#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
     235        LEON_Cpu_Mask_interrupt(_source, _cpu)
     236#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
     237        LEON_Cpu_Disable_interrupt(_source, _prev, _cpu)
     238#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
     239        LEON_Cpu_Restore_interrupt(_source, _previous, _cpu)
     240
    213241/*
    214242 *  Each timer control register is organized as follows:
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