Changeset f8958d9 in rtems


Ignore:
Timestamp:
Feb 11, 2011, 8:54:08 AM (9 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.11, master
Children:
05d72d5
Parents:
e4a2a21f
Message:

2011-02-11 Ralf Corsépius <ralf.corsepius@…>

  • cpu.c, rtems/score/mips.h: Use "asm" instead of "asm" for improved c99-compliance.
Location:
cpukit/score/cpu/mips
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/mips/ChangeLog

    re4a2a21f rf8958d9  
     12011-02-11      Ralf Corsépius <ralf.corsepius@rtems.org>
     2
     3        * cpu.c, rtems/score/mips.h:
     4        Use "__asm__" instead of "asm" for improved c99-compliance.
     5
    162011-01-04      Joel Sherrill <joel.sherrill@oarcorp.com>
    27
  • cpukit/score/cpu/mips/cpu.c

    re4a2a21f rf8958d9  
    316316#if (__mips == 3) || (__mips == 32)
    317317   for( ; ; )
    318      asm volatile("wait"); /* use wait to enter low power mode */
     318     __asm__ volatile("wait"); /* use wait to enter low power mode */
    319319#elif __mips == 1
    320320   for( ; ; )
  • cpukit/score/cpu/mips/rtems/score/mips.h

    re4a2a21f rf8958d9  
    117117#define mips_get_sr( _x ) \
    118118  do { \
    119     asm volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
     119    __asm__ volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
    120120  } while (0)
    121121
     
    123123  do { \
    124124    register unsigned int __x = (_x); \
    125     asm volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
     125    __asm__ volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
    126126  } while (0)
    127127
     
    133133#define mips_get_cause( _x ) \
    134134  do { \
    135     asm volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
     135    __asm__ volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
    136136  } while (0)
    137137
     
    140140  do { \
    141141    register unsigned int __x = (_x); \
    142     asm volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
     142    __asm__ volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
    143143  } while (0)
    144144
     
    152152#define mips_get_dcic( _x ) \
    153153  do { \
    154     asm volatile( "mfc0 %0, $7; nop" : "=r" (_x) : ); \
     154    __asm__ volatile( "mfc0 %0, $7; nop" : "=r" (_x) : ); \
    155155  } while (0)
    156156
     
    159159  do { \
    160160    register unsigned int __x = (_x); \
    161     asm volatile( "mtc0 %0, $7; nop" : : "r" (__x) ); \
     161    __asm__ volatile( "mtc0 %0, $7; nop" : : "r" (__x) ); \
    162162  } while (0)
    163163
     
    172172#define mips_get_bpcrm( _x, _y ) \
    173173  do { \
    174     asm volatile( "mfc0 %0, $3; nop" : "=r" (_x) : ); \
    175     asm volatile( "mfc0 %0, $11; nop" : "=r" (_y) : ); \
     174    __asm__ volatile( "mfc0 %0, $3; nop" : "=r" (_x) : ); \
     175    __asm__ volatile( "mfc0 %0, $11; nop" : "=r" (_y) : ); \
    176176  } while (0)
    177177
     
    181181    register unsigned int __x = (_x); \
    182182    register unsigned int __y = (_y); \
    183     asm volatile( "mtc0 %0, $11; nop" : : "r" (__y) ); \
    184     asm volatile( "mtc0 %0, $3; nop" : : "r" (__x) ); \
     183    __asm__ volatile( "mtc0 %0, $11; nop" : : "r" (__y) ); \
     184    __asm__ volatile( "mtc0 %0, $3; nop" : : "r" (__x) ); \
    185185  } while (0)
    186186
     
    197197#define mips_get_bdarm( _x, _y ) \
    198198  do { \
    199     asm volatile( "mfc0 %0, $5; nop" : "=r" (_x) : ); \
    200     asm volatile( "mfc0 %0, $9; nop" : "=r" (_y) : ); \
     199    __asm__ volatile( "mfc0 %0, $5; nop" : "=r" (_x) : ); \
     200    __asm__ volatile( "mfc0 %0, $9; nop" : "=r" (_y) : ); \
    201201  } while (0)
    202202
     
    206206    register unsigned int __x = (_x); \
    207207    register unsigned int __y = (_y); \
    208     asm volatile( "mtc0 %0, $9; nop" : : "r" (__y) ); \
    209     asm volatile( "mtc0 %0, $5; nop" : : "r" (__x) ); \
     208    __asm__ volatile( "mtc0 %0, $9; nop" : : "r" (__y) ); \
     209    __asm__ volatile( "mtc0 %0, $5; nop" : : "r" (__x) ); \
    210210  } while (0)
    211211
     
    224224#define mips_get_fcr31( _x ) \
    225225  do { \
    226     asm volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
     226    __asm__ volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
    227227  } while(0)
    228228
     
    231231  do { \
    232232    register unsigned int __x = (_x); \
    233     asm volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
     233    __asm__ volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
    234234  } while(0)
    235235
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