Changeset f81b295 in rtems

Timestamp:

Oct 30, 2007, 8:57:38 PM (13 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.9, 5, master

Children:

3dd61288

Parents:

b83b754e

Message:

2007-10-30 Joel Sherrill <joel.sherrill@…>

• include/mpc5200.h: Fix constants off by one nibble.

Location:

c/src/lib/libbsp/powerpc/gen5200

Files:

• ChangeLog (modified) (1 diff)
• include/mpc5200.h (modified) (1 diff)

c/src/lib/libbsp/powerpc/gen5200/ChangeLog

@@ +1 @@
+2007-10-30      Joel Sherrill <joel.sherrill@oarcorp.com>
+
+        * include/mpc5200.h: Fix constants off by one nibble.
+
 2007-10-30      Joel Sherrill <joel.sherrill@oarcorp.com>
 

c/src/lib/libbsp/powerpc/gen5200/include/mpc5200.h

@@ -579 +579 @@
         #define GPIO_SIST_SINT_1_PSC3_5_PIN_STATUS 0x02000000
         #define GPIO_SIST_SINT_0_PSC3_4_PIN_STATUS 0x01000000
-        #define GPIO_SIST_SINT_7_ETH_16_PIN_VALUE  0x08000000
-        #define GPIO_SIST_SINT_6_ETH_15_PIN_VALUE  0x04000000
-        #define GPIO_SIST_SINT_5_ETH_14_PIN_VALUE  0x02000000
-        #define GPIO_SIST_SINT_4_ETH_13_PIN_VALUE  0x01000000
-        #define GPIO_SIST_SINT_3_USB1_9_PIN_VALUE  0x00800000
-        #define GPIO_SIST_SINT_2_PSC3_8_PIN_VALUE  0x00400000
-        #define GPIO_SIST_SINT_1_PSC3_5_PIN_VALUE  0x00200000
-        #define GPIO_SIST_SINT_0_PSC3_4_PIN_VALUE  0x00100000
-
-        #define GPIO_SIST_SINT_CLEAR_ALL           0x00000000
+        #define GPIO_SIST_SINT_7_ETH_16_PIN_VALUE  0x008000000
+        #define GPIO_SIST_SINT_6_ETH_15_PIN_VALUE  0x00400000
+        #define GPIO_SIST_SINT_5_ETH_14_PIN_VALUE  0x00200000
+        #define GPIO_SIST_SINT_4_ETH_13_PIN_VALUE  0x00100000
+        #define GPIO_SIST_SINT_3_USB1_9_PIN_VALUE  0x00080000
+        #define GPIO_SIST_SINT_2_PSC3_8_PIN_VALUE  0x00040000
+        #define GPIO_SIST_SINT_1_PSC3_5_PIN_VALUE  0x00020000
+        #define GPIO_SIST_SINT_0_PSC3_4_PIN_VALUE  0x00010000
+
+        #define GPIO_SIST_SINT_CLEAR_ALL           0xff000000
 
         volatile uint8_t  res4[0xC0];