Changeset f7842ce in rtems
- Timestamp:
- 02/28/06 20:50:03 (18 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 87f443cc
- Parents:
- e25d8c9
- Location:
- cpukit/score/cpu/m68k
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
cpukit/score/cpu/m68k/ChangeLog
re25d8c9 rf7842ce 1 2006-02-28 Eric Norum <norume@aps.anl.gov> 2 3 PR 904/patch 4 * rtems/score/m68k.h: Just "cc" in the clobbered register list for 5 interrupt enable/disable/flash operations. The "memory" barrier will 6 move the the generic interrupt enable/disable/flash macros. 7 8 2006-02-24 Eric Norum <norume@aps.anl.gov> 9 10 PR 904/patch 11 * rtems/score/m68k.h: Add "memory" to the clobbered register list for 12 interrupt enable/disable/flash operations. This is necessary to prevent 13 the compiler from hoisting/sinking other operations past the interrupt 14 enable/disable/flash operations. 15 1 16 2006-01-16 Joel Sherrill <joel@OARcorp.com> 2 17 -
cpukit/score/cpu/m68k/rtems/score/m68k.h
re25d8c9 rf7842ce 281 281 "or.l %0,%1\n\t" \ 282 282 "move.w %1,%%sr" \ 283 : "=d" (_level), "=d"(_tmpsr) : "1"(_tmpsr) ); \ 283 : "=d" (_level), "=d"(_tmpsr) : "1"(_tmpsr) \ 284 : "cc" ); \ 284 285 } while( 0 ) 285 286 #else … … 287 288 asm volatile ( "move.w %%sr,%0\n\t" \ 288 289 "or.w #0x0700,%%sr" \ 289 : "=d" (_level)) 290 : "=d" (_level) \ 291 : : "cc" ) 290 292 #endif 291 293 292 294 #define m68k_enable_interrupts( _level ) \ 293 asm volatile ( "move.w %0,%%sr " : : "d" (_level) );295 asm volatile ( "move.w %0,%%sr " : : "d" (_level) : "cc"); 294 296 295 297 #if ( M68K_COLDFIRE_ARCH == 1 ) … … 299 301 "or.l %2,%1\n\t" \ 300 302 "move.w %1,%%sr" \ 301 : "=d"(_tmpsr) : "0"(_tmpsr), "d"(_level) ); \ 303 : "=d"(_tmpsr) : "0"(_tmpsr), "d"(_level) \ 304 : "cc"); \ 302 305 } while( 0 ) 303 306 #else … … 305 308 asm volatile ( "move.w %0,%%sr\n\t" \ 306 309 "or.w #0x0700,%%sr" \ 307 : : "d" (_level)) 310 : : "d" (_level) \ 311 : "cc" ) 308 312 #endif 309 313
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