Changeset f7842ce in rtems


Ignore:
Timestamp:
Feb 28, 2006, 8:50:03 PM (14 years ago)
Author:
Eric Norum <WENorum@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
87f443cc
Parents:
e25d8c9
Message:

Just "cc" in the clobbered register list for interrupt enable/disable/flash
operations. The "memory" barrier will move the the generic interrupt
enable/disable/flash macros.

Location:
cpukit/score/cpu/m68k
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/m68k/ChangeLog

    re25d8c9 rf7842ce  
     12006-02-28      Eric Norum <norume@aps.anl.gov>
     2
     3    PR 904/patch
     4    * rtems/score/m68k.h: Just "cc" in the clobbered register list for
     5    interrupt enable/disable/flash operations.  The "memory" barrier will
     6    move the the generic interrupt enable/disable/flash macros.
     7
     82006-02-24      Eric Norum <norume@aps.anl.gov>
     9
     10    PR 904/patch
     11    * rtems/score/m68k.h: Add "memory" to the clobbered register list for
     12    interrupt enable/disable/flash operations.  This is necessary to prevent
     13    the compiler from hoisting/sinking other operations past the interrupt
     14    enable/disable/flash operations.
     15
    1162006-01-16      Joel Sherrill <joel@OARcorp.com>
    217
  • cpukit/score/cpu/m68k/rtems/score/m68k.h

    re25d8c9 rf7842ce  
    281281                       "or.l   %0,%1\n\t" \
    282282                       "move.w %1,%%sr" \
    283                        : "=d" (_level), "=d"(_tmpsr) : "1"(_tmpsr) ); \
     283                       : "=d" (_level), "=d"(_tmpsr) : "1"(_tmpsr) \
     284               : "cc" ); \
    284285   } while( 0 )
    285286#else
     
    287288  asm volatile ( "move.w  %%sr,%0\n\t" \
    288289                 "or.w    #0x0700,%%sr" \
    289                     : "=d" (_level))
     290                    : "=d" (_level) \
     291                    : : "cc" )
    290292#endif
    291293
    292294#define m68k_enable_interrupts( _level ) \
    293   asm volatile ( "move.w  %0,%%sr " : : "d" (_level));
     295  asm volatile ( "move.w  %0,%%sr " : : "d" (_level) : "cc");
    294296
    295297#if ( M68K_COLDFIRE_ARCH == 1 )
     
    299301                       "or.l   %2,%1\n\t" \
    300302                       "move.w %1,%%sr" \
    301                        : "=d"(_tmpsr) : "0"(_tmpsr), "d"(_level) ); \
     303                       : "=d"(_tmpsr) : "0"(_tmpsr), "d"(_level) \
     304               : "cc"); \
    302305   } while( 0 )
    303306#else
     
    305308  asm volatile ( "move.w  %0,%%sr\n\t" \
    306309                 "or.w    #0x0700,%%sr" \
    307                     : : "d" (_level))
     310                    : : "d" (_level) \
     311                    : "cc" )
    308312#endif
    309313
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