Changeset f6e6ed8 in rtems


Ignore:
Timestamp:
06/03/96 15:49:22 (27 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
a3828359
Parents:
52a0641
Message:

changed so this file is usable from assembly files.

no longer uses efi332.h

Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/m68k/sim.h

    r52a0641 rf6e6ed8  
    5151
    5252
     53/*
     54 *  XXX Why is a generic file like this including a bsp specific file?
     55
    5356#include <efi332.h>
     57 */
    5458
    5559
     
    5862#define SAM(a,b,c) ((a << b) & c)
    5963
    60 
     64/*
     65 *  These macros make this file usable from assembly.
     66 */
     67
     68#ifdef ASM
     69#define SIM_VOLATILE_USHORT_POINTER
     70#define SIM_VOLATILE_UCHAR_POINTER
     71#else
     72#define SIM_VOLATILE_USHORT_POINTER (volatile unsigned short int * const)
     73#define SIM_VOLATILE_UCHAR_POINTER  (volatile unsigned char * const)
     74#endif
    6175
    6276/* SIM_CRB (SIM Control Register Block) base address of the SIM
     
    7488
    7589
    76 #define SIMCR (volatile unsigned short int * const)(0x00 + SIM_CRB)
     90#define SIMCR SIM_VOLATILE_USHORT_POINTER(0x00 + SIM_CRB)
    7791                                /* Module Configuration Register */
    7892#define    EXOFF 0x8000         /*    External Clock Off */
     
    87101
    88102
    89 #define SIMTR (volatile unsigned short int * const)(0x02 + SIM_CRB)
     103#define SIMTR SIM_VOLATILE_USHORT_POINTER(0x02 + SIM_CRB)
    90104                                /* SIM Test Register */
    91105/* Used only for factor testing */
     
    93107
    94108
    95 #define SYNCR (volatile unsigned short int * const)(0x04 + SIM_CRB)
     109#define SYNCR SIM_VOLATILE_USHORT_POINTER(0x04 + SIM_CRB)
    96110                                /* Clock Synthesizer Control Register */
    97111#define    W     0x8000         /*    Frequency Control (VCO) */
     
    107121
    108122
    109 #define RSR (volatile unsigned char * const)(0x07 + SIM_CRB)
     123#define RSR SIM_VOLATILE_UCHAR_POINTER(0x07 + SIM_CRB)
    110124                                /* Reset Status Register */
    111125#define    EXT   0x0080         /*    External Reset */
     
    119133
    120134
    121 #define SIMTRE (volatile unsigned short int * const)(0x08 + SIM_CRB)
     135#define SIMTRE SIM_VOLATILE_USHORT_POINTER(0x08 + SIM_CRB)
    122136                                /* System Integration Test Register */
    123137/* Used only for factor testing */
     
    125139
    126140
    127 #define PORTE0 (volatile unsigned char * const)(0x11 + SIM_CRB)
    128 #define PORTE1 (volatile unsigned char * const)(0x13 + SIM_CRB)
     141#define PORTE0 SIM_VOLATILE_UCHAR_POINTER(0x11 + SIM_CRB)
     142#define PORTE1 SIM_VOLATILE_UCHAR_POINTER(0x13 + SIM_CRB)
    129143                                /* Port E Data Register */
    130 #define DDRE (volatile unsigned char * const)(0x15 + SIM_CRB)
     144#define DDRE SIM_VOLATILE_UCHAR_POINTER(0x15 + SIM_CRB)
    131145                                /* Port E Data Direction Register */
    132 #define PEPAR (volatile unsigned char * const)(0x17 + SIM_CRB)
     146#define PEPAR SIM_VOLATILE_UCHAR_POINTER(0x17 + SIM_CRB)
    133147                                /* Port E Pin Assignment Register */
    134148/* Any bit cleared (zero) defines the corresponding pin to be an I/O
     
    138152
    139153
    140 #define PORTF0 (volatile unsigned char * const)(0x19 + SIM_CRB)
    141 #define PORTF1 (volatile unsigned char * const)(0x1b + SIM_CRB)
     154#define PORTF0 SIM_VOLATILE_UCHAR_POINTER(0x19 + SIM_CRB)
     155#define PORTF1 SIM_VOLATILE_UCHAR_POINTER(0x1b + SIM_CRB)
    142156                                /* Port F Data Register */
    143 #define DDRF (volatile unsigned char * const)(0x1d + SIM_CRB)
     157#define DDRF SIM_VOLATILE_UCHAR_POINTER(0x1d + SIM_CRB)
    144158                                /* Port E Data Direction Register */
    145 #define PFPAR (volatile unsigned char * const)(0x1f + SIM_CRB)
     159#define PFPAR SIM_VOLATILE_UCHAR_POINTER(0x1f + SIM_CRB)
    146160/* Any bit cleared (zero) defines the corresponding pin to be an I/O
    147161   pin. Any bit set defines the corresponding pin to be a bus control
     
    150164
    151165
    152 #define SYPCR (volatile unsigned char * const)(0x21 + SIM_CRB)
     166#define SYPCR SIM_VOLATILE_UCHAR_POINTER(0x21 + SIM_CRB)
    153167/* !!! can write to only once after reset !!! */
    154168                                /* System Protection Control Register */
     
    162176
    163177
    164 #define PICR (volatile unsigned short int * const)(0x22 + SIM_CRB)
     178#define PICR SIM_VOLATILE_USHORT_POINTER(0x22 + SIM_CRB)
    165179                                /* Periodic Interrupt Control Reg. */
    166180#define    PIRQL 0x0700         /*    Periodic Interrupt Request Level */
     
    169183
    170184
    171 #define PITR (volatile unsigned short int * const)(0x24 + SIM_CRB)
     185#define PITR SIM_VOLATILE_USHORT_POINTER(0x24 + SIM_CRB)
    172186                                /* Periodic Interrupt Timer Register */
    173187#define    PTP   0x0100         /*    Periodic Timer Prescaler Control */
     
    176190
    177191
    178 #define SWSR (volatile unsigned char * const)(0x27 + SIM_CRB)
     192#define SWSR SIM_VOLATILE_UCHAR_POINTER(0x27 + SIM_CRB)
    179193                                /* Software Service Register */
    180194/* write 0x55 then 0xaa to service the software watchdog */
     
    182196
    183197
    184 #define TSTMSRA (volatile unsigned short int * const)(0x30 + SIM_CRB)
     198#define TSTMSRA SIM_VOLATILE_USHORT_POINTER(0x30 + SIM_CRB)
    185199                                /* Test Module Master Shift A */
    186 #define TSTMSRB (volatile unsigned short int * const)(0x32 + SIM_CRB)
     200#define TSTMSRB SIM_VOLATILE_USHORT_POINTER(0x32 + SIM_CRB)
    187201                                /* Test Module Master Shift A */
    188 #define TSTSC (volatile unsigned short int * const)(0x34 + SIM_CRB)
     202#define TSTSC SIM_VOLATILE_USHORT_POINTER(0x34 + SIM_CRB)
    189203                                /* Test Module Shift Count */
    190 #define TSTRC (volatile unsigned short int * const)(0x36 + SIM_CRB)
     204#define TSTRC SIM_VOLATILE_USHORT_POINTER(0x36 + SIM_CRB)
    191205                                /* Test Module Repetition Counter */
    192 #define CREG (volatile unsigned short int * const)(0x38 + SIM_CRB)
     206#define CREG SIM_VOLATILE_USHORT_POINTER(0x38 + SIM_CRB)
    193207                                /* Test Module Control */
    194 #define DREG (volatile unsigned short int * const)(0x3a + SIM_CRB)
     208#define DREG SIM_VOLATILE_USHORT_POINTER(0x3a + SIM_CRB)
    195209                                /* Test Module Distributed */
    196210/* Used only for factor testing */
     
    198212
    199213
    200 #define PORTC (volatile unsigned char * const)(0x41 + SIM_CRB)
     214#define PORTC SIM_VOLATILE_UCHAR_POINTER(0x41 + SIM_CRB)
    201215                                /* Port C Data */
    202216
    203217
    204218
    205 #define CSPAR0 (volatile unsigned short int * const)(0x44 + SIM_CRB)
     219#define CSPAR0 SIM_VOLATILE_USHORT_POINTER(0x44 + SIM_CRB)
    206220                                /* Chip Select Pin Assignment
    207221                                   Resgister 0 */
     
    210224   used. These bits always read zero; write have no effect. CSPAR0 bit
    211225   1 always reads one; writes to CSPAR0 bit 1 have no effect. */
    212 #define CSPAR1 (volatile unsigned short int * const)(0x46 + SIM_CRB)
     226#define CSPAR1 SIM_VOLATILE_USHORT_POINTER(0x46 + SIM_CRB)
    213227                                /* Chip Select Pin Assignment
    214228                                   Register 1 */
     
    256270#define BS_1M 0x7
    257271
    258 #define CSBARBT (volatile unsigned short int * const)(0x48 + SIM_CRB)
    259 #define CSBAR0 (volatile unsigned short int * const)(0x4c + SIM_CRB)
    260 #define CSBAR1 (volatile unsigned short int * const)(0x50 + SIM_CRB)
    261 #define CSBAR2 (volatile unsigned short int * const)(0x54 + SIM_CRB)
    262 #define CSBAR3 (volatile unsigned short int * const)(0x58 + SIM_CRB)
    263 #define CSBAR4 (volatile unsigned short int * const)(0x5c + SIM_CRB)
    264 #define CSBAR5 (volatile unsigned short int * const)(0x60 + SIM_CRB)
    265 #define CSBAR6 (volatile unsigned short int * const)(0x64 + SIM_CRB)
    266 #define CSBAR7 (volatile unsigned short int * const)(0x68 + SIM_CRB)
    267 #define CSBAR8 (volatile unsigned short int * const)(0x6c + SIM_CRB)
    268 #define CSBAR9 (volatile unsigned short int * const)(0x70 + SIM_CRB)
    269 #define CSBAR10 (volatile unsigned short int * const)(0x74 + SIM_CRB)
     272#define CSBARBT SIM_VOLATILE_USHORT_POINTER(0x48 + SIM_CRB)
     273#define CSBAR0 SIM_VOLATILE_USHORT_POINTER(0x4c + SIM_CRB)
     274#define CSBAR1 SIM_VOLATILE_USHORT_POINTER(0x50 + SIM_CRB)
     275#define CSBAR2 SIM_VOLATILE_USHORT_POINTER(0x54 + SIM_CRB)
     276#define CSBAR3 SIM_VOLATILE_USHORT_POINTER(0x58 + SIM_CRB)
     277#define CSBAR4 SIM_VOLATILE_USHORT_POINTER(0x5c + SIM_CRB)
     278#define CSBAR5 SIM_VOLATILE_USHORT_POINTER(0x60 + SIM_CRB)
     279#define CSBAR6 SIM_VOLATILE_USHORT_POINTER(0x64 + SIM_CRB)
     280#define CSBAR7 SIM_VOLATILE_USHORT_POINTER(0x68 + SIM_CRB)
     281#define CSBAR8 SIM_VOLATILE_USHORT_POINTER(0x6c + SIM_CRB)
     282#define CSBAR9 SIM_VOLATILE_USHORT_POINTER(0x70 + SIM_CRB)
     283#define CSBAR10 SIM_VOLATILE_USHORT_POINTER(0x74 + SIM_CRB)
    270284
    271285#define MODE 0x8000
     
    313327#define AVEC 1
    314328
    315 #define CSORBT (volatile unsigned short int * const)(0x4a + SIM_CRB)
    316 #define CSOR0 (volatile unsigned short int * const)(0x4e + SIM_CRB)
    317 #define CSOR1 (volatile unsigned short int * const)(0x52 + SIM_CRB)
    318 #define CSOR2 (volatile unsigned short int * const)(0x56 + SIM_CRB)
    319 #define CSOR3 (volatile unsigned short int * const)(0x5a + SIM_CRB)
    320 #define CSOR4 (volatile unsigned short int * const)(0x5e + SIM_CRB)
    321 #define CSOR5 (volatile unsigned short int * const)(0x62 + SIM_CRB)
    322 #define CSOR6 (volatile unsigned short int * const)(0x66 + SIM_CRB)
    323 #define CSOR7 (volatile unsigned short int * const)(0x6a + SIM_CRB)
    324 #define CSOR8 (volatile unsigned short int * const)(0x6e + SIM_CRB)
    325 #define CSOR9 (volatile unsigned short int * const)(0x72 + SIM_CRB)
    326 #define CSOR10 (volatile unsigned short int * const)(0x76 + SIM_CRB)
     329#define CSORBT SIM_VOLATILE_USHORT_POINTER(0x4a + SIM_CRB)
     330#define CSOR0 SIM_VOLATILE_USHORT_POINTER(0x4e + SIM_CRB)
     331#define CSOR1 SIM_VOLATILE_USHORT_POINTER(0x52 + SIM_CRB)
     332#define CSOR2 SIM_VOLATILE_USHORT_POINTER(0x56 + SIM_CRB)
     333#define CSOR3 SIM_VOLATILE_USHORT_POINTER(0x5a + SIM_CRB)
     334#define CSOR4 SIM_VOLATILE_USHORT_POINTER(0x5e + SIM_CRB)
     335#define CSOR5 SIM_VOLATILE_USHORT_POINTER(0x62 + SIM_CRB)
     336#define CSOR6 SIM_VOLATILE_USHORT_POINTER(0x66 + SIM_CRB)
     337#define CSOR7 SIM_VOLATILE_USHORT_POINTER(0x6a + SIM_CRB)
     338#define CSOR8 SIM_VOLATILE_USHORT_POINTER(0x6e + SIM_CRB)
     339#define CSOR9 SIM_VOLATILE_USHORT_POINTER(0x72 + SIM_CRB)
     340#define CSOR10 SIM_VOLATILE_USHORT_POINTER(0x76 + SIM_CRB)
    327341
    328342#endif /* _SIM_h_ */
  • cpukit/score/cpu/m68k/rtems/m68k/sim.h

    r52a0641 rf6e6ed8  
    5151
    5252
     53/*
     54 *  XXX Why is a generic file like this including a bsp specific file?
     55
    5356#include <efi332.h>
     57 */
    5458
    5559
     
    5862#define SAM(a,b,c) ((a << b) & c)
    5963
    60 
     64/*
     65 *  These macros make this file usable from assembly.
     66 */
     67
     68#ifdef ASM
     69#define SIM_VOLATILE_USHORT_POINTER
     70#define SIM_VOLATILE_UCHAR_POINTER
     71#else
     72#define SIM_VOLATILE_USHORT_POINTER (volatile unsigned short int * const)
     73#define SIM_VOLATILE_UCHAR_POINTER  (volatile unsigned char * const)
     74#endif
    6175
    6276/* SIM_CRB (SIM Control Register Block) base address of the SIM
     
    7488
    7589
    76 #define SIMCR (volatile unsigned short int * const)(0x00 + SIM_CRB)
     90#define SIMCR SIM_VOLATILE_USHORT_POINTER(0x00 + SIM_CRB)
    7791                                /* Module Configuration Register */
    7892#define    EXOFF 0x8000         /*    External Clock Off */
     
    87101
    88102
    89 #define SIMTR (volatile unsigned short int * const)(0x02 + SIM_CRB)
     103#define SIMTR SIM_VOLATILE_USHORT_POINTER(0x02 + SIM_CRB)
    90104                                /* SIM Test Register */
    91105/* Used only for factor testing */
     
    93107
    94108
    95 #define SYNCR (volatile unsigned short int * const)(0x04 + SIM_CRB)
     109#define SYNCR SIM_VOLATILE_USHORT_POINTER(0x04 + SIM_CRB)
    96110                                /* Clock Synthesizer Control Register */
    97111#define    W     0x8000         /*    Frequency Control (VCO) */
     
    107121
    108122
    109 #define RSR (volatile unsigned char * const)(0x07 + SIM_CRB)
     123#define RSR SIM_VOLATILE_UCHAR_POINTER(0x07 + SIM_CRB)
    110124                                /* Reset Status Register */
    111125#define    EXT   0x0080         /*    External Reset */
     
    119133
    120134
    121 #define SIMTRE (volatile unsigned short int * const)(0x08 + SIM_CRB)
     135#define SIMTRE SIM_VOLATILE_USHORT_POINTER(0x08 + SIM_CRB)
    122136                                /* System Integration Test Register */
    123137/* Used only for factor testing */
     
    125139
    126140
    127 #define PORTE0 (volatile unsigned char * const)(0x11 + SIM_CRB)
    128 #define PORTE1 (volatile unsigned char * const)(0x13 + SIM_CRB)
     141#define PORTE0 SIM_VOLATILE_UCHAR_POINTER(0x11 + SIM_CRB)
     142#define PORTE1 SIM_VOLATILE_UCHAR_POINTER(0x13 + SIM_CRB)
    129143                                /* Port E Data Register */
    130 #define DDRE (volatile unsigned char * const)(0x15 + SIM_CRB)
     144#define DDRE SIM_VOLATILE_UCHAR_POINTER(0x15 + SIM_CRB)
    131145                                /* Port E Data Direction Register */
    132 #define PEPAR (volatile unsigned char * const)(0x17 + SIM_CRB)
     146#define PEPAR SIM_VOLATILE_UCHAR_POINTER(0x17 + SIM_CRB)
    133147                                /* Port E Pin Assignment Register */
    134148/* Any bit cleared (zero) defines the corresponding pin to be an I/O
     
    138152
    139153
    140 #define PORTF0 (volatile unsigned char * const)(0x19 + SIM_CRB)
    141 #define PORTF1 (volatile unsigned char * const)(0x1b + SIM_CRB)
     154#define PORTF0 SIM_VOLATILE_UCHAR_POINTER(0x19 + SIM_CRB)
     155#define PORTF1 SIM_VOLATILE_UCHAR_POINTER(0x1b + SIM_CRB)
    142156                                /* Port F Data Register */
    143 #define DDRF (volatile unsigned char * const)(0x1d + SIM_CRB)
     157#define DDRF SIM_VOLATILE_UCHAR_POINTER(0x1d + SIM_CRB)
    144158                                /* Port E Data Direction Register */
    145 #define PFPAR (volatile unsigned char * const)(0x1f + SIM_CRB)
     159#define PFPAR SIM_VOLATILE_UCHAR_POINTER(0x1f + SIM_CRB)
    146160/* Any bit cleared (zero) defines the corresponding pin to be an I/O
    147161   pin. Any bit set defines the corresponding pin to be a bus control
     
    150164
    151165
    152 #define SYPCR (volatile unsigned char * const)(0x21 + SIM_CRB)
     166#define SYPCR SIM_VOLATILE_UCHAR_POINTER(0x21 + SIM_CRB)
    153167/* !!! can write to only once after reset !!! */
    154168                                /* System Protection Control Register */
     
    162176
    163177
    164 #define PICR (volatile unsigned short int * const)(0x22 + SIM_CRB)
     178#define PICR SIM_VOLATILE_USHORT_POINTER(0x22 + SIM_CRB)
    165179                                /* Periodic Interrupt Control Reg. */
    166180#define    PIRQL 0x0700         /*    Periodic Interrupt Request Level */
     
    169183
    170184
    171 #define PITR (volatile unsigned short int * const)(0x24 + SIM_CRB)
     185#define PITR SIM_VOLATILE_USHORT_POINTER(0x24 + SIM_CRB)
    172186                                /* Periodic Interrupt Timer Register */
    173187#define    PTP   0x0100         /*    Periodic Timer Prescaler Control */
     
    176190
    177191
    178 #define SWSR (volatile unsigned char * const)(0x27 + SIM_CRB)
     192#define SWSR SIM_VOLATILE_UCHAR_POINTER(0x27 + SIM_CRB)
    179193                                /* Software Service Register */
    180194/* write 0x55 then 0xaa to service the software watchdog */
     
    182196
    183197
    184 #define TSTMSRA (volatile unsigned short int * const)(0x30 + SIM_CRB)
     198#define TSTMSRA SIM_VOLATILE_USHORT_POINTER(0x30 + SIM_CRB)
    185199                                /* Test Module Master Shift A */
    186 #define TSTMSRB (volatile unsigned short int * const)(0x32 + SIM_CRB)
     200#define TSTMSRB SIM_VOLATILE_USHORT_POINTER(0x32 + SIM_CRB)
    187201                                /* Test Module Master Shift A */
    188 #define TSTSC (volatile unsigned short int * const)(0x34 + SIM_CRB)
     202#define TSTSC SIM_VOLATILE_USHORT_POINTER(0x34 + SIM_CRB)
    189203                                /* Test Module Shift Count */
    190 #define TSTRC (volatile unsigned short int * const)(0x36 + SIM_CRB)
     204#define TSTRC SIM_VOLATILE_USHORT_POINTER(0x36 + SIM_CRB)
    191205                                /* Test Module Repetition Counter */
    192 #define CREG (volatile unsigned short int * const)(0x38 + SIM_CRB)
     206#define CREG SIM_VOLATILE_USHORT_POINTER(0x38 + SIM_CRB)
    193207                                /* Test Module Control */
    194 #define DREG (volatile unsigned short int * const)(0x3a + SIM_CRB)
     208#define DREG SIM_VOLATILE_USHORT_POINTER(0x3a + SIM_CRB)
    195209                                /* Test Module Distributed */
    196210/* Used only for factor testing */
     
    198212
    199213
    200 #define PORTC (volatile unsigned char * const)(0x41 + SIM_CRB)
     214#define PORTC SIM_VOLATILE_UCHAR_POINTER(0x41 + SIM_CRB)
    201215                                /* Port C Data */
    202216
    203217
    204218
    205 #define CSPAR0 (volatile unsigned short int * const)(0x44 + SIM_CRB)
     219#define CSPAR0 SIM_VOLATILE_USHORT_POINTER(0x44 + SIM_CRB)
    206220                                /* Chip Select Pin Assignment
    207221                                   Resgister 0 */
     
    210224   used. These bits always read zero; write have no effect. CSPAR0 bit
    211225   1 always reads one; writes to CSPAR0 bit 1 have no effect. */
    212 #define CSPAR1 (volatile unsigned short int * const)(0x46 + SIM_CRB)
     226#define CSPAR1 SIM_VOLATILE_USHORT_POINTER(0x46 + SIM_CRB)
    213227                                /* Chip Select Pin Assignment
    214228                                   Register 1 */
     
    256270#define BS_1M 0x7
    257271
    258 #define CSBARBT (volatile unsigned short int * const)(0x48 + SIM_CRB)
    259 #define CSBAR0 (volatile unsigned short int * const)(0x4c + SIM_CRB)
    260 #define CSBAR1 (volatile unsigned short int * const)(0x50 + SIM_CRB)
    261 #define CSBAR2 (volatile unsigned short int * const)(0x54 + SIM_CRB)
    262 #define CSBAR3 (volatile unsigned short int * const)(0x58 + SIM_CRB)
    263 #define CSBAR4 (volatile unsigned short int * const)(0x5c + SIM_CRB)
    264 #define CSBAR5 (volatile unsigned short int * const)(0x60 + SIM_CRB)
    265 #define CSBAR6 (volatile unsigned short int * const)(0x64 + SIM_CRB)
    266 #define CSBAR7 (volatile unsigned short int * const)(0x68 + SIM_CRB)
    267 #define CSBAR8 (volatile unsigned short int * const)(0x6c + SIM_CRB)
    268 #define CSBAR9 (volatile unsigned short int * const)(0x70 + SIM_CRB)
    269 #define CSBAR10 (volatile unsigned short int * const)(0x74 + SIM_CRB)
     272#define CSBARBT SIM_VOLATILE_USHORT_POINTER(0x48 + SIM_CRB)
     273#define CSBAR0 SIM_VOLATILE_USHORT_POINTER(0x4c + SIM_CRB)
     274#define CSBAR1 SIM_VOLATILE_USHORT_POINTER(0x50 + SIM_CRB)
     275#define CSBAR2 SIM_VOLATILE_USHORT_POINTER(0x54 + SIM_CRB)
     276#define CSBAR3 SIM_VOLATILE_USHORT_POINTER(0x58 + SIM_CRB)
     277#define CSBAR4 SIM_VOLATILE_USHORT_POINTER(0x5c + SIM_CRB)
     278#define CSBAR5 SIM_VOLATILE_USHORT_POINTER(0x60 + SIM_CRB)
     279#define CSBAR6 SIM_VOLATILE_USHORT_POINTER(0x64 + SIM_CRB)
     280#define CSBAR7 SIM_VOLATILE_USHORT_POINTER(0x68 + SIM_CRB)
     281#define CSBAR8 SIM_VOLATILE_USHORT_POINTER(0x6c + SIM_CRB)
     282#define CSBAR9 SIM_VOLATILE_USHORT_POINTER(0x70 + SIM_CRB)
     283#define CSBAR10 SIM_VOLATILE_USHORT_POINTER(0x74 + SIM_CRB)
    270284
    271285#define MODE 0x8000
     
    313327#define AVEC 1
    314328
    315 #define CSORBT (volatile unsigned short int * const)(0x4a + SIM_CRB)
    316 #define CSOR0 (volatile unsigned short int * const)(0x4e + SIM_CRB)
    317 #define CSOR1 (volatile unsigned short int * const)(0x52 + SIM_CRB)
    318 #define CSOR2 (volatile unsigned short int * const)(0x56 + SIM_CRB)
    319 #define CSOR3 (volatile unsigned short int * const)(0x5a + SIM_CRB)
    320 #define CSOR4 (volatile unsigned short int * const)(0x5e + SIM_CRB)
    321 #define CSOR5 (volatile unsigned short int * const)(0x62 + SIM_CRB)
    322 #define CSOR6 (volatile unsigned short int * const)(0x66 + SIM_CRB)
    323 #define CSOR7 (volatile unsigned short int * const)(0x6a + SIM_CRB)
    324 #define CSOR8 (volatile unsigned short int * const)(0x6e + SIM_CRB)
    325 #define CSOR9 (volatile unsigned short int * const)(0x72 + SIM_CRB)
    326 #define CSOR10 (volatile unsigned short int * const)(0x76 + SIM_CRB)
     329#define CSORBT SIM_VOLATILE_USHORT_POINTER(0x4a + SIM_CRB)
     330#define CSOR0 SIM_VOLATILE_USHORT_POINTER(0x4e + SIM_CRB)
     331#define CSOR1 SIM_VOLATILE_USHORT_POINTER(0x52 + SIM_CRB)
     332#define CSOR2 SIM_VOLATILE_USHORT_POINTER(0x56 + SIM_CRB)
     333#define CSOR3 SIM_VOLATILE_USHORT_POINTER(0x5a + SIM_CRB)
     334#define CSOR4 SIM_VOLATILE_USHORT_POINTER(0x5e + SIM_CRB)
     335#define CSOR5 SIM_VOLATILE_USHORT_POINTER(0x62 + SIM_CRB)
     336#define CSOR6 SIM_VOLATILE_USHORT_POINTER(0x66 + SIM_CRB)
     337#define CSOR7 SIM_VOLATILE_USHORT_POINTER(0x6a + SIM_CRB)
     338#define CSOR8 SIM_VOLATILE_USHORT_POINTER(0x6e + SIM_CRB)
     339#define CSOR9 SIM_VOLATILE_USHORT_POINTER(0x72 + SIM_CRB)
     340#define CSOR10 SIM_VOLATILE_USHORT_POINTER(0x76 + SIM_CRB)
    327341
    328342#endif /* _SIM_h_ */
  • cpukit/score/cpu/m68k/sim.h

    r52a0641 rf6e6ed8  
    5151
    5252
     53/*
     54 *  XXX Why is a generic file like this including a bsp specific file?
     55
    5356#include <efi332.h>
     57 */
    5458
    5559
     
    5862#define SAM(a,b,c) ((a << b) & c)
    5963
    60 
     64/*
     65 *  These macros make this file usable from assembly.
     66 */
     67
     68#ifdef ASM
     69#define SIM_VOLATILE_USHORT_POINTER
     70#define SIM_VOLATILE_UCHAR_POINTER
     71#else
     72#define SIM_VOLATILE_USHORT_POINTER (volatile unsigned short int * const)
     73#define SIM_VOLATILE_UCHAR_POINTER  (volatile unsigned char * const)
     74#endif
    6175
    6276/* SIM_CRB (SIM Control Register Block) base address of the SIM
     
    7488
    7589
    76 #define SIMCR (volatile unsigned short int * const)(0x00 + SIM_CRB)
     90#define SIMCR SIM_VOLATILE_USHORT_POINTER(0x00 + SIM_CRB)
    7791                                /* Module Configuration Register */
    7892#define    EXOFF 0x8000         /*    External Clock Off */
     
    87101
    88102
    89 #define SIMTR (volatile unsigned short int * const)(0x02 + SIM_CRB)
     103#define SIMTR SIM_VOLATILE_USHORT_POINTER(0x02 + SIM_CRB)
    90104                                /* SIM Test Register */
    91105/* Used only for factor testing */
     
    93107
    94108
    95 #define SYNCR (volatile unsigned short int * const)(0x04 + SIM_CRB)
     109#define SYNCR SIM_VOLATILE_USHORT_POINTER(0x04 + SIM_CRB)
    96110                                /* Clock Synthesizer Control Register */
    97111#define    W     0x8000         /*    Frequency Control (VCO) */
     
    107121
    108122
    109 #define RSR (volatile unsigned char * const)(0x07 + SIM_CRB)
     123#define RSR SIM_VOLATILE_UCHAR_POINTER(0x07 + SIM_CRB)
    110124                                /* Reset Status Register */
    111125#define    EXT   0x0080         /*    External Reset */
     
    119133
    120134
    121 #define SIMTRE (volatile unsigned short int * const)(0x08 + SIM_CRB)
     135#define SIMTRE SIM_VOLATILE_USHORT_POINTER(0x08 + SIM_CRB)
    122136                                /* System Integration Test Register */
    123137/* Used only for factor testing */
     
    125139
    126140
    127 #define PORTE0 (volatile unsigned char * const)(0x11 + SIM_CRB)
    128 #define PORTE1 (volatile unsigned char * const)(0x13 + SIM_CRB)
     141#define PORTE0 SIM_VOLATILE_UCHAR_POINTER(0x11 + SIM_CRB)
     142#define PORTE1 SIM_VOLATILE_UCHAR_POINTER(0x13 + SIM_CRB)
    129143                                /* Port E Data Register */
    130 #define DDRE (volatile unsigned char * const)(0x15 + SIM_CRB)
     144#define DDRE SIM_VOLATILE_UCHAR_POINTER(0x15 + SIM_CRB)
    131145                                /* Port E Data Direction Register */
    132 #define PEPAR (volatile unsigned char * const)(0x17 + SIM_CRB)
     146#define PEPAR SIM_VOLATILE_UCHAR_POINTER(0x17 + SIM_CRB)
    133147                                /* Port E Pin Assignment Register */
    134148/* Any bit cleared (zero) defines the corresponding pin to be an I/O
     
    138152
    139153
    140 #define PORTF0 (volatile unsigned char * const)(0x19 + SIM_CRB)
    141 #define PORTF1 (volatile unsigned char * const)(0x1b + SIM_CRB)
     154#define PORTF0 SIM_VOLATILE_UCHAR_POINTER(0x19 + SIM_CRB)
     155#define PORTF1 SIM_VOLATILE_UCHAR_POINTER(0x1b + SIM_CRB)
    142156                                /* Port F Data Register */
    143 #define DDRF (volatile unsigned char * const)(0x1d + SIM_CRB)
     157#define DDRF SIM_VOLATILE_UCHAR_POINTER(0x1d + SIM_CRB)
    144158                                /* Port E Data Direction Register */
    145 #define PFPAR (volatile unsigned char * const)(0x1f + SIM_CRB)
     159#define PFPAR SIM_VOLATILE_UCHAR_POINTER(0x1f + SIM_CRB)
    146160/* Any bit cleared (zero) defines the corresponding pin to be an I/O
    147161   pin. Any bit set defines the corresponding pin to be a bus control
     
    150164
    151165
    152 #define SYPCR (volatile unsigned char * const)(0x21 + SIM_CRB)
     166#define SYPCR SIM_VOLATILE_UCHAR_POINTER(0x21 + SIM_CRB)
    153167/* !!! can write to only once after reset !!! */
    154168                                /* System Protection Control Register */
     
    162176
    163177
    164 #define PICR (volatile unsigned short int * const)(0x22 + SIM_CRB)
     178#define PICR SIM_VOLATILE_USHORT_POINTER(0x22 + SIM_CRB)
    165179                                /* Periodic Interrupt Control Reg. */
    166180#define    PIRQL 0x0700         /*    Periodic Interrupt Request Level */
     
    169183
    170184
    171 #define PITR (volatile unsigned short int * const)(0x24 + SIM_CRB)
     185#define PITR SIM_VOLATILE_USHORT_POINTER(0x24 + SIM_CRB)
    172186                                /* Periodic Interrupt Timer Register */
    173187#define    PTP   0x0100         /*    Periodic Timer Prescaler Control */
     
    176190
    177191
    178 #define SWSR (volatile unsigned char * const)(0x27 + SIM_CRB)
     192#define SWSR SIM_VOLATILE_UCHAR_POINTER(0x27 + SIM_CRB)
    179193                                /* Software Service Register */
    180194/* write 0x55 then 0xaa to service the software watchdog */
     
    182196
    183197
    184 #define TSTMSRA (volatile unsigned short int * const)(0x30 + SIM_CRB)
     198#define TSTMSRA SIM_VOLATILE_USHORT_POINTER(0x30 + SIM_CRB)
    185199                                /* Test Module Master Shift A */
    186 #define TSTMSRB (volatile unsigned short int * const)(0x32 + SIM_CRB)
     200#define TSTMSRB SIM_VOLATILE_USHORT_POINTER(0x32 + SIM_CRB)
    187201                                /* Test Module Master Shift A */
    188 #define TSTSC (volatile unsigned short int * const)(0x34 + SIM_CRB)
     202#define TSTSC SIM_VOLATILE_USHORT_POINTER(0x34 + SIM_CRB)
    189203                                /* Test Module Shift Count */
    190 #define TSTRC (volatile unsigned short int * const)(0x36 + SIM_CRB)
     204#define TSTRC SIM_VOLATILE_USHORT_POINTER(0x36 + SIM_CRB)
    191205                                /* Test Module Repetition Counter */
    192 #define CREG (volatile unsigned short int * const)(0x38 + SIM_CRB)
     206#define CREG SIM_VOLATILE_USHORT_POINTER(0x38 + SIM_CRB)
    193207                                /* Test Module Control */
    194 #define DREG (volatile unsigned short int * const)(0x3a + SIM_CRB)
     208#define DREG SIM_VOLATILE_USHORT_POINTER(0x3a + SIM_CRB)
    195209                                /* Test Module Distributed */
    196210/* Used only for factor testing */
     
    198212
    199213
    200 #define PORTC (volatile unsigned char * const)(0x41 + SIM_CRB)
     214#define PORTC SIM_VOLATILE_UCHAR_POINTER(0x41 + SIM_CRB)
    201215                                /* Port C Data */
    202216
    203217
    204218
    205 #define CSPAR0 (volatile unsigned short int * const)(0x44 + SIM_CRB)
     219#define CSPAR0 SIM_VOLATILE_USHORT_POINTER(0x44 + SIM_CRB)
    206220                                /* Chip Select Pin Assignment
    207221                                   Resgister 0 */
     
    210224   used. These bits always read zero; write have no effect. CSPAR0 bit
    211225   1 always reads one; writes to CSPAR0 bit 1 have no effect. */
    212 #define CSPAR1 (volatile unsigned short int * const)(0x46 + SIM_CRB)
     226#define CSPAR1 SIM_VOLATILE_USHORT_POINTER(0x46 + SIM_CRB)
    213227                                /* Chip Select Pin Assignment
    214228                                   Register 1 */
     
    256270#define BS_1M 0x7
    257271
    258 #define CSBARBT (volatile unsigned short int * const)(0x48 + SIM_CRB)
    259 #define CSBAR0 (volatile unsigned short int * const)(0x4c + SIM_CRB)
    260 #define CSBAR1 (volatile unsigned short int * const)(0x50 + SIM_CRB)
    261 #define CSBAR2 (volatile unsigned short int * const)(0x54 + SIM_CRB)
    262 #define CSBAR3 (volatile unsigned short int * const)(0x58 + SIM_CRB)
    263 #define CSBAR4 (volatile unsigned short int * const)(0x5c + SIM_CRB)
    264 #define CSBAR5 (volatile unsigned short int * const)(0x60 + SIM_CRB)
    265 #define CSBAR6 (volatile unsigned short int * const)(0x64 + SIM_CRB)
    266 #define CSBAR7 (volatile unsigned short int * const)(0x68 + SIM_CRB)
    267 #define CSBAR8 (volatile unsigned short int * const)(0x6c + SIM_CRB)
    268 #define CSBAR9 (volatile unsigned short int * const)(0x70 + SIM_CRB)
    269 #define CSBAR10 (volatile unsigned short int * const)(0x74 + SIM_CRB)
     272#define CSBARBT SIM_VOLATILE_USHORT_POINTER(0x48 + SIM_CRB)
     273#define CSBAR0 SIM_VOLATILE_USHORT_POINTER(0x4c + SIM_CRB)
     274#define CSBAR1 SIM_VOLATILE_USHORT_POINTER(0x50 + SIM_CRB)
     275#define CSBAR2 SIM_VOLATILE_USHORT_POINTER(0x54 + SIM_CRB)
     276#define CSBAR3 SIM_VOLATILE_USHORT_POINTER(0x58 + SIM_CRB)
     277#define CSBAR4 SIM_VOLATILE_USHORT_POINTER(0x5c + SIM_CRB)
     278#define CSBAR5 SIM_VOLATILE_USHORT_POINTER(0x60 + SIM_CRB)
     279#define CSBAR6 SIM_VOLATILE_USHORT_POINTER(0x64 + SIM_CRB)
     280#define CSBAR7 SIM_VOLATILE_USHORT_POINTER(0x68 + SIM_CRB)
     281#define CSBAR8 SIM_VOLATILE_USHORT_POINTER(0x6c + SIM_CRB)
     282#define CSBAR9 SIM_VOLATILE_USHORT_POINTER(0x70 + SIM_CRB)
     283#define CSBAR10 SIM_VOLATILE_USHORT_POINTER(0x74 + SIM_CRB)
    270284
    271285#define MODE 0x8000
     
    313327#define AVEC 1
    314328
    315 #define CSORBT (volatile unsigned short int * const)(0x4a + SIM_CRB)
    316 #define CSOR0 (volatile unsigned short int * const)(0x4e + SIM_CRB)
    317 #define CSOR1 (volatile unsigned short int * const)(0x52 + SIM_CRB)
    318 #define CSOR2 (volatile unsigned short int * const)(0x56 + SIM_CRB)
    319 #define CSOR3 (volatile unsigned short int * const)(0x5a + SIM_CRB)
    320 #define CSOR4 (volatile unsigned short int * const)(0x5e + SIM_CRB)
    321 #define CSOR5 (volatile unsigned short int * const)(0x62 + SIM_CRB)
    322 #define CSOR6 (volatile unsigned short int * const)(0x66 + SIM_CRB)
    323 #define CSOR7 (volatile unsigned short int * const)(0x6a + SIM_CRB)
    324 #define CSOR8 (volatile unsigned short int * const)(0x6e + SIM_CRB)
    325 #define CSOR9 (volatile unsigned short int * const)(0x72 + SIM_CRB)
    326 #define CSOR10 (volatile unsigned short int * const)(0x76 + SIM_CRB)
     329#define CSORBT SIM_VOLATILE_USHORT_POINTER(0x4a + SIM_CRB)
     330#define CSOR0 SIM_VOLATILE_USHORT_POINTER(0x4e + SIM_CRB)
     331#define CSOR1 SIM_VOLATILE_USHORT_POINTER(0x52 + SIM_CRB)
     332#define CSOR2 SIM_VOLATILE_USHORT_POINTER(0x56 + SIM_CRB)
     333#define CSOR3 SIM_VOLATILE_USHORT_POINTER(0x5a + SIM_CRB)
     334#define CSOR4 SIM_VOLATILE_USHORT_POINTER(0x5e + SIM_CRB)
     335#define CSOR5 SIM_VOLATILE_USHORT_POINTER(0x62 + SIM_CRB)
     336#define CSOR6 SIM_VOLATILE_USHORT_POINTER(0x66 + SIM_CRB)
     337#define CSOR7 SIM_VOLATILE_USHORT_POINTER(0x6a + SIM_CRB)
     338#define CSOR8 SIM_VOLATILE_USHORT_POINTER(0x6e + SIM_CRB)
     339#define CSOR9 SIM_VOLATILE_USHORT_POINTER(0x72 + SIM_CRB)
     340#define CSOR10 SIM_VOLATILE_USHORT_POINTER(0x76 + SIM_CRB)
    327341
    328342#endif /* _SIM_h_ */
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