Changeset f65dcc7 in rtems


Ignore:
Timestamp:
Dec 2, 2016, 12:10:31 PM (3 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
b07e642a
Parents:
7da78cf
git-author:
Sebastian Huber <sebastian.huber@…> (12/02/16 12:10:31)
git-committer:
Sebastian Huber <sebastian.huber@…> (12/02/16 12:11:13)
Message:

score: Fix ARM and PowerPC context initialization

Update #2751.

Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/new-exceptions/cpu.c

    r7da78cf rf65dcc7  
    119119  the_ppc_context->msr = msr_value;
    120120  the_ppc_context->lr = (uint32_t) entry_point;
     121  the_ppc_context->isr_dispatch_disable = 0;
    121122
    122123#if defined(__ALTIVEC__) && !defined(PPC_MULTILIB_ALTIVEC)
  • cpukit/score/cpu/arm/cpu.c

    r7da78cf rf65dcc7  
    110110  the_context->register_cpsr = ( ( new_level != 0 ) ? ARM_PSR_I : 0 )
    111111    | arm_cpu_mode;
     112  the_context->isr_dispatch_disable = 0;
    112113
    113114#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
  • cpukit/score/cpu/no_cpu/rtems/score/cpu.h

    r7da78cf rf65dcc7  
    873873 * undefined at task start time.
    874874 *
     875 * The ISR dispatch disable field of the context must be cleared to zero if it
     876 * is used by the CPU port.  Otherwise, a thread restart results in
     877 * unpredictable behaviour.
     878 *
    875879 * @param[in] _the_context is the context structure to be initialized
    876880 * @param[in] _stack_base is the lowest physical address of this task's stack
Note: See TracChangeset for help on using the changeset viewer.