Changeset f437107 in rtems


Ignore:
Timestamp:
Mar 28, 2011, 9:00:01 AM (9 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
c4d9f313
Parents:
305234f7
Message:

2011-03-29 Sebastian Huber <sebastian.huber@…>

  • configure.ac, include/bspopts.h.in: New BSP option LPC32XX_SCRATCH_AREA_SIZE. Disable BSP option LPC32XX_DISABLE_READ_ONLY_PROTECTION for all BSPs.
  • include/boot.h: Removed application specific defines.
  • include/nand-mlc.h, misc/nand-mlc.c: Changed configuration layout.
  • include/mmu.h, misc/mmu.c: Documentation. Bugfix.
  • include/bsp.h, startup/bspstarthooks.c, misc/restart.c, startup/linkcmds.lpc32xx_mzx, startup/linkcmds.lpc32xx_mzx_stage_1, startup/linkcmds.lpc32xx_mzx_stage_2, startup/linkcmds.lpc32xx_phycore: Support for scratch area. Moved code into macros for reusability.
Location:
c/src/lib/libbsp/arm/lpc32xx
Files:
15 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/lpc32xx/ChangeLog

    r305234f7 rf437107  
     12011-03-29      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * configure.ac, include/bspopts.h.in: New BSP option
     4        LPC32XX_SCRATCH_AREA_SIZE.  Disable BSP option
     5        LPC32XX_DISABLE_READ_ONLY_PROTECTION for all BSPs.
     6        * include/boot.h: Removed application specific defines.
     7        * include/nand-mlc.h, misc/nand-mlc.c: Changed configuration layout.
     8        * include/mmu.h, misc/mmu.c: Documentation.  Bugfix.
     9        * include/bsp.h, startup/bspstarthooks.c, misc/restart.c,
     10        startup/linkcmds.lpc32xx_mzx, startup/linkcmds.lpc32xx_mzx_stage_1,
     11        startup/linkcmds.lpc32xx_mzx_stage_2,
     12        startup/linkcmds.lpc32xx_phycore: Support for scratch area.  Moved
     13        code into macros for reusability.
     14
    1152011-02-21      Sebastian Huber <sebastian.huber@embedded-brains.de>
    216
  • c/src/lib/libbsp/arm/lpc32xx/configure.ac

    r305234f7 rf437107  
    7474RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[disable cache for read-write data sections])
    7575
    76 RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[lpc32xx_mzx*],[1])
    7776RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[*],[])
    7877RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[disable MMU protection of read-only sections])
     78
     79RTEMS_BSPOPTS_SET([LPC32XX_SCRATCH_AREA_SIZE],[lpc32xx_mzx*],[4096])
     80RTEMS_BSPOPTS_HELP([LPC32XX_SCRATCH_AREA_SIZE],[size of scratch area])
    7981
    8082RTEMS_BSPOPTS_SET([LPC32XX_STOP_GPDMA],[*],[1])
  • c/src/lib/libbsp/arm/lpc32xx/include/boot.h

    r305234f7 rf437107  
    5656 */
    5757
    58 #define LPC32XX_BOOT_STAGE_1_BLOCK_0 0
    59 #define LPC32XX_BOOT_STAGE_1_BLOCK_1 1
    60 #define LPC32XX_BOOT_STAGE_2_BLOCK_0 2
     58#define LPC32XX_BOOT_BLOCK_0 0
     59#define LPC32XX_BOOT_BLOCK_1 1
    6160
    6261#define LPC32XX_BOOT_ICR_SP_3AC_8IF 0xf0
  • c/src/lib/libbsp/arm/lpc32xx/include/bsp.h

    r305234f7 rf437107  
    136136extern uint32_t lpc32xx_magic_zero_size [];
    137137
     138#ifdef LPC32XX_SCRATCH_AREA_SIZE
     139  /**
     140   * @rief Scratch area.
     141   *
     142   * The usage is application specific.
     143   */
     144  extern uint8_t lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE];
     145#endif
     146
     147#define LPC32XX_DO_STOP_GPDMA \
     148  do { \
     149    if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { \
     150      if ((lpc32xx.dma.cfg & LPC_DMA_CFG_EN) != 0) { \
     151        int i = 0; \
     152        for (i = 0; i < 8; ++i) { \
     153          lpc32xx.dma.channels [i].cfg = 0; \
     154        } \
     155        lpc32xx.dma.cfg &= ~LPC_DMA_CFG_EN; \
     156      } \
     157      LPC32XX_DMACLK_CTRL = 0; \
     158    } \
     159  } while (0)
     160
     161#define LPC32XX_DO_STOP_ETHERNET \
     162  do { \
     163    if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) { \
     164      lpc32xx.eth.command = 0x38; \
     165      lpc32xx.eth.mac1 = 0xcf00; \
     166      lpc32xx.eth.mac1 = 0; \
     167      LPC32XX_MAC_CLK_CTRL = 0; \
     168    } \
     169  } while (0)
     170
     171#define LPC32XX_DO_STOP_USB \
     172  do { \
     173    if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) { \
     174      LPC32XX_OTG_CLK_CTRL = 0; \
     175      LPC32XX_USB_CTRL = 0x80000; \
     176    } \
     177  } while (0)
     178
     179#define LPC32XX_DO_RESTART(addr) \
     180  do { \
     181    ARM_SWITCH_REGISTERS; \
     182    rtems_interrupt_level level; \
     183    uint32_t ctrl = 0; \
     184  \
     185    rtems_interrupt_disable(level); \
     186  \
     187    arm_cp15_data_cache_test_and_clean(); \
     188    arm_cp15_instruction_cache_invalidate(); \
     189  \
     190    ctrl = arm_cp15_get_control(); \
     191    ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \
     192    arm_cp15_set_control(ctrl); \
     193  \
     194    __asm__ volatile ( \
     195      ARM_SWITCH_TO_ARM \
     196      "mov pc, %[addr]\n" \
     197      ARM_SWITCH_BACK \
     198      : ARM_SWITCH_OUTPUT \
     199      : [addr] "r" (addr) \
     200    ); \
     201  } while (0)
     202
    138203/** @} */
    139204
  • c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in

    r305234f7 rf437107  
    6464#undef LPC32XX_PERIPH_CLK
    6565
     66/* size of scratch area */
     67#undef LPC32XX_SCRATCH_AREA_SIZE
     68
    6669/* stop Ethernet controller at start-up to avoid DMA interference */
    6770#undef LPC32XX_STOP_ETHERNET
  • c/src/lib/libbsp/arm/lpc32xx/include/mmu.h

    r305234f7 rf437107  
    88
    99/*
    10  * Copyright (c) 2009
    11  * embedded brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * <rtems@embedded-brains.de>
     10 * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
     11 *
     12 *  embedded brains GmbH
     13 *  Obere Lagerstr. 30
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
    1617 *
    1718 * The license and distribution terms for this file may be
     
    5657  (LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
    5758
    58 void lpc32xx_set_translation_table_entries(
     59/**
     60 * @brief Sets the @a section_flags for the address range [@a begin, @a end).
     61 *
     62 * @return Previous section flags of the first modified entry.
     63 */
     64uint32_t lpc32xx_set_translation_table_entries(
    5965  const void *begin,
    6066  const void *end,
  • c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h

    r305234f7 rf437107  
    182182 */
    183183typedef struct {
    184   /**
    185    * @brief Selects small pages (512 Bytes user data and 16 Bytes spare data)
    186    * or large pages (2048 Bytes user data and 64 Bytes spare data).
    187    */
    188   bool small_pages;
    189 
    190   /**
    191    * @brief Selects 3/4 address cycles for small pages/large pages or 4/5
    192    * address cycles.
    193    */
    194   bool many_address_cycles;
    195 
    196   /**
    197    * @brief Selects 64 or 128 pages per block in case of large pages.
    198    */
    199   bool normal_blocks;
     184  uint32_t flags;
    200185
    201186  uint32_t block_count;
     
    206191  uint32_t time;
    207192} lpc32xx_mlc_config;
     193
     194/**
     195 * @brief Selects small pages (512 Bytes user data and 16 Bytes spare data)
     196 * or large pages (2048 Bytes user data and 64 Bytes spare data).
     197 */
     198#define MLC_SMALL_PAGES 0x1U
     199
     200/**
     201 * @Brief Selects 3/4 address cycles for small pages/large pages or 4/5
     202 * address cycles.
     203 */
     204#define MLC_MANY_ADDRESS_CYCLES 0x2U
     205
     206/**
     207 * @brief Selects 64 or 128 pages per block in case of large pages.
     208 */
     209#define MLC_NORMAL_BLOCKS 0x4U
    208210
    209211/**
  • c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c

    r305234f7 rf437107  
    88
    99/*
    10  * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
     
    2323#include <bsp/mmu.h>
    2424
    25 void lpc32xx_set_translation_table_entries(
     25static uint32_t disable_mmu(void)
     26{
     27  uint32_t ctrl = 0;
     28
     29  arm_cp15_data_cache_test_and_clean_and_invalidate();
     30
     31  ctrl = arm_cp15_get_control();
     32  arm_cp15_set_control(ctrl & ~ARM_CP15_CTRL_M);
     33
     34  arm_cp15_tlb_invalidate();
     35
     36  return ctrl;
     37}
     38
     39static void restore_mmu_control(uint32_t ctrl)
     40{
     41  arm_cp15_set_control(ctrl);
     42}
     43
     44uint32_t set_translation_table_entries(
    2645  const void *begin,
    2746  const void *end,
     
    3251  uint32_t i = ARM_MMU_SECT_GET_INDEX(begin);
    3352  uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end));
     53  uint32_t ctrl = disable_mmu();
     54  uint32_t section_flags_of_first_entry = ttb [i];
    3455
    3556  while (i < iend) {
     
    3758    ++i;
    3859  }
     60
     61  restore_mmu_control(ctrl);
     62
     63  return section_flags_of_first_entry;
    3964}
     65
     66uint32_t lpc32xx_set_translation_table_entries(
     67  const void *begin,
     68  const void *end,
     69  uint32_t section_flags
     70)
     71{
     72  rtems_interrupt_level level;
     73  uint32_t section_flags_of_first_entry = 0;
     74
     75  rtems_interrupt_disable(level);
     76  section_flags_of_first_entry =
     77    set_translation_table_entries(begin, end, section_flags);
     78  rtems_interrupt_enable(level);
     79
     80  return section_flags_of_first_entry;
     81}
  • c/src/lib/libbsp/arm/lpc32xx/misc/nand-mlc.c

    r305234f7 rf437107  
    2525static volatile lpc32xx_nand_mlc *const mlc = &lpc32xx.nand_mlc;
    2626
    27 static bool mlc_small_pages;
    28 
    29 static bool mlc_many_address_cycles;
    30 
    31 static bool mlc_normal_blocks;
     27static uint32_t mlc_flags;
    3228
    3329static uint32_t mlc_block_count;
     
    3531static uint32_t mlc_page_count;
    3632
     33static bool mlc_small_pages(void)
     34{
     35  return (mlc_flags & MLC_SMALL_PAGES) != 0;
     36}
     37
     38static bool mlc_many_address_cycles(void)
     39{
     40  return (mlc_flags & MLC_MANY_ADDRESS_CYCLES) != 0;
     41}
     42
     43static bool mlc_normal_blocks(void)
     44{
     45  return (mlc_flags & MLC_NORMAL_BLOCKS) != 0;
     46}
     47
    3748uint32_t lpc32xx_mlc_page_size(void)
    3849{
    39   if (mlc_small_pages) {
     50  if (mlc_small_pages()) {
    4051    return 512;
    4152  } else {
     
    4657uint32_t lpc32xx_mlc_pages_per_block(void)
    4758{
    48   if (mlc_small_pages) {
     59  if (mlc_small_pages()) {
    4960    return 32;
    5061  } else {
    51     if (mlc_normal_blocks) {
     62    if (mlc_normal_blocks()) {
    5263      return 64;
    5364    } else {
     
    100111static void mlc_set_block_address(uint32_t block_index)
    101112{
    102   if (mlc_small_pages) {
     113  if (mlc_small_pages()) {
    103114    mlc->addr = (uint8_t) (block_index << 5);
    104115    mlc->addr = (uint8_t) (block_index >> 3);
    105     if (mlc_many_address_cycles) {
     116    if (mlc_many_address_cycles()) {
    106117      mlc->addr = (uint8_t) (block_index >> 11);
    107118    }
    108119  } else {
    109     if (mlc_normal_blocks) {
     120    if (mlc_normal_blocks()) {
    110121      mlc->addr = (uint8_t) (block_index << 6);
    111122      mlc->addr = (uint8_t) (block_index >> 2);
    112       if (mlc_many_address_cycles) {
     123      if (mlc_many_address_cycles()) {
    113124        mlc->addr = (uint8_t) (block_index >> 10);
    114125      }
     
    116127      mlc->addr = (uint8_t) (block_index << 7);
    117128      mlc->addr = (uint8_t) (block_index >> 1);
    118       if (mlc_many_address_cycles) {
     129      if (mlc_many_address_cycles()) {
    119130        mlc->addr = (uint8_t) (block_index >> 9);
    120131      }
     
    126137{
    127138  mlc->addr = 0;
    128   if (mlc_small_pages) {
     139  if (mlc_small_pages()) {
    129140    mlc->addr = (uint8_t) page_index;
    130141    mlc->addr = (uint8_t) (page_index >> 8);
    131     if (mlc_many_address_cycles) {
     142    if (mlc_many_address_cycles()) {
    132143      mlc->addr = (uint8_t) (page_index >> 16);
    133144    }
     
    136147    mlc->addr = (uint8_t) page_index;
    137148    mlc->addr = (uint8_t) (page_index >> 8);
    138     if (mlc_many_address_cycles) {
     149    if (mlc_many_address_cycles()) {
    139150      mlc->addr = (uint8_t) (page_index >> 16);
    140151    }
     
    146157  uint32_t icr = 0;
    147158
    148   mlc_small_pages = cfg->small_pages;
    149   mlc_many_address_cycles = cfg->many_address_cycles;
    150   mlc_normal_blocks = cfg->normal_blocks;
     159  mlc_flags = cfg->flags;
    151160  mlc_block_count = cfg->block_count;
    152161  mlc_page_count = cfg->block_count * lpc32xx_mlc_pages_per_block();
     
    160169
    161170  /* Configuration */
    162   if (!mlc_small_pages) {
     171  if (!mlc_small_pages()) {
    163172    icr |= MLC_ICR_LARGE_PAGES;
    164173  }
    165   if (mlc_many_address_cycles) {
     174  if (mlc_many_address_cycles()) {
    166175    icr |= MLC_ICR_ADDR_WORD_COUNT_4_5;
    167176  }
     
    192201{
    193202  rtems_status_code sc = RTEMS_SUCCESSFUL;
    194   size_t small_pages_count = mlc_small_pages ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE;
     203  size_t small_pages_count = mlc_small_pages() ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE;
    195204  size_t sp = 0;
    196205  size_t i = 0;
     
    203212  mlc_wait_until_ready();
    204213  mlc->cmd = 0x00;
    205   if (!mlc_small_pages) {
     214  if (!mlc_small_pages()) {
    206215    mlc->cmd = 0x30;
    207216  }
     
    285294{
    286295  rtems_status_code sc = RTEMS_IO_ERROR;
    287   size_t small_pages_count = mlc_small_pages ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE;
     296  size_t small_pages_count = mlc_small_pages() ? 1 : MLC_SMALL_PAGES_PER_LARGE_PAGE;
    288297  size_t sp = 0;
    289298  size_t i = 0;
  • c/src/lib/libbsp/arm/lpc32xx/misc/restart.c

    r305234f7 rf437107  
    3131void bsp_restart(void *addr)
    3232{
    33   ARM_SWITCH_REGISTERS;
    34   rtems_interrupt_level level;
    35   uint32_t ctrl = 0;
    36 
    37   rtems_interrupt_disable(level);
    38 
    39   arm_cp15_data_cache_test_and_clean();
    40   arm_cp15_instruction_cache_invalidate();
    41 
    42   ctrl = arm_cp15_get_control();
    43   ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M);
    44   arm_cp15_set_control(ctrl);
    45 
    46   __asm__ volatile (
    47     ARM_SWITCH_TO_ARM
    48     "mov pc, %[addr]\n"
    49     ARM_SWITCH_BACK
    50     : ARM_SWITCH_OUTPUT
    51     : [addr] "r" (addr)
    52   );
     33  LPC32XX_DO_RESTART(addr);
    5334}
  • c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c

    r305234f7 rf437107  
    7474      .end = (uint32_t) bsp_section_fast_data_end,
    7575      .flags = LPC32XX_MMU_READ_WRITE_DATA
     76#ifdef LPC32XX_SCRATCH_AREA_SIZE
     77    }, {
     78      .begin = (uint32_t) &lpc32xx_scratch_area [0],
     79      .end = (uint32_t) &lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE],
     80      .flags = LPC32XX_MMU_READ_ONLY_DATA
     81#endif
    7682    }, {
    7783      .begin = (uint32_t) bsp_section_start_begin,
     
    225231{
    226232  #ifdef LPC32XX_STOP_GPDMA
    227     if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) {
    228       if ((lpc32xx.dma.cfg & LPC_DMA_CFG_EN) != 0) {
    229         int i = 0;
    230 
    231         for (i = 0; i < 8; ++i) {
    232           lpc32xx.dma.channels [i].cfg = 0;
    233         }
    234 
    235         lpc32xx.dma.cfg &= ~LPC_DMA_CFG_EN;
    236       }
    237       LPC32XX_DMACLK_CTRL = 0;
    238     }
     233    LPC32XX_DO_STOP_GPDMA;
    239234  #endif
    240235
    241236  #ifdef LPC32XX_STOP_ETHERNET
    242     if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) {
    243       lpc32xx.eth.command = 0x38;
    244       lpc32xx.eth.mac1 = 0xcf00;
    245       lpc32xx.eth.mac1 = 0;
    246       LPC32XX_MAC_CLK_CTRL = 0;
    247     }
     237    LPC32XX_DO_STOP_ETHERNET;
    248238  #endif
    249239
    250240  #ifdef LPC32XX_STOP_USB
    251     if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) {
    252       LPC32XX_OTG_CLK_CTRL = 0;
    253       LPC32XX_USB_CTRL = 0x80000;
    254     }
     241    LPC32XX_DO_STOP_USB;
    255242  #endif
    256243}
  • c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx

    r305234f7 rf437107  
    3838        RAM_INT : ORIGIN = 0x08000000, LENGTH = 256k
    3939        RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
    40         RAM_EXT : ORIGIN = 0x80004000, LENGTH = 32M - 16k /* SDRAM on DYCS0 */
     40        RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
     41        RAM_EXT : ORIGIN = 0x80005000, LENGTH = 32M - 20k /* SDRAM on DYCS0 */
    4142        NIRVANA : ORIGIN = 0, LENGTH = 0
    4243}
     
    5859REGION_ALIAS ("REGION_STACK", RAM_INT);
    5960
     61lpc32xx_scratch_area = ORIGIN (RAM_SCRATCH);
     62
    6063bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096;
    6164bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
    6265
    63 bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1M;
     66bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
    6467
    6568INCLUDE linkcmds.lpc32xx
  • c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1

    r305234f7 rf437107  
    3939        RAM_VEC : ORIGIN = 0x0803a000, LENGTH = 8k
    4040        RAM_MMU : ORIGIN = 0x0803c000, LENGTH = 16k
     41        RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
    4142        NIRVANA : ORIGIN = 0, LENGTH = 0
    4243}
     
    5859REGION_ALIAS ("REGION_STACK", RAM_INT);
    5960
     61lpc32xx_scratch_area = ORIGIN (RAM_SCRATCH);
     62
    6063bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 7296;
    6164
  • c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2

    r305234f7 rf437107  
    3636
    3737MEMORY {
    38         RAM_INT : ORIGIN = 0x08000000, LENGTH = 256k
    39         RAM_MMU : ORIGIN = 0x81c00000, LENGTH = 16k /* SDRAM on DYCS0 */
    40         RAM_EXT : ORIGIN = 0x81c04000, LENGTH = 4M - 16k /* SDRAM on DYCS0 */
     38        RAM_INT : ORIGIN = 0x08000000, LENGTH = 240k
     39        RAM_FAST : ORIGIN = 0x0803c000, LENGTH = 16k
     40        RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
     41        RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
     42        RAM_EXT : ORIGIN = 0x81c00000, LENGTH = 4M /* SDRAM on DYCS0 */
    4143        NIRVANA : ORIGIN = 0, LENGTH = 0
    4244}
     
    5052REGION_ALIAS ("REGION_DATA", RAM_EXT);
    5153REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
    52 REGION_ALIAS ("REGION_FAST_TEXT", RAM_EXT);
     54REGION_ALIAS ("REGION_FAST_TEXT", RAM_FAST);
    5355REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM_EXT);
    54 REGION_ALIAS ("REGION_FAST_DATA", RAM_EXT);
     56REGION_ALIAS ("REGION_FAST_DATA", RAM_FAST);
    5557REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM_EXT);
    5658REGION_ALIAS ("REGION_BSS", RAM_EXT);
     
    5860REGION_ALIAS ("REGION_STACK", RAM_INT);
    5961
     62lpc32xx_scratch_area = ORIGIN (RAM_SCRATCH);
     63
    6064bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 8192;
    6165
  • c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore

    r305234f7 rf437107  
    6363bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
    6464
    65 bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1M;
     65bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
    6666
    6767INCLUDE linkcmds.lpc32xx
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