Changeset f3a51d62 in rtems


Ignore:
Timestamp:
Mar 21, 2018, 7:11:33 AM (19 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
bb22a3f3
Parents:
a7fa9e91
git-author:
Sebastian Huber <sebastian.huber@…> (03/21/18 07:11:33)
git-committer:
Sebastian Huber <sebastian.huber@…> (03/22/18 06:01:35)
Message:

bsps/powerpc: Remove bsp_timer_internal_clock

The only consumer of this variable was the ppc403 clock driver used by
the

  • haleakala,
  • virtex, and
  • virtex4

BSPs which set bsp_timer_internal_clock unconditionally to true.

Update #3285.

Files:
10 edited

Legend:

Unmodified
Added
Removed
  • bsps/powerpc/virtex/include/bsp.h

    ra7fa9e91 rf3a51d62  
    6262#define BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN
    6363
    64 /* miscellaneous stuff assumed to exist */
    65 extern bool bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
    66 
    6764/* Network Defines */
    6865#if 1 /* EB/doe changes */
  • bsps/powerpc/virtex4/include/bsp.h

    ra7fa9e91 rf3a51d62  
    6464#endif
    6565
    66 /* miscellaneous stuff assumed to exist */
    67 extern bool bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
    68 
    69 #endif /* ASM */
    70 
    7166void BSP_ask_for_reset(void);
    7267
     
    8075#endif
    8176
     77#endif /* ASM */
     78
    8279#endif
  • bsps/powerpc/virtex5/include/bsp.h

    ra7fa9e91 rf3a51d62  
    6464#endif
    6565
    66 /* miscellaneous stuff assumed to exist */
    67 extern bool bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
    68 
    6966/*
    7067 * Bus Frequency
  • c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c

    ra7fa9e91 rf3a51d62  
    7676/* Expected by clock.c */
    7777uint32_t    bsp_clicks_per_usec;
    78 bool        bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
    7978uint32_t    bsp_timer_least_valid;
    8079uint32_t    bsp_timer_average_overhead;
     
    184183  rtems_counter_initialize_converter(bsp_clicks_per_usec * 1000000);
    185184
    186   bsp_timer_internal_clock  = TRUE;
    187185  bsp_timer_average_overhead = 2;
    188186  bsp_timer_least_valid = 3;
  • c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c

    ra7fa9e91 rf3a51d62  
    7171uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
    7272uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
    73 bool       bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
    7473
    7574extern char IntrStack_start [];
  • c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c

    ra7fa9e91 rf3a51d62  
    5050uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
    5151uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
    52 bool       bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
    5352
    5453static const char *bsp_tqm_get_cib_string( const char *cib_id)
  • c/src/lib/libbsp/powerpc/virtex/timer/timer-config.c

    ra7fa9e91 rf3a51d62  
    5757/* Least valid number from timer */
    5858uint32_t bsp_timer_least_valid = 3;
    59 
    60 /* TRUE, when timer runs with CPU clk */
    61 bool bsp_timer_internal_clock = true;
  • c/src/lib/libbsp/powerpc/virtex4/startup/bspstart.c

    ra7fa9e91 rf3a51d62  
    9797/* Expected by clock.c */
    9898uint32_t    bsp_clicks_per_usec;
    99 bool        bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
    10099uint32_t    bsp_timer_least_valid;
    101100uint32_t    bsp_timer_average_overhead;
     
    169168  /* Timebase register ticks/microsecond;  The application may override these */
    170169  bsp_clicks_per_usec        = 350;
    171   bsp_timer_internal_clock   = true;
    172170  bsp_timer_average_overhead = 2;
    173171  bsp_timer_least_valid      = 3;
  • c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c

    ra7fa9e91 rf3a51d62  
    9898/* Expected by clock.c */
    9999uint32_t    bsp_clicks_per_usec;
    100 bool        bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
    101100uint32_t    bsp_timer_least_valid;
    102101uint32_t    bsp_timer_average_overhead;
     
    191190    BSP_bus_frequency / (BSP_time_base_divisor / 1000)
    192191  );
    193   bsp_timer_internal_clock   = true;
    194192  bsp_timer_average_overhead = 2;
    195193  bsp_timer_least_valid      = 3;
  • c/src/lib/libcpu/powerpc/ppc403/clock/clock.c

    ra7fa9e91 rf3a51d62  
    5454
    5555extern uint32_t   bsp_clicks_per_usec;
    56 extern bool       bsp_timer_internal_clock;
    5756
    5857volatile uint32_t Clock_driver_ticks;
     
    172171#ifndef ppc405 /* this is a ppc403 */
    173172  __asm__ volatile ("mfdcr %0, 0xa0" : "=r" (iocr));              /* IOCR */
    174   if (bsp_timer_internal_clock) {
    175     iocr &= ~4;                         /* timer clocked from system clock */
    176   } else {
    177     iocr |= 4;                          /* select external timer clock */
    178   }
     173  iocr &= ~4;                         /* timer clocked from system clock */
    179174  __asm__ volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
    180175
     
    195190#else /* ppc405 */
    196191  __asm__ volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));              /*405GP CPC0_CR1 */
    197   if (bsp_timer_internal_clock) {
    198     iocr &=~0x800000;               /* timer clocked from system clock CETE*/
    199   } else {
    200     iocr |= 0x800000;               /* select external timer clock CETE*/
    201   }
     192  iocr &=~0x800000;               /* timer clocked from system clock CETE*/
    202193  __asm__ volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
    203194
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