Changeset f1f42b4 in rtems
- Timestamp:
- 03/23/99 22:51:05 (24 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- da7a73e
- Parents:
- b6f5f93
- Location:
- c/src
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libchip/network/sonic.c
rb6f5f93 rf1f42b4 24 24 * 25 25 * $Id$ 26 * 27 * This driver was originally written and tested on a DY-4 DMV177, 28 * which had a 100 Mhz PPC603e. 29 * 30 * This driver also works with DP83934CVUL-20/25 MHz, tested on 31 * Tharsys ERC32 VME board. 32 * 33 * Rehaul to fix lost interrupts and buffers, and to use to use 34 * interrupt-free transmission by Jiri, 22/03/1999. 26 35 */ 27 36 … … 51 60 52 61 void *set_vector(void *, unsigned32, unsigned32); 53 54 /*55 * Debug levels56 *57 */58 59 #define SONIC_DEBUG_NONE 0x000060 #define SONIC_DEBUG_ALL 0xFFFF61 #define SONIC_DEBUG_PRINT_REGISTERS 0x000162 #define SONIC_DEBUG_MEMORY 0x000263 #define SONIC_DEBUG_MEMORY_ALLOCATE 0x000464 #define SONIC_DEBUG_MEMORY_DESCRIPTORS 0x000865 #define SONIC_DEBUG_FRAGMENTS 0x000866 #define SONIC_DEBUG_CAM 0x001067 #define SONIC_DEBUG_DESCRIPTORS 0x002068 #define SONIC_DEBUG_ERRORS 0x004069 #define SONIC_DEBUG_DUMP_TX_MBUFS 0x008070 #define SONIC_DEBUG_DUMP_RX_MBUFS 0x010071 72 #define SONIC_DEBUG_DUMP_MBUFS \73 (SONIC_DEBUG_DUMP_TX_MBUFS|SONIC_DEBUG_DUMP_RX_MBUFS)74 75 #define SONIC_DEBUG (SONIC_DEBUG_ERRORS)76 77 /*78 ((SONIC_DEBUG_ALL) & ~(SONIC_DEBUG_PRINT_REGISTERS|SONIC_DEBUG_DUMP_MBUFS))79 ((SONIC_DEBUG_ALL) & ~(SONIC_DEBUG_DUMP_MBUFS))80 */81 82 62 83 63 #if (SONIC_DEBUG & SONIC_DEBUG_DUMP_MBUFS) … … 202 182 TransmitDescriptorPointer_t tdaHead; /* Last filled */ 203 183 TransmitDescriptorPointer_t tdaTail; /* Next to retire */ 204 int tdaActiveCount;205 184 206 185 /* … … 300 279 } 301 280 281 void sonic_disable_interrupts( 282 struct sonic_softc *sc, 283 unsigned32 mask 284 ) 285 { 286 void *rp = sc->sonic; 287 rtems_interrupt_level level; 288 289 rtems_interrupt_disable( level ); 290 (*sc->write_register)( 291 rp, 292 SONIC_REG_IMR, 293 (*sc->read_register)(rp, SONIC_REG_IMR) & ~mask 294 ); 295 rtems_interrupt_enable( level ); 296 } 297 298 void sonic_clear_interrupts( 299 struct sonic_softc *sc, 300 unsigned32 mask 301 ) 302 { 303 void *rp = sc->sonic; 304 rtems_interrupt_level level; 305 306 rtems_interrupt_disable( level ); 307 (*sc->write_register)( rp, SONIC_REG_ISR, mask); 308 rtems_interrupt_enable( level ); 309 } 310 311 void sonic_command( 312 struct sonic_softc *sc, 313 unsigned32 mask 314 ) 315 { 316 void *rp = sc->sonic; 317 rtems_interrupt_level level; 318 319 rtems_interrupt_disable( level ); 320 (*sc->write_register)( rp, SONIC_REG_CR, mask); 321 rtems_interrupt_enable( level ); 322 } 323 302 324 /* 303 325 * Allocate non-cacheable memory on a single 64k page. … … 335 357 SONIC_STATIC void sonic_stop (struct sonic_softc *sc) 336 358 { 337 void *rp = sc->sonic;338 359 struct ifnet *ifp = &sc->arpcom.ac_if; 339 360 … … 343 364 * Stop the transmitter and receiver. 344 365 */ 345 (*sc->write_register)( rp, SONIC_REG_CR, CR_HTX | CR_RXDIS );366 sonic_command(sc, CR_HTX | CR_RXDIS ); 346 367 } 347 368 … … 410 431 * Packet received or receive buffer area exceeded? 411 432 */ 412 if ((imr & (IMR_PRXEN | IMR_RBAEEN)) && 413 (isr & (ISR_PKTRX | ISR_RBAE))) { 433 if (imr & isr & (IMR_PRXEN | IMR_RBAEEN)) { 414 434 imr &= ~(IMR_PRXEN | IMR_RBAEEN); 415 435 sc->rxInterrupts++; 416 436 rtems_event_send (sc->rxDaemonTid, INTERRUPT_EVENT); 437 (*sc->write_register)( rp, SONIC_REG_IMR, imr ); 438 (*sc->write_register)( rp, SONIC_REG_ISR, isr & ISR_PKTRX ); 417 439 } 418 440 419 441 /* 420 442 * Packet started, transmitter done or transmitter error? 421 * /422 if ((imr & (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN)) &&423 (isr & (ISR_PINT | ISR_TXDN | ISR_TXER))) {424 imr &= ~(IMR_PINTEN | IMR_PTXEN | IMR_TXEREN);443 * TX interrupts only occur after an error or when all TDA's are 444 * exhausted and we are waiting for buffer to come free. 445 */ 446 if (imr & isr & (IMR_PINTEN | IMR_TXEREN)) { 425 447 sc->txInterrupts++; 426 448 rtems_event_send (sc->txDaemonTid, INTERRUPT_EVENT); 427 }428 429 (*sc->write_register)( rp, SONIC_REG_IMR, imr ); 449 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); 450 } 451 430 452 } 431 453 … … 451 473 * Repeat for all completed transmit descriptors. 452 474 */ 453 while ((sc->tdaActiveCount != 0) 454 && ((status = sc->tdaTail->status) != 0)) { 475 while ((status = sc->tdaTail->status) != 0) { 455 476 456 477 #if (SONIC_DEBUG & SONIC_DEBUG_DESCRIPTORS) … … 491 512 492 513 (*sc->write_register)( rp, SONIC_REG_CTDA, link ); 493 (*sc->write_register)( rp, SONIC_REG_CR, CR_TXP );514 sonic_command(sc, CR_TXP ); 494 515 } 495 516 } … … 522 543 * Free the packet and reset a couple of fields 523 544 */ 524 sc->tdaActiveCount--;525 545 m = sc->tdaTail->mbufp; 526 546 while ( m ) { … … 529 549 } 530 550 551 /* 531 552 sc->tdaTail->frag[0].frag_link = LSW(sc->tdaTail->link_pad); 532 553 sc->tdaTail->frag_count = 0; 554 */ 555 sc->tdaTail->status = 0; 533 556 534 557 /* … … 548 571 { 549 572 struct sonic_softc *sc = ifp->if_softc; 550 void *rp = sc->sonic;551 573 struct mbuf *l = NULL; 552 574 TransmitDescriptorPointer_t tdp; … … 554 576 unsigned int packetSize; 555 577 int i; 578 rtems_event_set events; 556 579 static char padBuf[64]; 557 580 558 581 /* printf( "sonic_sendpacket %p\n", m ); */ 559 /* 560 * Free up transmit descriptors. 561 */ 562 sonic_retire_tda (sc); 563 564 /* 565 * Wait for transmit descriptor to become available. 566 */ 567 if (sc->tdaActiveCount == sc->tdaCount) { 582 583 584 /* 585 * Wait for transmit descriptor to become available. Only retire TDA's 586 * if there are no more free buffers to minimize TX latency. Retire TDA'a 587 * on the way out. 588 */ 589 590 while (sc->tdaHead->next->status != 0) { 591 592 /* 593 * Free up transmit descriptors 594 */ 595 sonic_retire_tda (sc); 596 597 if (sc->tdaHead->next->status == 0) 598 break; 599 568 600 #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) 569 puts( "Wait for more TDAs" ); 570 #endif 571 572 /* 573 * Clear old events. 574 */ 575 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); 576 577 /* 578 * Wait for transmit descriptor to become available. 579 * Note that the transmit descriptors are checked 580 * *before* * entering the wait loop -- this catches 581 * the possibility that a transmit descriptor became 582 * available between the `if' the started this block, 583 * and the clearing of the interrupt status register. 584 */ 585 sonic_retire_tda (sc); 586 while (sc->tdaActiveCount == sc->tdaCount) { 587 rtems_event_set events; 588 589 #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) 590 printf("blocking until TDAs are available\n"); 601 printf("blocking until TDAs are available\n"); 591 602 #endif 592 603 /* 593 * Enable transmitter interrupts. 604 * Enable PINT interrupts. 605 sonic_clear_interrupts( sc, ISR_PINT ); 606 sonic_enable_interrupts( sc, IMR_PINTEN ); 594 607 */ 595 sonic_enable_interrupts( sc, (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) );596 608 597 609 /* 598 * Wait for interrupt610 * Wait for PINT TX interrupt. Every fourth TX buffer will raise PINT. 599 611 */ 600 612 rtems_bsdnet_event_receive (INTERRUPT_EVENT, 601 613 RTEMS_WAIT|RTEMS_EVENT_ANY, 602 614 RTEMS_NO_TIMEOUT, 603 615 &events); 604 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); 605 sonic_retire_tda (sc); 606 } 616 sonic_disable_interrupts( sc, IMR_PINTEN ); 617 sonic_retire_tda (sc); 607 618 } 608 619 … … 686 697 if ( sc->tdaHead->frag_count ) 687 698 *sc->tdaHead->linkp &= ~TDA_LINK_EOL; 688 sc->tdaActiveCount++;689 699 sc->tdaHead = tdp; 690 700 691 /* XXX not in KA9Q */ 692 sonic_enable_interrupts( sc, (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) ); 693 (*sc->write_register)( rp, SONIC_REG_CR, CR_TXP ); 701 /* Start transmission */ 702 703 sonic_command(sc, CR_TXP ); 704 705 /* 706 * Free up transmit descriptors on the way out. 707 */ 708 sonic_retire_tda (sc); 694 709 } 695 710 … … 837 852 * Restart reception 838 853 */ 839 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_RBAE );840 (*sc->write_register)( rp, SONIC_REG_CR, CR_RXEN );854 sonic_clear_interrupts( sc, ISR_RBAE ); 855 sonic_command( sc, CR_RXEN ); 841 856 } 842 843 /*844 * Clear old packet-received events.845 */846 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PKTRX );847 857 848 858 /* … … 934 944 #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY_DESCRIPTORS) 935 945 sonic_print_rx_descriptor( rdp ); 936 #endif 946 if ((LSW(rdp->mbufp->m_data) != rdp->pkt_lsw) 947 || (MSW(rdp->mbufp->m_data) != rdp->pkt_msw)) 948 printf ("SONIC RDA/RRA %p, %08x\n",rdp->mbufp->m_data,(rdp->pkt_msw << 16) | 949 (rdp->pkt_lsw & 0x0ffff)); 950 #endif 951 rdp->byte_count &= 0x0ffff; /* ERC32 pollutes msb of byte_count */ 937 952 m = rdp->mbufp; 938 953 m->m_len = m->m_pkthdr.len = rdp->byte_count - … … 942 957 m->m_data += sizeof(struct ether_header); 943 958 959 #ifdef CPU_U32_FIX 960 ipalign(m); /* Align packet on 32-bit boundary */ 961 #endif 962 944 963 #if (SONIC_DEBUG & SONIC_DEBUG_DUMP_RX_MBUFS) 945 964 Dump_Buffer( (void *) eh, sizeof(struct ether_header) ); … … 948 967 949 968 /* printf( "ether_input %p\n", m ); */ 969 /* 970 printf( "pkt %p, seq %04x, mbuf %p, m_data %p\n", rdp, rdp->seq_no, m, m->m_data ); 971 printf( "%u, %u\n", ((int*)m->m_data)[6], ((int*)m->m_data)[7]); 972 */ 950 973 ether_input (ifp, eh, m); 974 /* 975 */ 951 976 952 977 /* … … 996 1021 */ 997 1022 if ((*sc->read_register)( rp, SONIC_REG_ISR ) & ISR_RBE) 998 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_RBE );1023 sonic_clear_interrupts( sc, ISR_RBE ); 999 1024 } 1000 1025 else { … … 1017 1042 1018 1043 /* 1019 * Move to next receive descriptor 1020 */ 1021 1044 * Move to next receive descriptor and update EOL 1045 */ 1046 1047 rdp->link |= RDA_LINK_EOL; 1022 1048 rdp->in_use = RDA_FREE; 1049 sc->rdp_last->link &= ~RDA_LINK_EOL; 1050 sc->rdp_last = rdp; 1023 1051 rdp = rdp->next; 1024 rdp->link &= ~RDA_LINK_EOL;1025 1052 1026 1053 } … … 1059 1086 */ 1060 1087 1061 if ( (*sc->read_register)( rp, SONIC_REG_SR ) < SONIC_REVISION_C) {1088 if ( (*sc->read_register)( rp, SONIC_REG_SR ) <= SONIC_REVISION_B ) { 1062 1089 rtems_fatal_error_occurred( 0x0BADF00D ); /* don't eat this part :) */ 1063 1090 } … … 1071 1098 */ 1072 1099 1073 sc->tdaActiveCount = 0;1074 1100 sc->tdaTail = sonic_allocate(sc->tdaCount * sizeof *tdp); 1075 1101 #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) … … 1088 1114 1089 1115 /* XXX not used by the BSD drivers 1116 tdp->frag[0].frag_link = LSW(tdp + 1); 1090 1117 */ 1091 if (i & 1)1118 if (i & 3) 1092 1119 tdp->pkt_config = TDA_CONFIG_PINT; 1093 1120 1094 tdp-> frag_count= 0;1095 tdp->frag [0].frag_link = LSW(tdp + 1);1096 tdp->link_pad 1097 tdp->linkp 1098 tdp->next 1121 tdp->status = 0; 1122 tdp->frag_count = 0; 1123 tdp->link_pad = LSW(tdp + 1) | TDA_LINK_EOL; 1124 tdp->linkp = &((tdp + 1)->frag[0].frag_link); 1125 tdp->next = (TransmitDescriptor_t *)(tdp + 1); 1099 1126 #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY_DESCRIPTORS) 1100 1127 sonic_print_tx_descriptor( tdp ); … … 1143 1170 ordp->next = sc->rda; 1144 1171 ordp->link = LSW(sc->rda) | RDA_LINK_EOL; 1145 sc->rdp_last = rdp;1172 sc->rdp_last = ordp; 1146 1173 1147 1174 /* … … 1320 1347 (*sc->read_register)( rp, SONIC_REG_CAP0 ), 1321 1348 (*sc->read_register)( rp, SONIC_REG_CE )); 1322 #endif1323 1349 1324 1350 (*sc->write_register)( rp, SONIC_REG_CEP, 0 ); /* Select first entry in CAM */ … … 1337 1363 rtems_panic ("SONIC LCAM"); 1338 1364 } 1365 #endif 1339 1366 1340 1367 (*sc->write_register)(rp, SONIC_REG_CR, /* CR_TXP | */CR_RXEN | CR_STP); … … 1387 1414 * Start driver tasks 1388 1415 */ 1416 sc->rxDaemonTid = rtems_bsdnet_newproc ("SNrx", 4096, sonic_rxDaemon, sc); 1389 1417 sc->txDaemonTid = rtems_bsdnet_newproc ("SNtx", 4096, sonic_txDaemon, sc); 1390 sc->rxDaemonTid = rtems_bsdnet_newproc ("SNrx", 4096, sonic_rxDaemon, sc);1391 1418 } 1392 1419 … … 1409 1436 * Enable receiver and transmitter 1410 1437 */ 1411 /* (*sc->write_register)( rp, SONIC_REG_IMR, 0 ); */ 1412 sonic_enable_interrupts( sc, 1413 (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) | (IMR_PRXEN | IMR_RBAEEN) ); 1414 1415 (*sc->write_register)(rp, SONIC_REG_CR, /* CR_TXP | */ CR_RXEN); 1438 sonic_enable_interrupts( sc, IMR_TXEREN | (IMR_PRXEN | IMR_RBAEEN) ); 1439 sonic_command( sc, CR_RXEN ); 1416 1440 } 1417 1441 -
c/src/libchip/network/sonic.c
rb6f5f93 rf1f42b4 24 24 * 25 25 * $Id$ 26 * 27 * This driver was originally written and tested on a DY-4 DMV177, 28 * which had a 100 Mhz PPC603e. 29 * 30 * This driver also works with DP83934CVUL-20/25 MHz, tested on 31 * Tharsys ERC32 VME board. 32 * 33 * Rehaul to fix lost interrupts and buffers, and to use to use 34 * interrupt-free transmission by Jiri, 22/03/1999. 26 35 */ 27 36 … … 51 60 52 61 void *set_vector(void *, unsigned32, unsigned32); 53 54 /*55 * Debug levels56 *57 */58 59 #define SONIC_DEBUG_NONE 0x000060 #define SONIC_DEBUG_ALL 0xFFFF61 #define SONIC_DEBUG_PRINT_REGISTERS 0x000162 #define SONIC_DEBUG_MEMORY 0x000263 #define SONIC_DEBUG_MEMORY_ALLOCATE 0x000464 #define SONIC_DEBUG_MEMORY_DESCRIPTORS 0x000865 #define SONIC_DEBUG_FRAGMENTS 0x000866 #define SONIC_DEBUG_CAM 0x001067 #define SONIC_DEBUG_DESCRIPTORS 0x002068 #define SONIC_DEBUG_ERRORS 0x004069 #define SONIC_DEBUG_DUMP_TX_MBUFS 0x008070 #define SONIC_DEBUG_DUMP_RX_MBUFS 0x010071 72 #define SONIC_DEBUG_DUMP_MBUFS \73 (SONIC_DEBUG_DUMP_TX_MBUFS|SONIC_DEBUG_DUMP_RX_MBUFS)74 75 #define SONIC_DEBUG (SONIC_DEBUG_ERRORS)76 77 /*78 ((SONIC_DEBUG_ALL) & ~(SONIC_DEBUG_PRINT_REGISTERS|SONIC_DEBUG_DUMP_MBUFS))79 ((SONIC_DEBUG_ALL) & ~(SONIC_DEBUG_DUMP_MBUFS))80 */81 82 62 83 63 #if (SONIC_DEBUG & SONIC_DEBUG_DUMP_MBUFS) … … 202 182 TransmitDescriptorPointer_t tdaHead; /* Last filled */ 203 183 TransmitDescriptorPointer_t tdaTail; /* Next to retire */ 204 int tdaActiveCount;205 184 206 185 /* … … 300 279 } 301 280 281 void sonic_disable_interrupts( 282 struct sonic_softc *sc, 283 unsigned32 mask 284 ) 285 { 286 void *rp = sc->sonic; 287 rtems_interrupt_level level; 288 289 rtems_interrupt_disable( level ); 290 (*sc->write_register)( 291 rp, 292 SONIC_REG_IMR, 293 (*sc->read_register)(rp, SONIC_REG_IMR) & ~mask 294 ); 295 rtems_interrupt_enable( level ); 296 } 297 298 void sonic_clear_interrupts( 299 struct sonic_softc *sc, 300 unsigned32 mask 301 ) 302 { 303 void *rp = sc->sonic; 304 rtems_interrupt_level level; 305 306 rtems_interrupt_disable( level ); 307 (*sc->write_register)( rp, SONIC_REG_ISR, mask); 308 rtems_interrupt_enable( level ); 309 } 310 311 void sonic_command( 312 struct sonic_softc *sc, 313 unsigned32 mask 314 ) 315 { 316 void *rp = sc->sonic; 317 rtems_interrupt_level level; 318 319 rtems_interrupt_disable( level ); 320 (*sc->write_register)( rp, SONIC_REG_CR, mask); 321 rtems_interrupt_enable( level ); 322 } 323 302 324 /* 303 325 * Allocate non-cacheable memory on a single 64k page. … … 335 357 SONIC_STATIC void sonic_stop (struct sonic_softc *sc) 336 358 { 337 void *rp = sc->sonic;338 359 struct ifnet *ifp = &sc->arpcom.ac_if; 339 360 … … 343 364 * Stop the transmitter and receiver. 344 365 */ 345 (*sc->write_register)( rp, SONIC_REG_CR, CR_HTX | CR_RXDIS );366 sonic_command(sc, CR_HTX | CR_RXDIS ); 346 367 } 347 368 … … 410 431 * Packet received or receive buffer area exceeded? 411 432 */ 412 if ((imr & (IMR_PRXEN | IMR_RBAEEN)) && 413 (isr & (ISR_PKTRX | ISR_RBAE))) { 433 if (imr & isr & (IMR_PRXEN | IMR_RBAEEN)) { 414 434 imr &= ~(IMR_PRXEN | IMR_RBAEEN); 415 435 sc->rxInterrupts++; 416 436 rtems_event_send (sc->rxDaemonTid, INTERRUPT_EVENT); 437 (*sc->write_register)( rp, SONIC_REG_IMR, imr ); 438 (*sc->write_register)( rp, SONIC_REG_ISR, isr & ISR_PKTRX ); 417 439 } 418 440 419 441 /* 420 442 * Packet started, transmitter done or transmitter error? 421 * /422 if ((imr & (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN)) &&423 (isr & (ISR_PINT | ISR_TXDN | ISR_TXER))) {424 imr &= ~(IMR_PINTEN | IMR_PTXEN | IMR_TXEREN);443 * TX interrupts only occur after an error or when all TDA's are 444 * exhausted and we are waiting for buffer to come free. 445 */ 446 if (imr & isr & (IMR_PINTEN | IMR_TXEREN)) { 425 447 sc->txInterrupts++; 426 448 rtems_event_send (sc->txDaemonTid, INTERRUPT_EVENT); 427 }428 429 (*sc->write_register)( rp, SONIC_REG_IMR, imr ); 449 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); 450 } 451 430 452 } 431 453 … … 451 473 * Repeat for all completed transmit descriptors. 452 474 */ 453 while ((sc->tdaActiveCount != 0) 454 && ((status = sc->tdaTail->status) != 0)) { 475 while ((status = sc->tdaTail->status) != 0) { 455 476 456 477 #if (SONIC_DEBUG & SONIC_DEBUG_DESCRIPTORS) … … 491 512 492 513 (*sc->write_register)( rp, SONIC_REG_CTDA, link ); 493 (*sc->write_register)( rp, SONIC_REG_CR, CR_TXP );514 sonic_command(sc, CR_TXP ); 494 515 } 495 516 } … … 522 543 * Free the packet and reset a couple of fields 523 544 */ 524 sc->tdaActiveCount--;525 545 m = sc->tdaTail->mbufp; 526 546 while ( m ) { … … 529 549 } 530 550 551 /* 531 552 sc->tdaTail->frag[0].frag_link = LSW(sc->tdaTail->link_pad); 532 553 sc->tdaTail->frag_count = 0; 554 */ 555 sc->tdaTail->status = 0; 533 556 534 557 /* … … 548 571 { 549 572 struct sonic_softc *sc = ifp->if_softc; 550 void *rp = sc->sonic;551 573 struct mbuf *l = NULL; 552 574 TransmitDescriptorPointer_t tdp; … … 554 576 unsigned int packetSize; 555 577 int i; 578 rtems_event_set events; 556 579 static char padBuf[64]; 557 580 558 581 /* printf( "sonic_sendpacket %p\n", m ); */ 559 /* 560 * Free up transmit descriptors. 561 */ 562 sonic_retire_tda (sc); 563 564 /* 565 * Wait for transmit descriptor to become available. 566 */ 567 if (sc->tdaActiveCount == sc->tdaCount) { 582 583 584 /* 585 * Wait for transmit descriptor to become available. Only retire TDA's 586 * if there are no more free buffers to minimize TX latency. Retire TDA'a 587 * on the way out. 588 */ 589 590 while (sc->tdaHead->next->status != 0) { 591 592 /* 593 * Free up transmit descriptors 594 */ 595 sonic_retire_tda (sc); 596 597 if (sc->tdaHead->next->status == 0) 598 break; 599 568 600 #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) 569 puts( "Wait for more TDAs" ); 570 #endif 571 572 /* 573 * Clear old events. 574 */ 575 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); 576 577 /* 578 * Wait for transmit descriptor to become available. 579 * Note that the transmit descriptors are checked 580 * *before* * entering the wait loop -- this catches 581 * the possibility that a transmit descriptor became 582 * available between the `if' the started this block, 583 * and the clearing of the interrupt status register. 584 */ 585 sonic_retire_tda (sc); 586 while (sc->tdaActiveCount == sc->tdaCount) { 587 rtems_event_set events; 588 589 #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) 590 printf("blocking until TDAs are available\n"); 601 printf("blocking until TDAs are available\n"); 591 602 #endif 592 603 /* 593 * Enable transmitter interrupts. 604 * Enable PINT interrupts. 605 sonic_clear_interrupts( sc, ISR_PINT ); 606 sonic_enable_interrupts( sc, IMR_PINTEN ); 594 607 */ 595 sonic_enable_interrupts( sc, (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) );596 608 597 609 /* 598 * Wait for interrupt610 * Wait for PINT TX interrupt. Every fourth TX buffer will raise PINT. 599 611 */ 600 612 rtems_bsdnet_event_receive (INTERRUPT_EVENT, 601 613 RTEMS_WAIT|RTEMS_EVENT_ANY, 602 614 RTEMS_NO_TIMEOUT, 603 615 &events); 604 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); 605 sonic_retire_tda (sc); 606 } 616 sonic_disable_interrupts( sc, IMR_PINTEN ); 617 sonic_retire_tda (sc); 607 618 } 608 619 … … 686 697 if ( sc->tdaHead->frag_count ) 687 698 *sc->tdaHead->linkp &= ~TDA_LINK_EOL; 688 sc->tdaActiveCount++;689 699 sc->tdaHead = tdp; 690 700 691 /* XXX not in KA9Q */ 692 sonic_enable_interrupts( sc, (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) ); 693 (*sc->write_register)( rp, SONIC_REG_CR, CR_TXP ); 701 /* Start transmission */ 702 703 sonic_command(sc, CR_TXP ); 704 705 /* 706 * Free up transmit descriptors on the way out. 707 */ 708 sonic_retire_tda (sc); 694 709 } 695 710 … … 837 852 * Restart reception 838 853 */ 839 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_RBAE );840 (*sc->write_register)( rp, SONIC_REG_CR, CR_RXEN );854 sonic_clear_interrupts( sc, ISR_RBAE ); 855 sonic_command( sc, CR_RXEN ); 841 856 } 842 843 /*844 * Clear old packet-received events.845 */846 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_PKTRX );847 857 848 858 /* … … 934 944 #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY_DESCRIPTORS) 935 945 sonic_print_rx_descriptor( rdp ); 936 #endif 946 if ((LSW(rdp->mbufp->m_data) != rdp->pkt_lsw) 947 || (MSW(rdp->mbufp->m_data) != rdp->pkt_msw)) 948 printf ("SONIC RDA/RRA %p, %08x\n",rdp->mbufp->m_data,(rdp->pkt_msw << 16) | 949 (rdp->pkt_lsw & 0x0ffff)); 950 #endif 951 rdp->byte_count &= 0x0ffff; /* ERC32 pollutes msb of byte_count */ 937 952 m = rdp->mbufp; 938 953 m->m_len = m->m_pkthdr.len = rdp->byte_count - … … 942 957 m->m_data += sizeof(struct ether_header); 943 958 959 #ifdef CPU_U32_FIX 960 ipalign(m); /* Align packet on 32-bit boundary */ 961 #endif 962 944 963 #if (SONIC_DEBUG & SONIC_DEBUG_DUMP_RX_MBUFS) 945 964 Dump_Buffer( (void *) eh, sizeof(struct ether_header) ); … … 948 967 949 968 /* printf( "ether_input %p\n", m ); */ 969 /* 970 printf( "pkt %p, seq %04x, mbuf %p, m_data %p\n", rdp, rdp->seq_no, m, m->m_data ); 971 printf( "%u, %u\n", ((int*)m->m_data)[6], ((int*)m->m_data)[7]); 972 */ 950 973 ether_input (ifp, eh, m); 974 /* 975 */ 951 976 952 977 /* … … 996 1021 */ 997 1022 if ((*sc->read_register)( rp, SONIC_REG_ISR ) & ISR_RBE) 998 (*sc->write_register)( rp, SONIC_REG_ISR, ISR_RBE );1023 sonic_clear_interrupts( sc, ISR_RBE ); 999 1024 } 1000 1025 else { … … 1017 1042 1018 1043 /* 1019 * Move to next receive descriptor 1020 */ 1021 1044 * Move to next receive descriptor and update EOL 1045 */ 1046 1047 rdp->link |= RDA_LINK_EOL; 1022 1048 rdp->in_use = RDA_FREE; 1049 sc->rdp_last->link &= ~RDA_LINK_EOL; 1050 sc->rdp_last = rdp; 1023 1051 rdp = rdp->next; 1024 rdp->link &= ~RDA_LINK_EOL;1025 1052 1026 1053 } … … 1059 1086 */ 1060 1087 1061 if ( (*sc->read_register)( rp, SONIC_REG_SR ) < SONIC_REVISION_C) {1088 if ( (*sc->read_register)( rp, SONIC_REG_SR ) <= SONIC_REVISION_B ) { 1062 1089 rtems_fatal_error_occurred( 0x0BADF00D ); /* don't eat this part :) */ 1063 1090 } … … 1071 1098 */ 1072 1099 1073 sc->tdaActiveCount = 0;1074 1100 sc->tdaTail = sonic_allocate(sc->tdaCount * sizeof *tdp); 1075 1101 #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) … … 1088 1114 1089 1115 /* XXX not used by the BSD drivers 1116 tdp->frag[0].frag_link = LSW(tdp + 1); 1090 1117 */ 1091 if (i & 1)1118 if (i & 3) 1092 1119 tdp->pkt_config = TDA_CONFIG_PINT; 1093 1120 1094 tdp-> frag_count= 0;1095 tdp->frag [0].frag_link = LSW(tdp + 1);1096 tdp->link_pad 1097 tdp->linkp 1098 tdp->next 1121 tdp->status = 0; 1122 tdp->frag_count = 0; 1123 tdp->link_pad = LSW(tdp + 1) | TDA_LINK_EOL; 1124 tdp->linkp = &((tdp + 1)->frag[0].frag_link); 1125 tdp->next = (TransmitDescriptor_t *)(tdp + 1); 1099 1126 #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY_DESCRIPTORS) 1100 1127 sonic_print_tx_descriptor( tdp ); … … 1143 1170 ordp->next = sc->rda; 1144 1171 ordp->link = LSW(sc->rda) | RDA_LINK_EOL; 1145 sc->rdp_last = rdp;1172 sc->rdp_last = ordp; 1146 1173 1147 1174 /* … … 1320 1347 (*sc->read_register)( rp, SONIC_REG_CAP0 ), 1321 1348 (*sc->read_register)( rp, SONIC_REG_CE )); 1322 #endif1323 1349 1324 1350 (*sc->write_register)( rp, SONIC_REG_CEP, 0 ); /* Select first entry in CAM */ … … 1337 1363 rtems_panic ("SONIC LCAM"); 1338 1364 } 1365 #endif 1339 1366 1340 1367 (*sc->write_register)(rp, SONIC_REG_CR, /* CR_TXP | */CR_RXEN | CR_STP); … … 1387 1414 * Start driver tasks 1388 1415 */ 1416 sc->rxDaemonTid = rtems_bsdnet_newproc ("SNrx", 4096, sonic_rxDaemon, sc); 1389 1417 sc->txDaemonTid = rtems_bsdnet_newproc ("SNtx", 4096, sonic_txDaemon, sc); 1390 sc->rxDaemonTid = rtems_bsdnet_newproc ("SNrx", 4096, sonic_rxDaemon, sc);1391 1418 } 1392 1419 … … 1409 1436 * Enable receiver and transmitter 1410 1437 */ 1411 /* (*sc->write_register)( rp, SONIC_REG_IMR, 0 ); */ 1412 sonic_enable_interrupts( sc, 1413 (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) | (IMR_PRXEN | IMR_RBAEEN) ); 1414 1415 (*sc->write_register)(rp, SONIC_REG_CR, /* CR_TXP | */ CR_RXEN); 1438 sonic_enable_interrupts( sc, IMR_TXEREN | (IMR_PRXEN | IMR_RBAEEN) ); 1439 sonic_command( sc, CR_RXEN ); 1416 1440 } 1417 1441
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