Changeset f0a7f52 in rtems


Ignore:
Timestamp:
May 21, 2012, 9:04:21 AM (8 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Children:
da0e045
Parents:
ffd9575 (diff), 1901afc5 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge branch 'upstream'

Files:
1 added
1 deleted
52 edited

Legend:

Unmodified
Added
Removed
  • aclocal/bsp-alias.m4

    rffd9575 rf0a7f52  
    1 dnl
    2 
    31dnl _RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
    42dnl Internal subroutine to RTEMS_BSP_ALIAS
  • aclocal/project-root.m4

    rffd9575 rf0a7f52  
    1 dnl
    2 
    31dnl
    42dnl PROJECT_TOPdir     .. relative path to the top of the build-tree
    53dnl PROJECT_ROOT       .. relative path to the top of the temporary
    64dnl                       installation directory inside the build-tree
    7 dnl RTEMS_TOPdir       .. relative path of a subpackage's configure.in to the
    8 dnl                       toplevel configure.in of the source-tree
     5dnl RTEMS_TOPdir       .. relative path of a subpackage's configure.ac to the
     6dnl                       toplevel configure.ac of the source-tree
    97dnl RTEMS_ROOT         .. path to the top of a bsp's build directory
    108dnl                       [Applied by custom/*.cfg, depredicated otherwise]
  • aclocal/rtems-top.m4

    rffd9575 rf0a7f52  
    55dnl RTEMS_TOP($1)
    66dnl
    7 dnl $1 .. relative path from this configure.in to the toplevel configure.in
     7dnl $1 .. relative path from this configure.ac to the toplevel configure.ac
    88dnl
    99AC_DEFUN([RTEMS_TOP],
  • c/src/aclocal/config-subdirs.m4

    rffd9575 rf0a7f52  
    44dnl
    55dnl Contains parts derived from autoconf-2.13 AC_OUTPUT_SUBDIRS and Cygnus'
    6 dnl configure.in.
     6dnl configure.ac.
    77dnl
    88
  • c/src/aclocal/prog-cxx.m4

    rffd9575 rf0a7f52  
    2323     [Inconsistency in compiler configuration:]
    2424     [Target C compiler and target C++ compiler]
    25      [must both either be cross compilers or native compilers]
    26      [Hint: If building a posix bsp: LD_LIBRARY_PATH?] )
     25     [must both either be cross compilers or native compilers])
    2726  fi
    2827else
  • c/src/aclocal/rtems-top.m4

    rffd9575 rf0a7f52  
    55dnl RTEMS_TOP($1)
    66dnl
    7 dnl $1 .. relative path from this configure.in to the toplevel configure.in
     7dnl $1 .. relative path from this configure.ac to the toplevel configure.ac
    88dnl
    99AC_DEFUN([RTEMS_TOP],
  • c/src/aclocal/target.m4

    rffd9575 rf0a7f52  
    7777dnl
    7878dnl Contains parts derived from autoconf-2.13 AC_OUTPUT_SUBDIRS and Cygnus'
    79 dnl configure.in.
     79dnl configure.ac.
    8080dnl
    8181
  • c/src/lib/libbsp/i386/shared/pci/pcibios.c

    rffd9575 rf0a7f52  
    220220  return PCIB_ERR_SUCCESS;
    221221}
    222 
    223 #define PCI_MULTI_FUNCTION      0x80
    224222
    225223static uint8_t ucBusCount = 0xff;
  • c/src/lib/libbsp/mips/malta/pci/pci.c

    rffd9575 rf0a7f52  
    3737#define PCI_CONFIG_DATA      0xcfc
    3838#endif
    39 
    40 #define PCI_INVALID_VENDORDEVICEID  0xffffffff
    41 #define PCI_MULTI_FUNCTION    0x80
    4239
    4340/* define a shortcut */
     
    728725      /* got a device */
    729726      pci_read_config_byte(pbus, pslot, 0, PCI_HEADER_TYPE, &cvalue);
    730       nfuns = cvalue & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1;
     727      nfuns = cvalue & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1;
    731728      for (pfun=0; pfun< nfuns; pfun++) {
    732729
     
    10331030
    10341031    pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &ucHeader);
    1035     if (ucHeader & PCI_MULTI_FUNCTION)  {
     1032    if (ucHeader & PCI_HEADER_TYPE_MULTI_FUNCTION)  {
    10361033      ucNumFuncs = PCI_MAX_FUNCTIONS;
    10371034    } else {
  • c/src/lib/libbsp/mips/malta/pci/pcifinddevice.c

    rffd9575 rf0a7f52  
    6363 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    6464 */
    65 #define PCI_INVALID_VENDORDEVICEID  0xffffffff
    66 #define PCI_MULTI_FUNCTION      0x80
    6765
    6866#define PCI_DEBUG
     
    246244            );
    247245          #endif
    248           hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
     246          hd = (hd & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
    249247        }
    250248
  • c/src/lib/libbsp/mips/malta/pci/pcilistdevices.c

    rffd9575 rf0a7f52  
    1818 * List all PCI Devices
    1919 */
    20 
    21 #define PCI_INVALID_VENDORDEVICEID  0xffffffff
    22 #define PCI_MULTI_FUNCTION      0x80
    2320
    2421#define PCI_DEBUG
     
    9390        if ( 0 == fun ) {
    9491          pci_read_config_byte(bus,dev,0, PCI_HEADER_TYPE, &hd);
    95           hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
     92          hd = (hd & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
    9693        }
    9794
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-cache.S

    rffd9575 rf0a7f52  
    88
    99/*
    10  * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
     
    3636        li      r4, 0x4
    3737
    38 #ifdef MPC55XX_HAS_INSTRUCTION_CACHE
     38#if defined(BSP_INSTRUCTION_CACHE_ENABLED) \
     39  && defined(MPC55XX_HAS_INSTRUCTION_CACHE)
    3940
    4041start_instruction_cache_invalidation:
     
    6566        mtspr   FSL_EIS_L1CSR1, r6
    6667
    67 #endif /* MPC55XX_HAS_INSTRUCTION_CACHE */
     68#endif
    6869
    69 #if defined(MPC55XX_HAS_DATA_CACHE) || defined(MPC55XX_HAS_UNIFIED_CACHE)
     70#if (defined(BSP_DATA_CACHE_ENABLED) && defined(MPC55XX_HAS_DATA_CACHE)) \
     71  || ((defined(BSP_DATA_CACHE_ENABLED) \
     72    || defined(BSP_INSTRUCTION_CACHE_ENABLED)) \
     73      && defined(MPC55XX_HAS_UNIFIED_CACHE))
    7074
    7175start_data_cache_invalidation:
     
    101105        mtspr   FSL_EIS_L1CSR0, r6
    102106
    103 #endif /* defined(MPC55XX_HAS_DATA_CACHE) || defined(MPC55XX_HAS_UNIFIED_CACHE) */
     107#endif
    104108
    105109        /* Return */
  • c/src/lib/libbsp/powerpc/mvme5500/Makefile.am

    rffd9575 rf0a7f52  
    5252    ../../powerpc/shared/console/console.c
    5353
    54 include_bsp_HEADERS += pci/gtpcireg.h pci/pci.h
     54include_bsp_HEADERS += pci/gtpcireg.h
     55include_bsp_HEADERS += ../../powerpc/shared/pci/pci.h
    5556# pci
    5657libbsp_a_SOURCES += pci/pci.c pci/pci_interface.c pci/detect_host_bridge.c \
  • c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c

    rffd9575 rf0a7f52  
    310310  sprintf(sc->dv_xname, "%s%d", name, unit);
    311311
    312   if (pci_find_device(PCI_VENDOR_ID_INTEL,PCI_DEVICE_INTEL_82544EI_COPPER,
     312  if (pci_find_device(PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_82544EI_COPPER,
    313313                        unit-1,&b, &d, &f))
    314314    rtems_panic("i82544EI device ID not found\n");
  • c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c

    rffd9575 rf0a7f52  
    2222#define PCI_DEBUG 0
    2323
    24 #define PCI_INVALID_VENDORDEVICEID      0xffffffff
    25 #define PCI_MULTI_FUNCTION              0x80
    2624#define HOSTBRIDGET_ERROR               0xf0000000
    2725
  • c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c

    rffd9575 rf0a7f52  
    5555#endif
    5656
    57 #define PCI_INVALID_VENDORDEVICEID      0xffffffff
    58 #define PCI_MULTI_FUNCTION              0x80
    5957#define HOSTBRIDGET_ERROR               0xf0000000
    6058
     
    368366                          PCI_CACHE_LINE_SIZE,
    369367                          &ulHeader);
    370       if ((ulHeader>>16)&PCI_MULTI_FUNCTION)
     368      if ((ulHeader>>16)&PCI_HEADER_TYPE_MULTI_FUNCTION)
    371369         ucNumFuncs=PCI_MAX_FUNCTIONS;
    372370      else
     
    412410}
    413411
    414 void FixupPCI( struct _int_map *bspmap, int (*swizzler)(int,int) )
     412void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) )
    415413{
    416414}
  • c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c

    rffd9575 rf0a7f52  
    1010 *
    1111 */
    12 
    13 #define PCI_INVALID_VENDORDEVICEID      0xffffffff
    14 #define PCI_MULTI_FUNCTION                      0x80
    15 
    1612
    1713#include <bsp/pci.h>
     
    4339      for (dev=0; dev<PCI_MAX_DEVICES; dev++) {
    4440          pci_read_config_byte(bus, dev, 0, PCI_HEADER_TYPE, &hd);
    45           hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
     41          hd = (hd & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
    4642          for (fun=0; fun<hd; fun++) {
    4743              /*
  • c/src/lib/libbsp/powerpc/mvme5500/preinstall.am

    rffd9575 rf0a7f52  
    7474PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gtpcireg.h
    7575
    76 $(PROJECT_INCLUDE)/bsp/pci.h: pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     76$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
    7777        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h
    7878PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h
  • c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c

    rffd9575 rf0a7f52  
    88
    99/*
    10  * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2010-2012 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
     
    9393
    9494  /* Initialize some console parameters */
    95   for (i = 0; i < Console_Port_Count; ++i) {
     95  for (i = 0; i < Console_Configuration_Count; ++i) {
    9696    console_tbl *ct = &Console_Configuration_Ports[i];
    9797
  • c/src/lib/libbsp/powerpc/shared/pci/pci.c

    rffd9575 rf0a7f52  
    3434#define PCI_CONFIG_DATA      0xcfc
    3535#endif
    36 
    37 #define PCI_INVALID_VENDORDEVICEID  0xffffffff
    38 #define PCI_MULTI_FUNCTION    0x80
    3936
    4037/* define a shortcut */
     
    412409          /* got a device */
    413410          pci_read_config_byte(pbus, pslot, 0, PCI_HEADER_TYPE, &cvalue);
    414           nfuns = cvalue & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1;
     411          nfuns = cvalue & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1;
    415412
    416413          for (pfun=0; pfun< nfuns; pfun++) {
     
    605602    }
    606603    pci_read_config_byte(0, ucSlotNumber, 0, PCI_HEADER_TYPE, &ucHeader);
    607     if (ucHeader&PCI_MULTI_FUNCTION)  {
     604    if (ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION)  {
    608605      ucNumFuncs=PCI_MAX_FUNCTIONS;
    609606    } else {
  • c/src/lib/libbsp/powerpc/shared/pci/pcifinddevice.c

    rffd9575 rf0a7f52  
    4747 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    4848 */
    49 #define PCI_INVALID_VENDORDEVICEID  0xffffffff
    50 #define PCI_MULTI_FUNCTION      0x80
    5149
    5250#include <inttypes.h>
     
    189187         if ( 0 == fun ) {
    190188           pci_read_config_byte(bus,dev,0, PCI_HEADER_TYPE, &hd);
    191            hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
     189           hd = (hd & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
    192190                 }
    193191
  • c/src/lib/libbsp/sparc/Makefile.am

    rffd9575 rf0a7f52  
    1515EXTRA_DIST += shared/include/ambapp.h
    1616EXTRA_DIST += shared/include/ambapp_ids.h
     17EXTRA_DIST += shared/include/grlib.h
    1718EXTRA_DIST += shared/amba/ambapp.c
    1819EXTRA_DIST += shared/amba/ambapp_alloc.c
  • c/src/lib/libbsp/sparc/leon2/Makefile.am

    rffd9575 rf0a7f52  
    7979include_HEADERS += ../../sparc/shared/include/ambapp.h
    8080include_HEADERS += ../../sparc/shared/include/ambapp_ids.h
     81include_HEADERS += ../../sparc/shared/include/grlib.h
    8182libbsp_a_SOURCES += ../../sparc/shared/amba/ambapp.c
    8283libbsp_a_SOURCES += ../../sparc/shared/amba/ambapp_alloc.c
  • c/src/lib/libbsp/sparc/leon2/pci/pci.c

    rffd9575 rf0a7f52  
    4444#define PCI_CONFIG_DATA                 0xcfc
    4545#endif
    46 
    47 #define PCI_INVALID_VENDORDEVICEID      0xffffffff
    48 #define PCI_MULTI_FUNCTION              0x80
    4946
    5047/* define a shortcut */
     
    443440        pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
    444441
    445         if(header & PCI_MULTI_FUNCTION) {
     442        if(header & PCI_HEADER_TYPE_MULTI_FUNCTION)     {
    446443            numfuncs = PCI_MAX_FUNCTIONS;
    447444        }
     
    536533        pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
    537534
    538         if(header & PCI_MULTI_FUNCTION) {
     535        if(header & PCI_HEADER_TYPE_MULTI_FUNCTION)     {
    539536            numfuncs = PCI_MAX_FUNCTIONS;
    540537        }
     
    618615                                   PCI_HEADER_TYPE,
    619616                                   &ucHeader);
    620         if(ucHeader&PCI_MULTI_FUNCTION) {
     617        if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION)     {
    621618            ucNumFuncs=PCI_MAX_FUNCTIONS;
    622619        }
  • c/src/lib/libbsp/sparc/leon2/preinstall.am

    rffd9575 rf0a7f52  
    162162PREINSTALL_FILES += $(PROJECT_INCLUDE)/ambapp_ids.h
    163163
     164$(PROJECT_INCLUDE)/grlib.h: ../../sparc/shared/include/grlib.h $(PROJECT_INCLUDE)/$(dirstamp)
     165        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/grlib.h
     166PREINSTALL_FILES += $(PROJECT_INCLUDE)/grlib.h
     167
    164168$(PROJECT_INCLUDE)/i2cmst.h: ../../sparc/shared/include/i2cmst.h $(PROJECT_INCLUDE)/$(dirstamp)
    165169        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/i2cmst.h
  • c/src/lib/libbsp/sparc/leon2/rasta/rasta.c

    rffd9575 rf0a7f52  
    1111#include <rasta.h>
    1212#include <ambapp.h>
     13#include <grlib.h>
    1314#include <grcan_rasta.h>
    1415#include <grspw_rasta.h>
     
    4243#endif
    4344
    44 /*
    45 typedef struct {
    46   volatile unsigned int ilevel;
    47   volatile unsigned int ipend;
    48   volatile unsigned int iforce;
    49   volatile unsigned int iclear;
    50   volatile unsigned int mpstat;
    51   volatile unsigned int notused01;
    52   volatile unsigned int notused02;
    53   volatile unsigned int notused03;
    54   volatile unsigned int notused10;
    55   volatile unsigned int notused11;
    56   volatile unsigned int notused12;
    57   volatile unsigned int notused13;
    58   volatile unsigned int notused20;
    59   volatile unsigned int notused21;
    60   volatile unsigned int notused22;
    61   volatile unsigned int notused23;
    62   volatile unsigned int mask[16];
    63   volatile unsigned int force[16];
    64 } LEON3_IrqCtrl_Regs_Map;
    65 */
    6645static int bus, dev, fun;
    6746
    68 LEON3_IrqCtrl_Regs_Map *irq = NULL;
    69 LEON_Register_Map      *regs = (LEON_Register_Map *)0x80000000;
     47struct irqmp_regs *irq = NULL;
     48LEON_Register_Map *regs = (LEON_Register_Map *)0x80000000;
    7049
    7150struct gpio_reg *gpio0, *gpio1;
     
    292271#endif
    293272    /* Set up rasta irq controller */
    294     irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET);
     273    irq = (struct irqmp_regs *) (bar0+IRQ_OFFSET);
    295274    irq->iclear = 0xffff;
    296275    irq->ilevel = 0;
  • c/src/lib/libbsp/sparc/leon3/Makefile.am

    rffd9575 rf0a7f52  
    4545include_HEADERS += ../../sparc/shared/include/ambapp.h
    4646include_HEADERS += ../../sparc/shared/include/ambapp_ids.h
     47include_HEADERS += ../../sparc/shared/include/grlib.h
    4748libbsp_a_SOURCES += amba/amba.c
    4849libbsp_a_SOURCES += ../../sparc/shared/amba/ambapp.c
  • c/src/lib/libbsp/sparc/leon3/amba/amba.c

    rffd9575 rf0a7f52  
    2626
    2727/* Pointers to Interrupt Controller configuration registers */
    28 volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs;
     28volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
    2929
    3030/*
     
    6262  }
    6363
    64   LEON3_IrqCtrl_Regs = (volatile LEON3_IrqCtrl_Regs_Map *)
    65                        DEV_TO_APB(adev)->start;
     64  LEON3_IrqCtrl_Regs = (volatile struct irqmp_regs *)DEV_TO_APB(adev)->start;
    6665  if ((LEON3_IrqCtrl_Regs->ampctrl >> 28) > 0) {
    6766    /* IRQ Controller has support for multiple IRQ Controllers, each
     
    8685                                 ambapp_find_by_idx, NULL);
    8786  if (adev) {
    88     LEON3_Timer_Regs = (volatile LEON3_Timer_Regs_Map *)DEV_TO_APB(adev)->start;
     87    LEON3_Timer_Regs = (volatile struct gptimer_regs *)DEV_TO_APB(adev)->start;
    8988
    9089    /* Register AMBA Bus Frequency */
  • c/src/lib/libbsp/sparc/leon3/clock/ckinit.c

    rffd9575 rf0a7f52  
    3939
    4040
    41 volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs = 0;
     41volatile struct gptimer_regs *LEON3_Timer_Regs = 0;
    4242static int clkirq;
    4343
     
    6666    if (adev) { \
    6767      /* Found APB GPTIMER Timer */ \
    68       LEON3_Timer_Regs = (volatile LEON3_Timer_Regs_Map *) \
     68      LEON3_Timer_Regs = (volatile struct gptimer_regs *) \
    6969                         DEV_TO_APB(adev)->start; \
    70       clkirq = (LEON3_Timer_Regs->status & 0xf8) >> 3; \
     70      clkirq = (LEON3_Timer_Regs->cfg & 0xf8) >> 3; \
    7171      \
    7272      Adjust_clkirq_for_node(); \
     
    8484      rtems_configuration_get_microseconds_per_tick() - 1; \
    8585    \
    86     LEON3_Timer_Regs->timer[LEON3_CLOCK_INDEX].conf = \
     86    LEON3_Timer_Regs->timer[LEON3_CLOCK_INDEX].ctrl = \
    8787      LEON3_GPTIMER_EN | LEON3_GPTIMER_RL | \
    8888        LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN; \
     
    9292  do { \
    9393    LEON_Mask_interrupt(LEON_TRAP_TYPE(clkirq)); \
    94     LEON3_Timer_Regs->timer[LEON3_CLOCK_INDEX].conf = 0; \
     94    LEON3_Timer_Regs->timer[LEON3_CLOCK_INDEX].ctrl = 0; \
    9595  } while (0)
    9696
  • c/src/lib/libbsp/sparc/leon3/console/console.c

    rffd9575 rf0a7f52  
    5050
    5151extern void apbuart_outbyte_polled(
    52   ambapp_apb_uart *regs,
     52  struct apbuart_regs *regs,
    5353  unsigned char ch,
    5454  int do_cr_on_newline,
     
    5757
    5858
     59/* body is in printk_support.c */
     60
     61/*
     62 *  apbuart_inbyte_nonblocking
     63 *
     64 *  This routine polls for a character.
     65 */
     66
     67extern int apbuart_inbyte_nonblocking(struct apbuart_regs *regs);
     68
    5969/* body is in debugputs.c */
    6070
    61 /*
    62  *  apbuart_inbyte_nonblocking
    63  *
    64  *  This routine polls for a character.
    65  */
    66 
    67 extern int apbuart_inbyte_nonblocking(ambapp_apb_uart *regs);
    68 
    69 /* body is in debugputs.c */
    70 
    7171struct apbuart_priv {
    72   ambapp_apb_uart *regs;
     72  struct apbuart_regs *regs;
    7373  unsigned int freq_hz;
    7474#if CONSOLE_USE_INTERRUPTS
     
    253253
    254254  /* Extract needed information of one APBUART */
    255   apbuarts[uarts].regs = (ambapp_apb_uart *)apb->start;
     255  apbuarts[uarts].regs = (struct apbuart_regs *)apb->start;
    256256#if CONSOLE_USE_INTERRUPTS
    257257  apbuarts[uarts].irq = apb->irq;
  • c/src/lib/libbsp/sparc/leon3/console/printk_support.c

    rffd9575 rf0a7f52  
    3030 */
    3131int debug_uart_index __attribute__((weak)) = 0;
    32 ambapp_apb_uart *dbg_uart = NULL;
     32struct apbuart_regs *dbg_uart = NULL;
    3333
    3434/* Before UART driver has registered (or when no UART is available), calls to
     
    7575     */
    7676    apb = (struct ambapp_apb_info *)adev->devinfo;
    77     dbg_uart = (ambapp_apb_uart *)apb->start;
     77    dbg_uart = (struct apbuart_regs *)apb->start;
    7878    dbg_uart->ctrl |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
    7979    dbg_uart->status = 0;
     
    8989 */
    9090void apbuart_outbyte_polled(
    91   ambapp_apb_uart *regs,
     91  struct apbuart_regs *regs,
    9292  unsigned char ch,
    9393  int do_cr_on_newline,
     
    122122 *  This routine polls for a character.
    123123 */
    124 int apbuart_inbyte_nonblocking(ambapp_apb_uart *regs)
     124int apbuart_inbyte_nonblocking(struct apbuart_regs *regs)
    125125{
    126126  /* Clear errors */
  • c/src/lib/libbsp/sparc/leon3/include/amba.h

    rffd9575 rf0a7f52  
    2626
    2727#include <ambapp.h>
     28#include <grlib.h>
    2829
    2930#ifdef __cplusplus
  • c/src/lib/libbsp/sparc/leon3/include/leon.h

    rffd9575 rf0a7f52  
    4444  ( (_trap) >= 0x11 && \
    4545    (_trap) <= 0x1F )
    46 
    47 typedef struct {
    48   volatile unsigned int value;
    49   volatile unsigned int reload;
    50   volatile unsigned int conf;
    51   volatile unsigned int notused;
    52 } LEON3_Timer_SubType;
    53 
    54 typedef struct {
    55   volatile unsigned int scaler_value;   /* common timer registers */
    56   volatile unsigned int scaler_reload;
    57   volatile unsigned int status;
    58   volatile unsigned int notused;
    59   LEON3_Timer_SubType timer[8];
    60 } LEON3_Timer_Regs_Map;
    61 
    62 typedef struct {
    63   volatile unsigned int iodata;
    64   volatile unsigned int ioout;
    65   volatile unsigned int iodir;
    66   volatile unsigned int irqmask;
    67   volatile unsigned int irqpol;
    68   volatile unsigned int irqedge;
    69 } LEON3_IOPORT_Regs_Map;
    7046
    7147/* /\* */
     
    138114#define LEON_REG_UART_CTRL_LB     0x00000080 /* Loop Back enable */
    139115
    140 extern volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs;  /* LEON3 Interrupt Controller */
    141 extern volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs; /* LEON3 GP Timer */
     116extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;  /* LEON3 Interrupt Controller */
     117extern volatile struct gptimer_regs *LEON3_Timer_Regs; /* LEON3 GP Timer */
    142118
    143119/* LEON3 CPU Index of boot CPU */
  • c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c

    rffd9575 rf0a7f52  
    3535{
    3636  unsigned long addr_mctrl = 0;
    37   LEON3_IOPORT_Regs_Map *io;
     37  struct grgpio_regs *io;
    3838  struct ambapp_apb_info apbpio;
    3939  struct ambapp_apb_info apbmctrl;
     
    6464  /* Get  controller address */
    6565  addr_mctrl = (unsigned long) apbmctrl.start;
    66   io = (LEON3_IOPORT_Regs_Map *) apbpio.start;
     66  io = (struct grgpio_regs *) apbpio.start;
    6767
    6868  printk(
     
    7272
    7373  /* Setup PIO IRQ */
    74   io->irqmask |= (1 << leon_scmv91111_configuration.pio);
    75   io->irqpol |= (1 << leon_scmv91111_configuration.pio);
    76   io->irqedge |= (1 << leon_scmv91111_configuration.pio);
    77   io->iodir &= ~(1 << leon_scmv91111_configuration.pio);
     74  io->imask |= (1 << leon_scmv91111_configuration.pio);
     75  io->ipol |= (1 << leon_scmv91111_configuration.pio);
     76  io->iedge |= (1 << leon_scmv91111_configuration.pio);
     77  io->dir &= ~(1 << leon_scmv91111_configuration.pio);
    7878
    7979  /* Setup memory controller I/O waitstates */
  • c/src/lib/libbsp/sparc/leon3/pci/pci.c

    rffd9575 rf0a7f52  
    5757#define PCI_CONFIG_DATA                 0xcfc
    5858#endif
    59 
    60 #define PCI_INVALID_VENDORDEVICEID      0xffffffff
    61 #define PCI_MULTI_FUNCTION              0x80
    6259
    6360/* define a shortcut */
     
    104101  unsigned char function,
    105102  unsigned char offset,
    106   unsigned int *val
     103  uint32_t    *val
    107104)
    108105{
     
    137134static int
    138135BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) {
    139     unsigned int v;
     136    uint32_t v;
    140137
    141138    if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
     
    150147static int
    151148BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) {
    152     unsigned int v;
     149    uint32_t v;
    153150
    154151    pci_read_config_dword(bus, slot, function, offset&~3, &v);
     
    161158
    162159static int
    163 BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned int val) {
     160BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, uint32_t val) {
    164161
    165162    volatile unsigned int *pci_conf;
     
    188185static int
    189186BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) {
    190     unsigned int v;
     187    uint32_t v;
    191188
    192189    if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
     
    202199static int
    203200BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) {
    204     unsigned int v;
     201    uint32_t v;
    205202
    206203    pci_read_config_dword(bus, slot, function, offset&~3, &v);
     
    232229
    233230    volatile unsigned int *page0 =  (unsigned volatile int *) PCI_MEM_START;
    234     unsigned int data, addr;
     231    uint32_t data;
     232#ifndef BT_ENABLED
     233    uint32_t addr;
     234#endif
    235235
    236236#ifndef BT_ENABLED
     
    302302
    303303void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char function) {
    304     unsigned int data;
     304    uint32_t data;
    305305
    306306    pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
     
    310310
    311311void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char function) {
    312     unsigned int data;
     312    uint32_t data;
    313313
    314314    pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
     
    338338void pci_allocate_resources(void) {
    339339
    340     unsigned int slot, numfuncs, func, id, pos, size, tmp, i, swapped, addr, dev, fn;
     340    unsigned int slot, numfuncs, func, pos, i, swapped, addr, dev, fn;
     341    uint32_t id, tmp, size;
    341342    unsigned char header;
    342343    struct pci_res **res;
     
    363364        pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
    364365
    365         if(header & PCI_MULTI_FUNCTION) {
     366        if(header & PCI_HEADER_TYPE_MULTI_FUNCTION)     {
    366367            numfuncs = PCI_MAX_FUNCTIONS;
    367368        }
     
    454455        pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
    455456
    456         if(header & PCI_MULTI_FUNCTION) {
     457        if(header & PCI_HEADER_TYPE_MULTI_FUNCTION)     {
    457458            numfuncs = PCI_MAX_FUNCTIONS;
    458459        }
     
    504505    unsigned char ucHeader;
    505506    unsigned char ucMaxSubordinate;
    506     unsigned int  ulClass, ulDeviceID;
     507    uint32_t      ulClass, ulDeviceID;
    507508
    508509    DBG("Initializing PCI\n");
     
    532533                                   PCI_HEADER_TYPE,
    533534                                   &ucHeader);
    534         if(ucHeader&PCI_MULTI_FUNCTION) {
     535        if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION)     {
    535536            ucNumFuncs=PCI_MAX_FUNCTIONS;
    536537        }
  • c/src/lib/libbsp/sparc/leon3/preinstall.am

    rffd9575 rf0a7f52  
    9090PREINSTALL_FILES += $(PROJECT_INCLUDE)/ambapp_ids.h
    9191
     92$(PROJECT_INCLUDE)/grlib.h: ../../sparc/shared/include/grlib.h $(PROJECT_INCLUDE)/$(dirstamp)
     93        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/grlib.h
     94PREINSTALL_FILES += $(PROJECT_INCLUDE)/grlib.h
     95
    9296$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
    9397        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
  • c/src/lib/libbsp/sparc/leon3/timer/timer.c

    rffd9575 rf0a7f52  
    3434bool benchmark_timer_is_initialized = false;
    3535
    36 extern volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs;
     36extern volatile struct gptimer_regs *LEON3_Timer_Regs;
    3737
    3838void benchmark_timer_initialize(void)
     
    4949      benchmark_timer_is_initialized = true;
    5050    }
    51     LEON3_Timer_Regs->timer[LEON3_TIMER_INDEX].conf = LEON3_GPTIMER_EN | LEON3_GPTIMER_LD;
     51    LEON3_Timer_Regs->timer[LEON3_TIMER_INDEX].ctrl = LEON3_GPTIMER_EN | LEON3_GPTIMER_LD;
    5252  }
    5353}
  • c/src/lib/libbsp/sparc/shared/can/grcan.c

    rffd9575 rf0a7f52  
    2727#include <grcan.h>
    2828#include <ambapp.h>
     29#include <grlib.h>
    2930
    3031#define WRAP_AROUND_TX_MSGS 1
     
    10981099  {
    10991100    struct ambapp_apb_info gptimer;
    1100     LEON3_Timer_Regs_Map *tregs;
     1101    struct gptimer_regs *tregs;
    11011102
    11021103    if (ambapp_find_apbslv (&ambapp_plb, VENDOR_GAISLER, GAISLER_GPTIMER, &gptimer)
    11031104        == 1) {
    1104       tregs = (LEON3_Timer_Regs_Map *) gptimer.start;
     1105      tregs = (struct gptimer_regs *) gptimer.start;
    11051106      sys_freq_hz = (tregs->scaler_reload + 1) * 1000 * 1000;
    11061107      DBG("GRCAN: detected %dHZ system frequency\n\r", sys_freq_hz);
  • c/src/lib/libbsp/sparc/shared/can/occan.c

    rffd9575 rf0a7f52  
    2020#include <leon.h>
    2121#include <ambapp.h>
     22#include <grlib.h>
    2223#include <occan.h>
    2324
     
    937938        {
    938939                struct ambapp_apb_info gptimer;
    939                 LEON3_Timer_Regs_Map *tregs;
     940                struct gptimer_regs *tregs;
    940941
    941942                if ( ambapp_find_apbslv(&ambapp_plb, VENDOR_GAISLER,
    942943                                        GAISLER_GPTIMER, &gptimer) == 1 ){
    943                         tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
     944                        tregs = (struct gptimer_regs *)gptimer.start;
    944945                        sys_freq_hz = (tregs->scaler_reload+1)*1000*1000;
    945946                        DBG("OCCAN: detected %dHZ system frequency\n\r",sys_freq_hz);
  • c/src/lib/libbsp/sparc/shared/i2c/i2cmst.c

    rffd9575 rf0a7f52  
    1818#include <i2cmst.h>
    1919#include <ambapp.h>
     20#include <grlib.h>
    2021#include <rtems/libi2c.h>
    2122
     
    319320        {
    320321          struct ambapp_apb_info gptimer;
    321           LEON3_Timer_Regs_Map *tregs;
     322          struct gptimer_regs *tregs;
    322323
    323324          if (ambapp_find_apbslv(abus, VENDOR_GAISLER,
    324325                                 GAISLER_GPTIMER, &gptimer) == 1 ) {
    325             tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
     326            tregs = (struct gptimer_regs *)gptimer.start;
    326327            gr_i2cmst_desc.prv.sysfreq = (tregs->scaler_reload+1)*1000;
    327328          } else {
  • c/src/lib/libbsp/sparc/shared/include/ambapp.h

    rffd9575 rf0a7f52  
    354354
    355355
    356 /******** AMBA DEVICES *******/
    357 
    358 /* ESA MEMORY CONTROLLER */
    359 typedef struct {
    360   unsigned int mcfg1;
    361   unsigned int mcfg2;
    362   unsigned int mcfg3;
    363 } ambapp_regmap_mctrl;
    364 
    365 /* APB UART */
    366 typedef struct {
    367   volatile unsigned int data;
    368   volatile unsigned int status;
    369   volatile unsigned int ctrl;
    370   volatile unsigned int scaler;
    371 } ambapp_apb_uart;
    372 
    373 typedef struct {
    374   volatile unsigned int ilevel;
    375   volatile unsigned int ipend;
    376   volatile unsigned int iforce;
    377   volatile unsigned int iclear;
    378   volatile unsigned int mpstat;
    379   volatile unsigned int notused01;
    380   volatile unsigned int notused02;
    381   volatile unsigned int notused03;
    382   volatile unsigned int ampctrl;
    383   volatile unsigned int icsel[2];
    384   volatile unsigned int notused13;
    385   volatile unsigned int notused20;
    386   volatile unsigned int notused21;
    387   volatile unsigned int notused22;
    388   volatile unsigned int notused23;
    389   volatile unsigned int mask[16];
    390   volatile unsigned int force[16];
    391   /* Extended IRQ registers */
    392   volatile unsigned int intid[16];
    393   /* 0x100, align to 4Kb boundary */
    394   volatile unsigned int resv1[(0x1000-0x100)/4];
    395 } LEON3_IrqCtrl_Regs_Map;
    396 
    397 /*****************************/
    398 
    399356#ifdef __cplusplus
    400357}
  • c/src/lib/libbsp/sparc/shared/include/pci.h

    rffd9575 rf0a7f52  
    2323#endif
    2424
    25 /*
    26  * Under PCI, each device has 256 bytes of configuration address space,
    27  * of which the first 64 bytes are standardized as follows:
    28  */
    29 #define PCI_VENDOR_ID           0x00    /* 16 bits */
    30 #define PCI_DEVICE_ID           0x02    /* 16 bits */
    31 #define PCI_COMMAND             0x04    /* 16 bits */
    32 #define  PCI_COMMAND_IO         0x1     /* Enable response in I/O space */
    33 #define  PCI_COMMAND_MEMORY     0x2     /* Enable response in Memory space */
    34 #define  PCI_COMMAND_MASTER     0x4     /* Enable bus mastering */
    35 #define  PCI_COMMAND_SPECIAL    0x8     /* Enable response to special cycles */
    36 #define  PCI_COMMAND_INVALIDATE 0x10    /* Use memory write and invalidate */
    37 #define  PCI_COMMAND_VGA_PALETTE 0x20   /* Enable palette snooping */
    38 #define  PCI_COMMAND_PARITY     0x40    /* Enable parity checking */
    39 #define  PCI_COMMAND_WAIT       0x80    /* Enable address/data stepping */
    40 #define  PCI_COMMAND_SERR       0x100   /* Enable SERR */
    41 #define  PCI_COMMAND_FAST_BACK  0x200   /* Enable back-to-back writes */
    42 
    43 #define PCI_STATUS              0x06    /* 16 bits */
    44 #define  PCI_STATUS_66MHZ       0x20    /* Support 66 Mhz PCI 2.1 bus */
    45 #define  PCI_STATUS_UDF         0x40    /* Support User Definable Features */
    46 
    47 #define  PCI_STATUS_FAST_BACK   0x80    /* Accept fast-back to back */
    48 #define  PCI_STATUS_PARITY      0x100   /* Detected parity error */
    49 #define  PCI_STATUS_DEVSEL_MASK 0x600   /* DEVSEL timing */
    50 #define  PCI_STATUS_DEVSEL_FAST 0x000
    51 #define  PCI_STATUS_DEVSEL_MEDIUM 0x200
    52 #define  PCI_STATUS_DEVSEL_SLOW 0x400
    53 #define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
    54 #define  PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
    55 #define  PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
    56 #define  PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
    57 #define  PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
    58 
    59 #define PCI_CLASS_REVISION      0x08    /* High 24 bits are class, low 8
    60                                            revision */
    61 #define PCI_REVISION_ID         0x08    /* Revision ID */
    62 #define PCI_CLASS_PROG          0x09    /* Reg. Level Programming Interface */
    63 #define PCI_CLASS_DEVICE        0x0a    /* Device class */
    64 
    65 #define PCI_CACHE_LINE_SIZE     0x0c    /* 8 bits */
    66 #define PCI_LATENCY_TIMER       0x0d    /* 8 bits */
    67 #define PCI_HEADER_TYPE         0x0e    /* 8 bits */
    68 #define  PCI_HEADER_TYPE_NORMAL 0
    69 #define  PCI_HEADER_TYPE_BRIDGE 1
    70 #define  PCI_HEADER_TYPE_CARDBUS 2
    71 
    72 #define PCI_BIST                0x0f    /* 8 bits */
    73 #define PCI_BIST_CODE_MASK      0x0f    /* Return result */
    74 #define PCI_BIST_START          0x40    /* 1 to start BIST, 2 secs or less */
    75 #define PCI_BIST_CAPABLE        0x80    /* 1 if BIST capable */
    76 
    77 /*
    78  * Base addresses specify locations in memory or I/O space.
    79  * Decoded size can be determined by writing a value of
    80  * 0xffffffff to the register, and reading it back.  Only
    81  * 1 bits are decoded.
    82  */
    83 #define PCI_BASE_ADDRESS_0      0x10    /* 32 bits */
    84 #define PCI_BASE_ADDRESS_1      0x14    /* 32 bits [htype 0,1 only] */
    85 #define PCI_BASE_ADDRESS_2      0x18    /* 32 bits [htype 0 only] */
    86 #define PCI_BASE_ADDRESS_3      0x1c    /* 32 bits */
    87 #define PCI_BASE_ADDRESS_4      0x20    /* 32 bits */
    88 #define PCI_BASE_ADDRESS_5      0x24    /* 32 bits */
    89 #define  PCI_BASE_ADDRESS_SPACE 0x01    /* 0 = memory, 1 = I/O */
    90 #define  PCI_BASE_ADDRESS_SPACE_IO 0x01
    91 #define  PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
    92 #define  PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
    93 #define  PCI_BASE_ADDRESS_MEM_TYPE_32   0x00    /* 32 bit address */
    94 #define  PCI_BASE_ADDRESS_MEM_TYPE_1M   0x02    /* Below 1M */
    95 #define  PCI_BASE_ADDRESS_MEM_TYPE_64   0x04    /* 64 bit address */
    96 #define  PCI_BASE_ADDRESS_MEM_PREFETCH  0x08    /* prefetchable? */
    97 #define  PCI_BASE_ADDRESS_MEM_MASK      (~0x0fUL)
    98 #define  PCI_BASE_ADDRESS_IO_MASK       (~0x03UL)
    99 /* bit 1 is reserved if address_space = 1 */
    100 
    101 /* Header type 0 (normal devices) */
    102 #define PCI_CARDBUS_CIS         0x28
    103 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c
    104 #define PCI_SUBSYSTEM_ID        0x2e
    105 #define PCI_ROM_ADDRESS         0x30    /* Bits 31..11 are address, 10..1 reserved */
    106 #define  PCI_ROM_ADDRESS_ENABLE 0x01
    107 #define PCI_ROM_ADDRESS_MASK    (~0x7ffUL)
    108 
    109 /* 0x34-0x3b are reserved */
    110 #define PCI_INTERRUPT_LINE      0x3c    /* 8 bits */
    111 #define PCI_INTERRUPT_PIN       0x3d    /* 8 bits */
    112 #define PCI_MIN_GNT             0x3e    /* 8 bits */
    113 #define PCI_MAX_LAT             0x3f    /* 8 bits */
    114 
    115 /* Header type 1 (PCI-to-PCI bridges) */
    116 #define PCI_PRIMARY_BUS         0x18    /* Primary bus number */
    117 #define PCI_SECONDARY_BUS       0x19    /* Secondary bus number */
    118 #define PCI_SUBORDINATE_BUS     0x1a    /* Highest bus number behind the bridge */
    119 #define PCI_SEC_LATENCY_TIMER   0x1b    /* Latency timer for secondary interface */
    120 #define PCI_IO_BASE             0x1c    /* I/O range behind the bridge */
    121 #define PCI_IO_LIMIT            0x1d
    122 #define  PCI_IO_RANGE_TYPE_MASK 0x0f    /* I/O bridging type */
    123 #define  PCI_IO_RANGE_TYPE_16   0x00
    124 #define  PCI_IO_RANGE_TYPE_32   0x01
    125 #define  PCI_IO_RANGE_MASK      ~0x0f
    126 #define PCI_SEC_STATUS          0x1e    /* Secondary status register, only bit 14 used */
    127 #define PCI_MEMORY_BASE         0x20    /* Memory range behind */
    128 #define PCI_MEMORY_LIMIT        0x22
    129 #define  PCI_MEMORY_RANGE_TYPE_MASK 0x0f
    130 #define  PCI_MEMORY_RANGE_MASK  ~0x0f
    131 #define PCI_PREF_MEMORY_BASE    0x24    /* Prefetchable memory range behind */
    132 #define PCI_PREF_MEMORY_LIMIT   0x26
    133 #define  PCI_PREF_RANGE_TYPE_MASK 0x0f
    134 #define  PCI_PREF_RANGE_TYPE_32 0x00
    135 #define  PCI_PREF_RANGE_TYPE_64 0x01
    136 #define  PCI_PREF_RANGE_MASK    ~0x0f
    137 #define PCI_PREF_BASE_UPPER32   0x28    /* Upper half of prefetchable memory range */
    138 #define PCI_PREF_LIMIT_UPPER32  0x2c
    139 #define PCI_IO_BASE_UPPER16     0x30    /* Upper half of I/O addresses */
    140 #define PCI_IO_LIMIT_UPPER16    0x32
    141 /* 0x34-0x3b is reserved */
    142 #define PCI_ROM_ADDRESS1        0x38    /* Same as PCI_ROM_ADDRESS, but for htype 1 */
    143 /* 0x3c-0x3d are same as for htype 0 */
    144 #define PCI_BRIDGE_CONTROL      0x3e
    145 #define  PCI_BRIDGE_CTL_PARITY  0x01    /* Enable parity detection on secondary interface */
    146 #define  PCI_BRIDGE_CTL_SERR    0x02    /* The same for SERR forwarding */
    147 #define  PCI_BRIDGE_CTL_NO_ISA  0x04    /* Disable bridging of ISA ports */
    148 #define  PCI_BRIDGE_CTL_VGA     0x08    /* Forward VGA addresses */
    149 #define  PCI_BRIDGE_CTL_MASTER_ABORT 0x20  /* Report master aborts */
    150 #define  PCI_BRIDGE_CTL_BUS_RESET 0x40  /* Secondary bus reset */
    151 #define  PCI_BRIDGE_CTL_FAST_BACK 0x80  /* Fast Back2Back enabled on secondary interface */
    152 
    153 /* Header type 2 (CardBus bridges) */
    154 /* 0x14-0x15 reserved */
    155 #define PCI_CB_SEC_STATUS       0x16    /* Secondary status */
    156 #define PCI_CB_PRIMARY_BUS      0x18    /* PCI bus number */
    157 #define PCI_CB_CARD_BUS         0x19    /* CardBus bus number */
    158 #define PCI_CB_SUBORDINATE_BUS  0x1a    /* Subordinate bus number */
    159 #define PCI_CB_LATENCY_TIMER    0x1b    /* CardBus latency timer */
    160 #define PCI_CB_MEMORY_BASE_0    0x1c
    161 #define PCI_CB_MEMORY_LIMIT_0   0x20
    162 #define PCI_CB_MEMORY_BASE_1    0x24
    163 #define PCI_CB_MEMORY_LIMIT_1   0x28
    164 #define PCI_CB_IO_BASE_0        0x2c
    165 #define PCI_CB_IO_BASE_0_HI     0x2e
    166 #define PCI_CB_IO_LIMIT_0       0x30
    167 #define PCI_CB_IO_LIMIT_0_HI    0x32
    168 #define PCI_CB_IO_BASE_1        0x34
    169 #define PCI_CB_IO_BASE_1_HI     0x36
    170 #define PCI_CB_IO_LIMIT_1       0x38
    171 #define PCI_CB_IO_LIMIT_1_HI    0x3a
    172 #define  PCI_CB_IO_RANGE_MASK   ~0x03
    173 /* 0x3c-0x3d are same as for htype 0 */
    174 #define PCI_CB_BRIDGE_CONTROL   0x3e
    175 #define  PCI_CB_BRIDGE_CTL_PARITY       0x01    /* Similar to standard bridge control register */
    176 #define  PCI_CB_BRIDGE_CTL_SERR         0x02
    177 #define  PCI_CB_BRIDGE_CTL_ISA          0x04
    178 #define  PCI_CB_BRIDGE_CTL_VGA          0x08
    179 #define  PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20
    180 #define  PCI_CB_BRIDGE_CTL_CB_RESET     0x40    /* CardBus reset */
    181 #define  PCI_CB_BRIDGE_CTL_16BIT_INT    0x80    /* Enable interrupt for 16-bit cards */
    182 #define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100  /* Prefetch enable for both memory regions */
    183 #define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
    184 #define  PCI_CB_BRIDGE_CTL_POST_WRITES  0x400
    185 #define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40
    186 #define PCI_CB_SUBSYSTEM_ID     0x42
    187 #define PCI_CB_LEGACY_MODE_BASE 0x44    /* 16-bit PC Card legacy mode base address (ExCa) */
    188 /* 0x48-0x7f reserved */
    189 
    190 /* Device classes and subclasses */
    191 
    192 #define PCI_CLASS_NOT_DEFINED           0x0000
    193 #define PCI_CLASS_NOT_DEFINED_VGA       0x0001
    194 
    195 #define PCI_BASE_CLASS_STORAGE          0x01
    196 #define PCI_CLASS_STORAGE_SCSI          0x0100
    197 #define PCI_CLASS_STORAGE_IDE           0x0101
    198 #define PCI_CLASS_STORAGE_FLOPPY        0x0102
    199 #define PCI_CLASS_STORAGE_IPI           0x0103
    200 #define PCI_CLASS_STORAGE_RAID          0x0104
    201 #define PCI_CLASS_STORAGE_OTHER         0x0180
    202 
    203 #define PCI_BASE_CLASS_NETWORK          0x02
    204 #define PCI_CLASS_NETWORK_ETHERNET      0x0200
    205 #define PCI_CLASS_NETWORK_TOKEN_RING    0x0201
    206 #define PCI_CLASS_NETWORK_FDDI          0x0202
    207 #define PCI_CLASS_NETWORK_ATM           0x0203
    208 #define PCI_CLASS_NETWORK_OTHER         0x0280
    209 
    210 #define PCI_BASE_CLASS_DISPLAY          0x03
    211 #define PCI_CLASS_DISPLAY_VGA           0x0300
    212 #define PCI_CLASS_DISPLAY_XGA           0x0301
    213 #define PCI_CLASS_DISPLAY_OTHER         0x0380
    214 
    215 #define PCI_BASE_CLASS_MULTIMEDIA       0x04
    216 #define PCI_CLASS_MULTIMEDIA_VIDEO      0x0400
    217 #define PCI_CLASS_MULTIMEDIA_AUDIO      0x0401
    218 #define PCI_CLASS_MULTIMEDIA_OTHER      0x0480
    219 
    220 #define PCI_BASE_CLASS_MEMORY           0x05
    221 #define  PCI_CLASS_MEMORY_RAM           0x0500
    222 #define  PCI_CLASS_MEMORY_FLASH         0x0501
    223 #define  PCI_CLASS_MEMORY_OTHER         0x0580
    224 
    225 #define PCI_BASE_CLASS_BRIDGE           0x06
    226 #define  PCI_CLASS_BRIDGE_HOST          0x0600
    227 #define  PCI_CLASS_BRIDGE_ISA           0x0601
    228 #define  PCI_CLASS_BRIDGE_EISA          0x0602
    229 #define  PCI_CLASS_BRIDGE_MC            0x0603
    230 #define  PCI_CLASS_BRIDGE_PCI           0x0604
    231 #define  PCI_CLASS_BRIDGE_PCMCIA        0x0605
    232 #define  PCI_CLASS_BRIDGE_NUBUS         0x0606
    233 #define  PCI_CLASS_BRIDGE_CARDBUS       0x0607
    234 #define  PCI_CLASS_BRIDGE_OTHER         0x0680
    235 
    236 #define PCI_BASE_CLASS_COMMUNICATION    0x07
    237 #define PCI_CLASS_COMMUNICATION_SERIAL  0x0700
    238 #define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
    239 #define PCI_CLASS_COMMUNICATION_OTHER   0x0780
    240 
    241 #define PCI_BASE_CLASS_SYSTEM           0x08
    242 #define PCI_CLASS_SYSTEM_PIC            0x0800
    243 #define PCI_CLASS_SYSTEM_DMA            0x0801
    244 #define PCI_CLASS_SYSTEM_TIMER          0x0802
    245 #define PCI_CLASS_SYSTEM_RTC            0x0803
    246 #define PCI_CLASS_SYSTEM_OTHER          0x0880
    247 
    248 #define PCI_BASE_CLASS_INPUT            0x09
    249 #define PCI_CLASS_INPUT_KEYBOARD        0x0900
    250 #define PCI_CLASS_INPUT_PEN             0x0901
    251 #define PCI_CLASS_INPUT_MOUSE           0x0902
    252 #define PCI_CLASS_INPUT_OTHER           0x0980
    253 
    254 #define PCI_BASE_CLASS_DOCKING          0x0a
    255 #define PCI_CLASS_DOCKING_GENERIC       0x0a00
    256 #define PCI_CLASS_DOCKING_OTHER         0x0a01
    257 
    258 #define PCI_BASE_CLASS_PROCESSOR        0x0b
    259 #define PCI_CLASS_PROCESSOR_386         0x0b00
    260 #define PCI_CLASS_PROCESSOR_486         0x0b01
    261 #define PCI_CLASS_PROCESSOR_PENTIUM     0x0b02
    262 #define PCI_CLASS_PROCESSOR_ALPHA       0x0b10
    263 #define PCI_CLASS_PROCESSOR_POWERPC     0x0b20
    264 #define PCI_CLASS_PROCESSOR_CO          0x0b40
    265 
    266 #define PCI_BASE_CLASS_SERIAL           0x0c
    267 #define PCI_CLASS_SERIAL_FIREWIRE       0x0c00
    268 #define PCI_CLASS_SERIAL_ACCESS         0x0c01
    269 #define PCI_CLASS_SERIAL_SSA            0x0c02
    270 #define PCI_CLASS_SERIAL_USB            0x0c03
    271 #define PCI_CLASS_SERIAL_FIBER          0x0c04
    272 
    273 #define PCI_CLASS_OTHERS                0xff
    274 
    275 /*
    276  * Vendor and card ID's: sort these numerically according to vendor
    277  * (and according to card ID within vendor). Send all updates to
    278  * <linux-pcisupport@cck.uni-kl.de>.
    279  */
    280 #define PCI_VENDOR_ID_COMPAQ            0x0e11
    281 #define PCI_DEVICE_ID_COMPAQ_1280       0x3033
    282 #define PCI_DEVICE_ID_COMPAQ_TRIFLEX    0x4000
    283 #define PCI_DEVICE_ID_COMPAQ_SMART2P    0xae10
    284 #define PCI_DEVICE_ID_COMPAQ_NETEL100   0xae32
    285 #define PCI_DEVICE_ID_COMPAQ_NETEL10    0xae34
    286 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3I  0xae35
    287 #define PCI_DEVICE_ID_COMPAQ_NETEL100D  0xae40
    288 #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43
    289 #define PCI_DEVICE_ID_COMPAQ_NETEL100I  0xb011
    290 #define PCI_DEVICE_ID_COMPAQ_THUNDER    0xf130
    291 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B  0xf150
    292 
    293 #define PCI_VENDOR_ID_NCR               0x1000
    294 #define PCI_DEVICE_ID_NCR_53C810        0x0001
    295 #define PCI_DEVICE_ID_NCR_53C820        0x0002
    296 #define PCI_DEVICE_ID_NCR_53C825        0x0003
    297 #define PCI_DEVICE_ID_NCR_53C815        0x0004
    298 #define PCI_DEVICE_ID_NCR_53C860        0x0006
    299 #define PCI_DEVICE_ID_NCR_53C896        0x000b
    300 #define PCI_DEVICE_ID_NCR_53C895        0x000c
    301 #define PCI_DEVICE_ID_NCR_53C885        0x000d
    302 #define PCI_DEVICE_ID_NCR_53C875        0x000f
    303 #define PCI_DEVICE_ID_NCR_53C875J       0x008f
    304 
    305 #define PCI_VENDOR_ID_ATI               0x1002
    306 #define PCI_DEVICE_ID_ATI_68800         0x4158
    307 #define PCI_DEVICE_ID_ATI_215CT222      0x4354
    308 #define PCI_DEVICE_ID_ATI_210888CX      0x4358
    309 #define PCI_DEVICE_ID_ATI_215GB         0x4742
    310 #define PCI_DEVICE_ID_ATI_215GD         0x4744
    311 #define PCI_DEVICE_ID_ATI_215GI         0x4749
    312 #define PCI_DEVICE_ID_ATI_215GP         0x4750
    313 #define PCI_DEVICE_ID_ATI_215GQ         0x4751
    314 #define PCI_DEVICE_ID_ATI_215GT         0x4754
    315 #define PCI_DEVICE_ID_ATI_215GTB        0x4755
    316 #define PCI_DEVICE_ID_ATI_210888GX      0x4758
    317 #define PCI_DEVICE_ID_ATI_215LG         0x4c47
    318 #define PCI_DEVICE_ID_ATI_264LT         0x4c54
    319 #define PCI_DEVICE_ID_ATI_264VT         0x5654
    320 
    321 #define PCI_VENDOR_ID_VLSI              0x1004
    322 #define PCI_DEVICE_ID_VLSI_82C592       0x0005
    323 #define PCI_DEVICE_ID_VLSI_82C593       0x0006
    324 #define PCI_DEVICE_ID_VLSI_82C594       0x0007
    325 #define PCI_DEVICE_ID_VLSI_82C597       0x0009
    326 #define PCI_DEVICE_ID_VLSI_82C541       0x000c
    327 #define PCI_DEVICE_ID_VLSI_82C543       0x000d
    328 #define PCI_DEVICE_ID_VLSI_82C532       0x0101
    329 #define PCI_DEVICE_ID_VLSI_82C534       0x0102
    330 #define PCI_DEVICE_ID_VLSI_82C535       0x0104
    331 #define PCI_DEVICE_ID_VLSI_82C147       0x0105
    332 #define PCI_DEVICE_ID_VLSI_VAS96011     0x0702
    333 
    334 #define PCI_VENDOR_ID_ADL               0x1005
    335 #define PCI_DEVICE_ID_ADL_2301          0x2301
    336 
    337 #define PCI_VENDOR_ID_NS                0x100b
    338 #define PCI_DEVICE_ID_NS_87415          0x0002
    339 #define PCI_DEVICE_ID_NS_87410          0xd001
    340 
    341 #define PCI_VENDOR_ID_TSENG             0x100c
    342 #define PCI_DEVICE_ID_TSENG_W32P_2      0x3202
    343 #define PCI_DEVICE_ID_TSENG_W32P_b      0x3205
    344 #define PCI_DEVICE_ID_TSENG_W32P_c      0x3206
    345 #define PCI_DEVICE_ID_TSENG_W32P_d      0x3207
    346 #define PCI_DEVICE_ID_TSENG_ET6000      0x3208
    347 
    348 #define PCI_VENDOR_ID_WEITEK            0x100e
    349 #define PCI_DEVICE_ID_WEITEK_P9000      0x9001
    350 #define PCI_DEVICE_ID_WEITEK_P9100      0x9100
    351 
    352 #define PCI_VENDOR_ID_DEC               0x1011
    353 #define PCI_DEVICE_ID_DEC_BRD           0x0001
    354 #define PCI_DEVICE_ID_DEC_TULIP         0x0002
    355 #define PCI_DEVICE_ID_DEC_TGA           0x0004
    356 #define PCI_DEVICE_ID_DEC_TULIP_FAST    0x0009
    357 #define PCI_DEVICE_ID_DEC_TGA2          0x000D
    358 #define PCI_DEVICE_ID_DEC_FDDI          0x000F
    359 #define PCI_DEVICE_ID_DEC_TULIP_PLUS    0x0014
    360 #define PCI_DEVICE_ID_DEC_21142         0x0019
    361 #define PCI_DEVICE_ID_DEC_21052         0x0021
    362 #define PCI_DEVICE_ID_DEC_21150         0x0022
    363 #define PCI_DEVICE_ID_DEC_21152         0x0024
    364 
    365 #define PCI_VENDOR_ID_CIRRUS            0x1013
    366 #define PCI_DEVICE_ID_CIRRUS_7548       0x0038
    367 #define PCI_DEVICE_ID_CIRRUS_5430       0x00a0
    368 #define PCI_DEVICE_ID_CIRRUS_5434_4     0x00a4
    369 #define PCI_DEVICE_ID_CIRRUS_5434_8     0x00a8
    370 #define PCI_DEVICE_ID_CIRRUS_5436       0x00ac
    371 #define PCI_DEVICE_ID_CIRRUS_5446       0x00b8
    372 #define PCI_DEVICE_ID_CIRRUS_5480       0x00bc
    373 #define PCI_DEVICE_ID_CIRRUS_5464       0x00d4
    374 #define PCI_DEVICE_ID_CIRRUS_5465       0x00d6
    375 #define PCI_DEVICE_ID_CIRRUS_6729       0x1100
    376 #define PCI_DEVICE_ID_CIRRUS_6832       0x1110
    377 #define PCI_DEVICE_ID_CIRRUS_7542       0x1200
    378 #define PCI_DEVICE_ID_CIRRUS_7543       0x1202
    379 #define PCI_DEVICE_ID_CIRRUS_7541       0x1204
    380 
    381 #define PCI_VENDOR_ID_IBM               0x1014
    382 #define PCI_DEVICE_ID_IBM_FIRE_CORAL    0x000a
    383 #define PCI_DEVICE_ID_IBM_TR            0x0018
    384 #define PCI_DEVICE_ID_IBM_82G2675       0x001d
    385 #define PCI_DEVICE_ID_IBM_MCA           0x0020
    386 #define PCI_DEVICE_ID_IBM_82351         0x0022
    387 #define PCI_DEVICE_ID_IBM_SERVERAID     0x002e
    388 #define PCI_DEVICE_ID_IBM_TR_WAKE       0x003e
    389 #define PCI_DEVICE_ID_IBM_MPIC          0x0046
    390 #define PCI_DEVICE_ID_IBM_3780IDSP      0x007d
    391 #define PCI_DEVICE_ID_IBM_MPIC_2        0xffff
    392 
    393 #define PCI_VENDOR_ID_WD                0x101c
    394 #define PCI_DEVICE_ID_WD_7197           0x3296
    395 
    396 #define PCI_VENDOR_ID_AMD               0x1022
    397 #define PCI_DEVICE_ID_AMD_LANCE         0x2000
    398 #define PCI_DEVICE_ID_AMD_SCSI          0x2020
    399 
    400 #define PCI_VENDOR_ID_TRIDENT           0x1023
    401 #define PCI_DEVICE_ID_TRIDENT_9397      0x9397
    402 #define PCI_DEVICE_ID_TRIDENT_9420      0x9420
    403 #define PCI_DEVICE_ID_TRIDENT_9440      0x9440
    404 #define PCI_DEVICE_ID_TRIDENT_9660      0x9660
    405 #define PCI_DEVICE_ID_TRIDENT_9750      0x9750
    406 
    407 #define PCI_VENDOR_ID_AI                0x1025
    408 #define PCI_DEVICE_ID_AI_M1435          0x1435
    409 
    410 #define PCI_VENDOR_ID_MATROX            0x102B
    411 #define PCI_DEVICE_ID_MATROX_MGA_2      0x0518
    412 #define PCI_DEVICE_ID_MATROX_MIL        0x0519
    413 #define PCI_DEVICE_ID_MATROX_MYS        0x051A
    414 #define PCI_DEVICE_ID_MATROX_MIL_2      0x051b
    415 #define PCI_DEVICE_ID_MATROX_MIL_2_AGP  0x051f
    416 #define PCI_DEVICE_ID_MATROX_MGA_IMP    0x0d10
    417 
    418 #define PCI_VENDOR_ID_CT                0x102c
    419 #define PCI_DEVICE_ID_CT_65545          0x00d8
    420 #define PCI_DEVICE_ID_CT_65548          0x00dc
    421 #define PCI_DEVICE_ID_CT_65550          0x00e0
    422 #define PCI_DEVICE_ID_CT_65554          0x00e4
    423 #define PCI_DEVICE_ID_CT_65555          0x00e5
    424 
    425 #define PCI_VENDOR_ID_MIRO              0x1031
    426 #define PCI_DEVICE_ID_MIRO_36050        0x5601
    427 
    428 #define PCI_VENDOR_ID_NEC               0x1033
    429 #define PCI_DEVICE_ID_NEC_PCX2          0x0046
    430 
    431 #define PCI_VENDOR_ID_FD                0x1036
    432 #define PCI_DEVICE_ID_FD_36C70          0x0000
    433 
    434 #define PCI_VENDOR_ID_SI                0x1039
    435 #define PCI_DEVICE_ID_SI_5591_AGP       0x0001
    436 #define PCI_DEVICE_ID_SI_6202           0x0002
    437 #define PCI_DEVICE_ID_SI_503            0x0008
    438 #define PCI_DEVICE_ID_SI_ACPI           0x0009
    439 #define PCI_DEVICE_ID_SI_5597_VGA       0x0200
    440 #define PCI_DEVICE_ID_SI_6205           0x0205
    441 #define PCI_DEVICE_ID_SI_501            0x0406
    442 #define PCI_DEVICE_ID_SI_496            0x0496
    443 #define PCI_DEVICE_ID_SI_601            0x0601
    444 #define PCI_DEVICE_ID_SI_5107           0x5107
    445 #define PCI_DEVICE_ID_SI_5511           0x5511
    446 #define PCI_DEVICE_ID_SI_5513           0x5513
    447 #define PCI_DEVICE_ID_SI_5571           0x5571
    448 #define PCI_DEVICE_ID_SI_5591           0x5591
    449 #define PCI_DEVICE_ID_SI_5597           0x5597
    450 #define PCI_DEVICE_ID_SI_7001           0x7001
    451 
    452 #define PCI_VENDOR_ID_HP                0x103c
    453 #define PCI_DEVICE_ID_HP_J2585A         0x1030
    454 #define PCI_DEVICE_ID_HP_J2585B         0x1031
    455 
    456 #define PCI_VENDOR_ID_PCTECH            0x1042
    457 #define PCI_DEVICE_ID_PCTECH_RZ1000     0x1000
    458 #define PCI_DEVICE_ID_PCTECH_RZ1001     0x1001
    459 #define PCI_DEVICE_ID_PCTECH_SAMURAI_0  0x3000
    460 #define PCI_DEVICE_ID_PCTECH_SAMURAI_1  0x3010
    461 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
    462 
    463 #define PCI_VENDOR_ID_DPT               0x1044
    464 #define PCI_DEVICE_ID_DPT               0xa400
    465 
    466 #define PCI_VENDOR_ID_OPTI              0x1045
    467 #define PCI_DEVICE_ID_OPTI_92C178       0xc178
    468 #define PCI_DEVICE_ID_OPTI_82C557       0xc557
    469 #define PCI_DEVICE_ID_OPTI_82C558       0xc558
    470 #define PCI_DEVICE_ID_OPTI_82C621       0xc621
    471 #define PCI_DEVICE_ID_OPTI_82C700       0xc700
    472 #define PCI_DEVICE_ID_OPTI_82C701       0xc701
    473 #define PCI_DEVICE_ID_OPTI_82C814       0xc814
    474 #define PCI_DEVICE_ID_OPTI_82C822       0xc822
    475 #define PCI_DEVICE_ID_OPTI_82C825       0xd568
    476 
    477 #define PCI_VENDOR_ID_SGS               0x104a
    478 #define PCI_DEVICE_ID_SGS_2000          0x0008
    479 #define PCI_DEVICE_ID_SGS_1764          0x0009
    480 
    481 #define PCI_VENDOR_ID_BUSLOGIC                0x104B
    482 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
    483 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER    0x1040
    484 #define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT     0x8130
    485 
    486 #define PCI_VENDOR_ID_TI                0x104c
    487 #define PCI_DEVICE_ID_TI_TVP4010        0x3d04
    488 #define PCI_DEVICE_ID_TI_TVP4020        0x3d07
    489 #define PCI_DEVICE_ID_TI_PCI1130        0xac12
    490 #define PCI_DEVICE_ID_TI_PCI1031        0xac13
    491 #define PCI_DEVICE_ID_TI_PCI1131        0xac15
    492 #define PCI_DEVICE_ID_TI_PCI1250        0xac16
    493 #define PCI_DEVICE_ID_TI_PCI1220        0xac17
    494 
    495 #define PCI_VENDOR_ID_OAK               0x104e
    496 #define PCI_DEVICE_ID_OAK_OTI107        0x0107
    497 
    498 /* Winbond have two vendor IDs! See 0x10ad as well */
    499 #define PCI_VENDOR_ID_WINBOND2          0x1050
    500 #define PCI_DEVICE_ID_WINBOND2_89C940   0x0940
    501 
    502 #define PCI_VENDOR_ID_MOTOROLA          0x1057
    503 #define PCI_DEVICE_ID_MOTOROLA_MPC105   0x0001
    504 #define PCI_DEVICE_ID_MOTOROLA_MPC106   0x0002
    505 #define PCI_DEVICE_ID_MOTOROLA_RAVEN    0x4801
    506 
    507 #define PCI_VENDOR_ID_PROMISE           0x105a
    508 #define PCI_DEVICE_ID_PROMISE_20246     0x4d33
    509 #define PCI_DEVICE_ID_PROMISE_5300      0x5300
    510 
    511 #define PCI_VENDOR_ID_N9                0x105d
    512 #define PCI_DEVICE_ID_N9_I128           0x2309
    513 #define PCI_DEVICE_ID_N9_I128_2         0x2339
    514 #define PCI_DEVICE_ID_N9_I128_T2R       0x493d
    515 
    516 #define PCI_VENDOR_ID_UMC               0x1060
    517 #define PCI_DEVICE_ID_UMC_UM8673F       0x0101
    518 #define PCI_DEVICE_ID_UMC_UM8891A       0x0891
    519 #define PCI_DEVICE_ID_UMC_UM8886BF      0x673a
    520 #define PCI_DEVICE_ID_UMC_UM8886A       0x886a
    521 #define PCI_DEVICE_ID_UMC_UM8881F       0x8881
    522 #define PCI_DEVICE_ID_UMC_UM8886F       0x8886
    523 #define PCI_DEVICE_ID_UMC_UM9017F       0x9017
    524 #define PCI_DEVICE_ID_UMC_UM8886N       0xe886
    525 #define PCI_DEVICE_ID_UMC_UM8891N       0xe891
    526 
    527 #define PCI_VENDOR_ID_X                 0x1061
    528 #define PCI_DEVICE_ID_X_AGX016          0x0001
    529 
    530 #define PCI_VENDOR_ID_PICOP             0x1066
    531 #define PCI_DEVICE_ID_PICOP_PT86C52X    0x0001
    532 #define PCI_DEVICE_ID_PICOP_PT80C524    0x8002
    533 
    534 #define PCI_VENDOR_ID_APPLE             0x106b
    535 #define PCI_DEVICE_ID_APPLE_BANDIT      0x0001
    536 #define PCI_DEVICE_ID_APPLE_GC          0x0002
    537 #define PCI_DEVICE_ID_APPLE_HYDRA       0x000e
    538 
    539 #define PCI_VENDOR_ID_NEXGEN            0x1074
    540 #define PCI_DEVICE_ID_NEXGEN_82C501     0x4e78
    541 
    542 #define PCI_VENDOR_ID_QLOGIC            0x1077
    543 #define PCI_DEVICE_ID_QLOGIC_ISP1020    0x1020
    544 #define PCI_DEVICE_ID_QLOGIC_ISP1022    0x1022
    545 
    546 #define PCI_VENDOR_ID_CYRIX             0x1078
    547 #define PCI_DEVICE_ID_CYRIX_5510        0x0000
    548 #define PCI_DEVICE_ID_CYRIX_PCI_MASTER  0x0001
    549 #define PCI_DEVICE_ID_CYRIX_5520        0x0002
    550 #define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
    551 #define PCI_DEVICE_ID_CYRIX_5530_SMI    0x0101
    552 #define PCI_DEVICE_ID_CYRIX_5530_IDE    0x0102
    553 #define PCI_DEVICE_ID_CYRIX_5530_AUDIO  0x0103
    554 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO  0x0104
    555 
    556 #define PCI_VENDOR_ID_LEADTEK           0x107d
    557 #define PCI_DEVICE_ID_LEADTEK_805       0x0000
    558 
    559 #define PCI_VENDOR_ID_CONTAQ            0x1080
    560 #define PCI_DEVICE_ID_CONTAQ_82C599     0x0600
    561 #define PCI_DEVICE_ID_CONTAQ_82C693     0xc693
    562 
    563 #define PCI_VENDOR_ID_FOREX             0x1083
    564 
    565 #define PCI_VENDOR_ID_OLICOM            0x108d
    566 #define PCI_DEVICE_ID_OLICOM_OC3136     0x0001
    567 #define PCI_DEVICE_ID_OLICOM_OC2315     0x0011
    568 #define PCI_DEVICE_ID_OLICOM_OC2325     0x0012
    569 #define PCI_DEVICE_ID_OLICOM_OC2183     0x0013
    570 #define PCI_DEVICE_ID_OLICOM_OC2326     0x0014
    571 #define PCI_DEVICE_ID_OLICOM_OC6151     0x0021
    572 
    573 #define PCI_VENDOR_ID_SUN               0x108e
    574 #define PCI_DEVICE_ID_SUN_EBUS          0x1000
    575 #define PCI_DEVICE_ID_SUN_HAPPYMEAL     0x1001
    576 #define PCI_DEVICE_ID_SUN_SIMBA         0x5000
    577 #define PCI_DEVICE_ID_SUN_PBM           0x8000
    578 #define PCI_DEVICE_ID_SUN_SABRE         0xa000
    579 
    580 #define PCI_VENDOR_ID_CMD               0x1095
    581 #define PCI_DEVICE_ID_CMD_640           0x0640
    582 #define PCI_DEVICE_ID_CMD_643           0x0643
    583 #define PCI_DEVICE_ID_CMD_646           0x0646
    584 #define PCI_DEVICE_ID_CMD_647           0x0647
    585 #define PCI_DEVICE_ID_CMD_670           0x0670
    586 
    587 #define PCI_VENDOR_ID_VISION            0x1098
    588 #define PCI_DEVICE_ID_VISION_QD8500     0x0001
    589 #define PCI_DEVICE_ID_VISION_QD8580     0x0002
    590 
    591 #define PCI_VENDOR_ID_BROOKTREE         0x109e
    592 #define PCI_DEVICE_ID_BROOKTREE_848     0x0350
    593 #define PCI_DEVICE_ID_BROOKTREE_849A    0x0351
    594 #define PCI_DEVICE_ID_BROOKTREE_8474    0x8474
    595 
    596 #define PCI_VENDOR_ID_SIERRA            0x10a8
    597 #define PCI_DEVICE_ID_SIERRA_STB        0x0000
    598 
    599 #define PCI_VENDOR_ID_ACC               0x10aa
    600 #define PCI_DEVICE_ID_ACC_2056          0x0000
    601 
    602 #define PCI_VENDOR_ID_WINBOND           0x10ad
    603 #define PCI_DEVICE_ID_WINBOND_83769     0x0001
    604 #define PCI_DEVICE_ID_WINBOND_82C105    0x0105
    605 #define PCI_DEVICE_ID_WINBOND_83C553    0x0565
    606 
    607 #define PCI_VENDOR_ID_DATABOOK          0x10b3
    608 #define PCI_DEVICE_ID_DATABOOK_87144    0xb106
    609 
    610 #define PCI_VENDOR_ID_PLX               0x10b5
    611 #define PCI_DEVICE_ID_PLX_9050          0x9050
    612 #define PCI_DEVICE_ID_PLX_9060          0x9060
    613 #define PCI_DEVICE_ID_PLX_9060ES        0x906E
    614 #define PCI_DEVICE_ID_PLX_9060SD        0x906D
    615 #define PCI_DEVICE_ID_PLX_9080          0x9080
    616 
    617 #define PCI_VENDOR_ID_MADGE             0x10b6
    618 #define PCI_DEVICE_ID_MADGE_MK2         0x0002
    619 #define PCI_DEVICE_ID_MADGE_C155S       0x1001
    620 
    621 #define PCI_VENDOR_ID_3COM              0x10b7
    622 #define PCI_DEVICE_ID_3COM_3C339        0x3390
    623 #define PCI_DEVICE_ID_3COM_3C590        0x5900
    624 #define PCI_DEVICE_ID_3COM_3C595TX      0x5950
    625 #define PCI_DEVICE_ID_3COM_3C595T4      0x5951
    626 #define PCI_DEVICE_ID_3COM_3C595MII     0x5952
    627 #define PCI_DEVICE_ID_3COM_3C900TPO     0x9000
    628 #define PCI_DEVICE_ID_3COM_3C900COMBO   0x9001
    629 #define PCI_DEVICE_ID_3COM_3C905TX      0x9050
    630 #define PCI_DEVICE_ID_3COM_3C905T4      0x9051
    631 #define PCI_DEVICE_ID_3COM_3C905B_TX    0x9055
    632 
    633 #define PCI_VENDOR_ID_SMC               0x10b8
    634 #define PCI_DEVICE_ID_SMC_EPIC100       0x0005
    635 
    636 #define PCI_VENDOR_ID_AL                0x10b9
    637 #define PCI_DEVICE_ID_AL_M1445          0x1445
    638 #define PCI_DEVICE_ID_AL_M1449          0x1449
    639 #define PCI_DEVICE_ID_AL_M1451          0x1451
    640 #define PCI_DEVICE_ID_AL_M1461          0x1461
    641 #define PCI_DEVICE_ID_AL_M1489          0x1489
    642 #define PCI_DEVICE_ID_AL_M1511          0x1511
    643 #define PCI_DEVICE_ID_AL_M1513          0x1513
    644 #define PCI_DEVICE_ID_AL_M1521          0x1521
    645 #define PCI_DEVICE_ID_AL_M1523          0x1523
    646 #define PCI_DEVICE_ID_AL_M1531          0x1531
    647 #define PCI_DEVICE_ID_AL_M1533          0x1533
    648 #define PCI_DEVICE_ID_AL_M3307          0x3307
    649 #define PCI_DEVICE_ID_AL_M4803          0x5215
    650 #define PCI_DEVICE_ID_AL_M5219          0x5219
    651 #define PCI_DEVICE_ID_AL_M5229          0x5229
    652 #define PCI_DEVICE_ID_AL_M5237          0x5237
    653 #define PCI_DEVICE_ID_AL_M7101          0x7101
    654 
    655 #define PCI_VENDOR_ID_MITSUBISHI        0x10ba
    656 
    657 #define PCI_VENDOR_ID_SURECOM           0x10bd
    658 #define PCI_DEVICE_ID_SURECOM_NE34      0x0e34
    659 
    660 #define PCI_VENDOR_ID_NEOMAGIC          0x10c8
    661 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
    662 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
    663 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
    664 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
    665 
    666 #define PCI_VENDOR_ID_ASP               0x10cd
    667 #define PCI_DEVICE_ID_ASP_ABP940        0x1200
    668 #define PCI_DEVICE_ID_ASP_ABP940U       0x1300
    669 #define PCI_DEVICE_ID_ASP_ABP940UW      0x2300
    670 
    671 #define PCI_VENDOR_ID_MACRONIX          0x10d9
    672 #define PCI_DEVICE_ID_MACRONIX_MX98713  0x0512
    673 #define PCI_DEVICE_ID_MACRONIX_MX987x5  0x0531
    674 
    675 #define PCI_VENDOR_ID_CERN              0x10dc
    676 #define PCI_DEVICE_ID_CERN_SPSB_PMC     0x0001
    677 #define PCI_DEVICE_ID_CERN_SPSB_PCI     0x0002
    678 #define PCI_DEVICE_ID_CERN_HIPPI_DST    0x0021
    679 #define PCI_DEVICE_ID_CERN_HIPPI_SRC    0x0022
    680 
    681 #define PCI_VENDOR_ID_NVIDIA            0x10de
    682 
    683 #define PCI_VENDOR_ID_IMS               0x10e0
    684 #define PCI_DEVICE_ID_IMS_8849          0x8849
    685 
    686 #define PCI_VENDOR_ID_TEKRAM2           0x10e1
    687 #define PCI_DEVICE_ID_TEKRAM2_690c      0x690c
    688 
    689 #define PCI_VENDOR_ID_TUNDRA            0x10e3
    690 #define PCI_DEVICE_ID_TUNDRA_CA91C042   0x0000
    691 
    692 #define PCI_VENDOR_ID_AMCC              0x10e8
    693 #define PCI_DEVICE_ID_AMCC_MYRINET      0x8043
    694 #define PCI_DEVICE_ID_AMCC_PARASTATION  0x8062
    695 #define PCI_DEVICE_ID_AMCC_S5933        0x807d
    696 #define PCI_DEVICE_ID_AMCC_S5933_HEPC3  0x809c
    697 
    698 #define PCI_VENDOR_ID_INTERG            0x10ea
    699 #define PCI_DEVICE_ID_INTERG_1680       0x1680
    700 #define PCI_DEVICE_ID_INTERG_1682       0x1682
    701 
    702 #define PCI_VENDOR_ID_REALTEK           0x10ec
    703 #define PCI_DEVICE_ID_REALTEK_8029      0x8029
    704 #define PCI_DEVICE_ID_REALTEK_8129      0x8129
    705 #define PCI_DEVICE_ID_REALTEK_8139      0x8139
    706 
    707 #define PCI_VENDOR_ID_TRUEVISION        0x10fa
    708 #define PCI_DEVICE_ID_TRUEVISION_T1000  0x000c
    709 
    710 #define PCI_VENDOR_ID_INIT              0x1101
    711 #define PCI_DEVICE_ID_INIT_320P         0x9100
    712 #define PCI_DEVICE_ID_INIT_360P         0x9500
    713 
    714 #define PCI_VENDOR_ID_TTI               0x1103
    715 #define PCI_DEVICE_ID_TTI_HPT343        0x0003
    716 
    717 #define PCI_VENDOR_ID_VIA               0x1106
    718 #define PCI_DEVICE_ID_VIA_82C505        0x0505
    719 #define PCI_DEVICE_ID_VIA_82C561        0x0561
    720 #define PCI_DEVICE_ID_VIA_82C586_1      0x0571
    721 #define PCI_DEVICE_ID_VIA_82C576        0x0576
    722 #define PCI_DEVICE_ID_VIA_82C585        0x0585
    723 #define PCI_DEVICE_ID_VIA_82C586_0      0x0586
    724 #define PCI_DEVICE_ID_VIA_82C595        0x0595
    725 #define PCI_DEVICE_ID_VIA_82C597_0      0x0597
    726 #define PCI_DEVICE_ID_VIA_82C926        0x0926
    727 #define PCI_DEVICE_ID_VIA_82C416        0x1571
    728 #define PCI_DEVICE_ID_VIA_82C595_97     0x1595
    729 #define PCI_DEVICE_ID_VIA_82C586_2      0x3038
    730 #define PCI_DEVICE_ID_VIA_82C586_3      0x3040
    731 #define PCI_DEVICE_ID_VIA_86C100A       0x6100
    732 #define PCI_DEVICE_ID_VIA_82C597_1      0x8597
    733 
    734 #define PCI_VENDOR_ID_VORTEX            0x1119
    735 #define PCI_DEVICE_ID_VORTEX_GDT60x0    0x0000
    736 #define PCI_DEVICE_ID_VORTEX_GDT6000B   0x0001
    737 #define PCI_DEVICE_ID_VORTEX_GDT6x10    0x0002
    738 #define PCI_DEVICE_ID_VORTEX_GDT6x20    0x0003
    739 #define PCI_DEVICE_ID_VORTEX_GDT6530    0x0004
    740 #define PCI_DEVICE_ID_VORTEX_GDT6550    0x0005
    741 #define PCI_DEVICE_ID_VORTEX_GDT6x17    0x0006
    742 #define PCI_DEVICE_ID_VORTEX_GDT6x27    0x0007
    743 #define PCI_DEVICE_ID_VORTEX_GDT6537    0x0008
    744 #define PCI_DEVICE_ID_VORTEX_GDT6557    0x0009
    745 #define PCI_DEVICE_ID_VORTEX_GDT6x15    0x000a
    746 #define PCI_DEVICE_ID_VORTEX_GDT6x25    0x000b
    747 #define PCI_DEVICE_ID_VORTEX_GDT6535    0x000c
    748 #define PCI_DEVICE_ID_VORTEX_GDT6555    0x000d
    749 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP  0x0100
    750 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP  0x0101
    751 #define PCI_DEVICE_ID_VORTEX_GDT6537RP  0x0102
    752 #define PCI_DEVICE_ID_VORTEX_GDT6557RP  0x0103
    753 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP  0x0104
    754 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP  0x0105
    755 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
    756 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
    757 #define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
    758 #define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
    759 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
    760 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
    761 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
    762 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
    763 #define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
    764 #define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
    765 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
    766 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
    767 
    768 #define PCI_VENDOR_ID_EF                0x111a
    769 #define PCI_DEVICE_ID_EF_ATM_FPGA       0x0000
    770 #define PCI_DEVICE_ID_EF_ATM_ASIC       0x0002
    771 
    772 #define PCI_VENDOR_ID_FORE              0x1127
    773 #define PCI_DEVICE_ID_FORE_PCA200PC     0x0210
    774 #define PCI_DEVICE_ID_FORE_PCA200E      0x0300
    775 
    776 #define PCI_VENDOR_ID_IMAGINGTECH       0x112f
    777 #define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
    778 
    779 #define PCI_VENDOR_ID_PHILIPS           0x1131
    780 #define PCI_DEVICE_ID_PHILIPS_SAA7145   0x7145
    781 #define PCI_DEVICE_ID_PHILIPS_SAA7146   0x7146
    782 
    783 #define PCI_VENDOR_ID_CYCLONE           0x113c
    784 #define PCI_DEVICE_ID_CYCLONE_SDK       0x0001
    785 
    786 #define PCI_VENDOR_ID_ALLIANCE          0x1142
    787 #define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
    788 #define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
    789 #define PCI_DEVICE_ID_ALLIANCE_AT24     0x6424
    790 #define PCI_DEVICE_ID_ALLIANCE_AT3D     0x643d
    791 
    792 #define PCI_VENDOR_ID_SK                0x1148
    793 #define PCI_DEVICE_ID_SK_FP             0x4000
    794 #define PCI_DEVICE_ID_SK_TR             0x4200
    795 #define PCI_DEVICE_ID_SK_GE             0x4300
    796 
    797 #define PCI_VENDOR_ID_VMIC              0x114a
    798 #define PCI_DEVICE_ID_VMIC_VME          0x7587
    799 
    800 #define PCI_VENDOR_ID_DIGI              0x114f
    801 #define PCI_DEVICE_ID_DIGI_EPC          0x0002
    802 #define PCI_DEVICE_ID_DIGI_RIGHTSWITCH  0x0003
    803 #define PCI_DEVICE_ID_DIGI_XEM          0x0004
    804 #define PCI_DEVICE_ID_DIGI_XR           0x0005
    805 #define PCI_DEVICE_ID_DIGI_CX           0x0006
    806 #define PCI_DEVICE_ID_DIGI_XRJ          0x0009
    807 #define PCI_DEVICE_ID_DIGI_EPCJ         0x000a
    808 #define PCI_DEVICE_ID_DIGI_XR_920       0x0027
    809 
    810 #define PCI_VENDOR_ID_MUTECH            0x1159
    811 #define PCI_DEVICE_ID_MUTECH_MV1000     0x0001
    812 
    813 #define PCI_VENDOR_ID_RENDITION         0x1163
    814 #define PCI_DEVICE_ID_RENDITION_VERITE  0x0001
    815 #define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
    816 
    817 #define PCI_VENDOR_ID_TOSHIBA           0x1179
    818 #define PCI_DEVICE_ID_TOSHIBA_601       0x0601
    819 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95   0x060a
    820 #define PCI_DEVICE_ID_TOSHIBA_TOPIC97   0x060f
    821 
    822 #define PCI_VENDOR_ID_RICOH             0x1180
    823 #define PCI_DEVICE_ID_RICOH_RL5C465     0x0465
    824 #define PCI_DEVICE_ID_RICOH_RL5C466     0x0466
    825 #define PCI_DEVICE_ID_RICOH_RL5C475     0x0475
    826 #define PCI_DEVICE_ID_RICOH_RL5C478     0x0478
    827 
    828 #define PCI_VENDOR_ID_ARTOP             0x1191
    829 #define PCI_DEVICE_ID_ARTOP_ATP8400     0x0004
    830 #define PCI_DEVICE_ID_ARTOP_ATP850UF    0x0005
    831 
    832 #define PCI_VENDOR_ID_ZEITNET           0x1193
    833 #define PCI_DEVICE_ID_ZEITNET_1221      0x0001
    834 #define PCI_DEVICE_ID_ZEITNET_1225      0x0002
    835 
    836 #define PCI_VENDOR_ID_OMEGA             0x119b
    837 #define PCI_DEVICE_ID_OMEGA_82C092G     0x1221
    838 
    839 #define PCI_VENDOR_ID_LITEON            0x11ad
    840 #define PCI_DEVICE_ID_LITEON_LNE100TX   0x0002
    841 
    842 #define PCI_VENDOR_ID_NP                0x11bc
    843 #define PCI_DEVICE_ID_NP_PCI_FDDI       0x0001
    844 
    845 #define PCI_VENDOR_ID_ATT               0x11c1
    846 #define PCI_DEVICE_ID_ATT_L56XMF        0x0440
    847 
    848 #define PCI_VENDOR_ID_SPECIALIX         0x11cb
    849 #define PCI_DEVICE_ID_SPECIALIX_IO8     0x2000
    850 #define PCI_DEVICE_ID_SPECIALIX_XIO     0x4000
    851 #define PCI_DEVICE_ID_SPECIALIX_RIO     0x8000
    852 
    853 #define PCI_VENDOR_ID_AURAVISION        0x11d1
    854 #define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
    855 
    856 #define PCI_VENDOR_ID_IKON              0x11d5
    857 #define PCI_DEVICE_ID_IKON_10115        0x0115
    858 #define PCI_DEVICE_ID_IKON_10117        0x0117
    859 
    860 #define PCI_VENDOR_ID_ZORAN             0x11de
    861 #define PCI_DEVICE_ID_ZORAN_36057       0x6057
    862 #define PCI_DEVICE_ID_ZORAN_36120       0x6120
    863 
    864 #define PCI_VENDOR_ID_KINETIC           0x11f4
    865 #define PCI_DEVICE_ID_KINETIC_2915      0x2915
    866 
    867 #define PCI_VENDOR_ID_COMPEX            0x11f6
    868 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
    869 #define PCI_DEVICE_ID_COMPEX_RL2000     0x1401
    870 
    871 #define PCI_VENDOR_ID_RP               0x11fe
    872 #define PCI_DEVICE_ID_RP32INTF         0x0001
    873 #define PCI_DEVICE_ID_RP8INTF          0x0002
    874 #define PCI_DEVICE_ID_RP16INTF         0x0003
    875 #define PCI_DEVICE_ID_RP4QUAD          0x0004
    876 #define PCI_DEVICE_ID_RP8OCTA          0x0005
    877 #define PCI_DEVICE_ID_RP8J             0x0006
    878 #define PCI_DEVICE_ID_RPP4             0x000A
    879 #define PCI_DEVICE_ID_RPP8             0x000B
    880 #define PCI_DEVICE_ID_RP8M             0x000C
    881 
    882 #define PCI_VENDOR_ID_CYCLADES          0x120e
    883 #define PCI_DEVICE_ID_CYCLOM_Y_Lo       0x0100
    884 #define PCI_DEVICE_ID_CYCLOM_Y_Hi       0x0101
    885 #define PCI_DEVICE_ID_CYCLOM_Z_Lo       0x0200
    886 #define PCI_DEVICE_ID_CYCLOM_Z_Hi       0x0201
    887 
    888 #define PCI_VENDOR_ID_ESSENTIAL         0x120f
    889 #define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER      0x0001
    890 
    891 #define PCI_VENDOR_ID_O2                0x1217
    892 #define PCI_DEVICE_ID_O2_6729           0x6729
    893 #define PCI_DEVICE_ID_O2_6730           0x673a
    894 #define PCI_DEVICE_ID_O2_6832           0x6832
    895 #define PCI_DEVICE_ID_O2_6836           0x6836
    896 
    897 #define PCI_VENDOR_ID_3DFX              0x121a
    898 #define PCI_DEVICE_ID_3DFX_VOODOO       0x0001
    899 #define PCI_DEVICE_ID_3DFX_VOODOO2      0x0002
    900 
    901 #define PCI_VENDOR_ID_SIGMADES          0x1236
    902 #define PCI_DEVICE_ID_SIGMADES_6425     0x6401
    903 
    904 #define PCI_VENDOR_ID_CCUBE             0x123f
    905 
    906 #define PCI_VENDOR_ID_DIPIX             0x1246
    907 
    908 #define PCI_VENDOR_ID_STALLION          0x124d
    909 #define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
    910 #define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
    911 #define PCI_DEVICE_ID_STALLION_EIOPCI   0x0003
    912 
    913 #define PCI_VENDOR_ID_OPTIBASE          0x1255
    914 #define PCI_DEVICE_ID_OPTIBASE_FORGE    0x1110
    915 #define PCI_DEVICE_ID_OPTIBASE_FUSION   0x1210
    916 #define PCI_DEVICE_ID_OPTIBASE_VPLEX    0x2110
    917 #define PCI_DEVICE_ID_OPTIBASE_VPLEXCC  0x2120
    918 #define PCI_DEVICE_ID_OPTIBASE_VQUEST   0x2130
    919 
    920 #define PCI_VENDOR_ID_SATSAGEM          0x1267
    921 #define PCI_DEVICE_ID_SATSAGEM_PCR2101  0x5352
    922 #define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
    923 
    924 #define PCI_VENDOR_ID_HUGHES            0x1273
    925 #define PCI_DEVICE_ID_HUGHES_DIRECPC    0x0002
    926 
    927 #define PCI_VENDOR_ID_ENSONIQ           0x1274
    928 #define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI  0x5000
    929 
    930 #define PCI_VENDOR_ID_ALTEON            0x12ae
    931 #define PCI_DEVICE_ID_ALTEON_ACENIC     0x0001
    932 
    933 #define PCI_VENDOR_ID_PICTUREL          0x12c5
    934 #define PCI_DEVICE_ID_PICTUREL_PCIVST   0x0081
    935 
    936 #define PCI_VENDOR_ID_NVIDIA_SGS        0x12d2
    937 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
    938 
    939 #define PCI_VENDOR_ID_CBOARDS           0x1307
    940 #define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
    941 
    942 #define PCI_VENDOR_ID_SYMPHONY          0x1c1c
    943 #define PCI_DEVICE_ID_SYMPHONY_101      0x0001
    944 
    945 #define PCI_VENDOR_ID_TEKRAM            0x1de1
    946 #define PCI_DEVICE_ID_TEKRAM_DC290      0xdc29
    947 
    948 #define PCI_VENDOR_ID_3DLABS            0x3d3d
    949 #define PCI_DEVICE_ID_3DLABS_300SX      0x0001
    950 #define PCI_DEVICE_ID_3DLABS_500TX      0x0002
    951 #define PCI_DEVICE_ID_3DLABS_DELTA      0x0003
    952 #define PCI_DEVICE_ID_3DLABS_PERMEDIA   0x0004
    953 #define PCI_DEVICE_ID_3DLABS_MX         0x0006
    954 
    955 #define PCI_VENDOR_ID_AVANCE            0x4005
    956 #define PCI_DEVICE_ID_AVANCE_ALG2064    0x2064
    957 #define PCI_DEVICE_ID_AVANCE_2302       0x2302
    958 
    959 #define PCI_VENDOR_ID_NETVIN            0x4a14
    960 #define PCI_DEVICE_ID_NETVIN_NV5000SC   0x5000
    961 
    962 #define PCI_VENDOR_ID_S3                0x5333
    963 #define PCI_DEVICE_ID_S3_PLATO_PXS      0x0551
    964 #define PCI_DEVICE_ID_S3_ViRGE          0x5631
    965 #define PCI_DEVICE_ID_S3_TRIO           0x8811
    966 #define PCI_DEVICE_ID_S3_AURORA64VP     0x8812
    967 #define PCI_DEVICE_ID_S3_TRIO64UVP      0x8814
    968 #define PCI_DEVICE_ID_S3_ViRGE_VX       0x883d
    969 #define PCI_DEVICE_ID_S3_868            0x8880
    970 #define PCI_DEVICE_ID_S3_928            0x88b0
    971 #define PCI_DEVICE_ID_S3_864_1          0x88c0
    972 #define PCI_DEVICE_ID_S3_864_2          0x88c1
    973 #define PCI_DEVICE_ID_S3_964_1          0x88d0
    974 #define PCI_DEVICE_ID_S3_964_2          0x88d1
    975 #define PCI_DEVICE_ID_S3_968            0x88f0
    976 #define PCI_DEVICE_ID_S3_TRIO64V2       0x8901
    977 #define PCI_DEVICE_ID_S3_PLATO_PXG      0x8902
    978 #define PCI_DEVICE_ID_S3_ViRGE_DXGX     0x8a01
    979 #define PCI_DEVICE_ID_S3_ViRGE_GX2      0x8a10
    980 #define PCI_DEVICE_ID_S3_ViRGE_MX       0x8c01
    981 #define PCI_DEVICE_ID_S3_ViRGE_MXP      0x8c02
    982 #define PCI_DEVICE_ID_S3_ViRGE_MXPMV    0x8c03
    983 #define PCI_DEVICE_ID_S3_SONICVIBES     0xca00
    984 
    985 #define PCI_VENDOR_ID_INTEL             0x8086
    986 #define PCI_DEVICE_ID_INTEL_82375       0x0482
    987 #define PCI_DEVICE_ID_INTEL_82424       0x0483
    988 #define PCI_DEVICE_ID_INTEL_82378       0x0484
    989 #define PCI_DEVICE_ID_INTEL_82430       0x0486
    990 #define PCI_DEVICE_ID_INTEL_82434       0x04a3
    991 #define PCI_DEVICE_ID_INTEL_82092AA_0   0x1221
    992 #define PCI_DEVICE_ID_INTEL_82092AA_1   0x1222
    993 #define PCI_DEVICE_ID_INTEL_7116        0x1223
    994 #define PCI_DEVICE_ID_INTEL_82596       0x1226
    995 #define PCI_DEVICE_ID_INTEL_82865       0x1227
    996 #define PCI_DEVICE_ID_INTEL_82557       0x1229
    997 #define PCI_DEVICE_ID_INTEL_82437       0x122d
    998 #define PCI_DEVICE_ID_INTEL_82371FB_0   0x122e
    999 #define PCI_DEVICE_ID_INTEL_82371FB_1   0x1230
    1000 #define PCI_DEVICE_ID_INTEL_82371MX     0x1234
    1001 #define PCI_DEVICE_ID_INTEL_82437MX     0x1235
    1002 #define PCI_DEVICE_ID_INTEL_82441       0x1237
    1003 #define PCI_DEVICE_ID_INTEL_82380FB     0x124b
    1004 #define PCI_DEVICE_ID_INTEL_82439       0x1250
    1005 #define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
    1006 #define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
    1007 #define PCI_DEVICE_ID_INTEL_82371SB_2   0x7020
    1008 #define PCI_DEVICE_ID_INTEL_82437VX     0x7030
    1009 #define PCI_DEVICE_ID_INTEL_82439TX     0x7100
    1010 #define PCI_DEVICE_ID_INTEL_82371AB_0   0x7110
    1011 #define PCI_DEVICE_ID_INTEL_82371AB     0x7111
    1012 #define PCI_DEVICE_ID_INTEL_82371AB_2   0x7112
    1013 #define PCI_DEVICE_ID_INTEL_82371AB_3   0x7113
    1014 #define PCI_DEVICE_ID_INTEL_82443LX_0   0x7180
    1015 #define PCI_DEVICE_ID_INTEL_82443LX_1   0x7181
    1016 #define PCI_DEVICE_ID_INTEL_82443BX_0   0x7190
    1017 #define PCI_DEVICE_ID_INTEL_82443BX_1   0x7191
    1018 #define PCI_DEVICE_ID_INTEL_82443BX_2   0x7192
    1019 #define PCI_DEVICE_ID_INTEL_P6          0x84c4
    1020 #define PCI_DEVICE_ID_INTEL_82450GX     0x84c5
    1021 
    1022 #define PCI_VENDOR_ID_KTI               0x8e2e
    1023 #define PCI_DEVICE_ID_KTI_ET32P2        0x3000
    1024 
    1025 #define PCI_VENDOR_ID_ADAPTEC           0x9004
    1026 #define PCI_DEVICE_ID_ADAPTEC_7810      0x1078
    1027 #define PCI_DEVICE_ID_ADAPTEC_7850      0x5078
    1028 #define PCI_DEVICE_ID_ADAPTEC_7855      0x5578
    1029 #define PCI_DEVICE_ID_ADAPTEC_5800      0x5800
    1030 #define PCI_DEVICE_ID_ADAPTEC_1480A     0x6075
    1031 #define PCI_DEVICE_ID_ADAPTEC_7860      0x6078
    1032 #define PCI_DEVICE_ID_ADAPTEC_7861      0x6178
    1033 #define PCI_DEVICE_ID_ADAPTEC_7870      0x7078
    1034 #define PCI_DEVICE_ID_ADAPTEC_7871      0x7178
    1035 #define PCI_DEVICE_ID_ADAPTEC_7872      0x7278
    1036 #define PCI_DEVICE_ID_ADAPTEC_7873      0x7378
    1037 #define PCI_DEVICE_ID_ADAPTEC_7874      0x7478
    1038 #define PCI_DEVICE_ID_ADAPTEC_7895      0x7895
    1039 #define PCI_DEVICE_ID_ADAPTEC_7880      0x8078
    1040 #define PCI_DEVICE_ID_ADAPTEC_7881      0x8178
    1041 #define PCI_DEVICE_ID_ADAPTEC_7882      0x8278
    1042 #define PCI_DEVICE_ID_ADAPTEC_7883      0x8378
    1043 #define PCI_DEVICE_ID_ADAPTEC_7884      0x8478
    1044 #define PCI_DEVICE_ID_ADAPTEC_1030      0x8b78
    1045 
    1046 #define PCI_VENDOR_ID_ADAPTEC2          0x9005
    1047 #define PCI_DEVICE_ID_ADAPTEC2_2940U2   0x0010
    1048 #define PCI_DEVICE_ID_ADAPTEC2_7890     0x001f
    1049 #define PCI_DEVICE_ID_ADAPTEC2_3940U2   0x0050
    1050 #define PCI_DEVICE_ID_ADAPTEC2_7896     0x005f
    1051 
    1052 #define PCI_VENDOR_ID_ATRONICS          0x907f
    1053 #define PCI_DEVICE_ID_ATRONICS_2015     0x2015
    1054 
    1055 #define PCI_VENDOR_ID_HOLTEK            0x9412
    1056 #define PCI_DEVICE_ID_HOLTEK_6565       0x6565
    1057 
    1058 #define PCI_VENDOR_ID_TIGERJET          0xe159
    1059 #define PCI_DEVICE_ID_TIGERJET_300      0x0001
    1060 
    1061 #define PCI_VENDOR_ID_ARK               0xedd8
    1062 #define PCI_DEVICE_ID_ARK_STING         0xa091
    1063 #define PCI_DEVICE_ID_ARK_STINGARK      0xa099
    1064 #define PCI_DEVICE_ID_ARK_2000MT        0xa0a1
    1065 
    1066 /*
    1067  * The PCI interface treats multi-function devices as independent
    1068  * devices.  The slot/function address of each device is encoded
    1069  * in a single byte as follows:
    1070  *
    1071  *      7:3 = slot
    1072  *      2:0 = function
    1073  */
    1074 #define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
    1075 #define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
    1076 #define PCI_FUNC(devfn)         ((devfn) & 0x07)
    1077 
    1078 /*
    1079  * Error values that may be returned by the PCI bios.
    1080  */
    1081 #define PCIBIOS_SUCCESSFUL              0x00
    1082 #define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
    1083 #define PCIBIOS_BAD_VENDOR_ID           0x83
    1084 #define PCIBIOS_DEVICE_NOT_FOUND        0x86
    1085 #define PCIBIOS_BAD_REGISTER_NUMBER     0x87
    1086 #define PCIBIOS_SET_FAILED              0x88
    1087 #define PCIBIOS_BUFFER_TOO_SMALL        0x89
    1088 
    1089 /* T. Straumann, 7/31/2001: increased to 32 - PMC slots are not
    1090  * scanned on mvme2306 otherwise
    1091  */
    1092 #define PCI_MAX_DEVICES                 32
    1093 #define PCI_MAX_FUNCTIONS               8
    1094 
    1095 typedef struct  {
    1096         int (*read_config_byte)(unsigned char, unsigned char,  unsigned char,
    1097                                unsigned char, unsigned char *);
    1098         int (*read_config_word)(unsigned char, unsigned char,  unsigned char,
    1099                                unsigned char, unsigned short *);
    1100         int (*read_config_dword)(unsigned char, unsigned char,  unsigned char,
    1101                                unsigned char, unsigned int *);
    1102         int (*write_config_byte)(unsigned char, unsigned char,  unsigned char,
    1103                                unsigned char, unsigned char);
    1104         int (*write_config_word)(unsigned char, unsigned char,  unsigned char,
    1105                                unsigned char, unsigned short);
    1106         int (*write_config_dword)(unsigned char, unsigned char,  unsigned char,
    1107                                unsigned char, unsigned int);
    1108 } pci_config_access_functions;
    1109 
    1110 typedef struct {
    1111   volatile unsigned char*       pci_config_addr;
    1112   volatile unsigned char*       pci_config_data;
    1113   const pci_config_access_functions*    pci_functions;
    1114 } rtems_pci_config_t;
    1115 
    1116 extern rtems_pci_config_t BSP_pci_configuration;
    1117 
    1118 extern inline int
    1119 pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
    1120                          unsigned char where, unsigned char * val) {
    1121         return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val);
    1122 }
    1123 
    1124 extern inline int
    1125 pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function,
    1126                          unsigned char where, unsigned short * val) {
    1127         return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val);
    1128 }
    1129 
    1130 extern inline int
    1131 pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
    1132                          unsigned char where, unsigned int * val) {
    1133         return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val);
    1134 }
    1135 
    1136 extern inline int
    1137 pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
    1138                          unsigned char where, unsigned char val) {
    1139         return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val);
    1140 }
    1141 
    1142 extern inline int
    1143 pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function,
    1144                          unsigned char where, unsigned short val) {
    1145         return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val);
    1146 }
    1147 
    1148 extern inline int
    1149 pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
    1150                          unsigned char where, unsigned int val) {
    1151         return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val);
    1152 }
     25#include <rtems/pci.h>
    115326
    115427/*
  • c/src/lib/libbsp/sparc/shared/pci/pcifinddevice.c

    rffd9575 rf0a7f52  
    33/* find a particular PCI device
    44 * (we assume, the firmware configured the PCI bus[es] for us)
    5  *
    6  * pcifinddevice.c,v 1.1.4.2 2003/07/18 15:48:54 joel Exp
    75 */
    8 
    9 #define PCI_INVALID_VENDORDEVICEID      0xffffffff
    10 #define PCI_MULTI_FUNCTION                      0x80
    116
    127#include <pci.h>
     
    1712                   int instance, int *pbus, int *pdev, int *pfun )
    1813{
    19    unsigned int d;
     14   uint32_t d;
    2015   unsigned short s;
    2116   unsigned char bus,dev,fun,hd;
     
    2520
    2621                pci_read_config_byte(bus,dev,0, PCI_HEADER_TYPE, &hd);
    27                 hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
     22                hd = (hd & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
    2823
    2924                for (fun=0; fun<hd; fun++) {
  • c/src/lib/libbsp/sparc/shared/spw/grspw.c

    rffd9575 rf0a7f52  
    8484#include <rtems/bspIo.h>
    8585#include <ambapp.h>
     86#include <grlib.h>
    8687#include <grspw.h>
    8788
     
    391392        {
    392393                struct ambapp_apb_info gptimer;
    393                 LEON3_Timer_Regs_Map *tregs;
     394                struct gptimer_regs *tregs;
    394395
    395396                if ( ambapp_find_apbslv(&ambapp_plb, VENDOR_GAISLER,
    396397                                        GAISLER_GPTIMER, &gptimer) == 1 ) {
    397                         tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
     398                        tregs = (struct gptimer_regs *)gptimer.start;
    398399                        sys_freq_khz = (tregs->scaler_reload+1)*1000;
    399400                        SPACEWIRE_DBG("GRSPW: detected %dkHZ system frequency\n\r",sys_freq_khz);
  • c/src/lib/libbsp/sparc/shared/uart/apbuart.c

    rffd9575 rf0a7f52  
    2323
    2424#include <ambapp.h>
     25#include <grlib.h>
    2526#include <apbuart.h>
    2627
     
    8081
    8182typedef struct {
    82         ambapp_apb_uart *regs;
     83        struct apbuart_regs *regs;
    8384        int irq;
    8485        int minor;
     
    154155
    155156#if 0
    156 static int apbuart_outbyte_try(ambapp_apb_uart *regs, unsigned char ch)
     157static int apbuart_outbyte_try(struct apbuart_regs *regs, unsigned char ch)
    157158{
    158159        if ( (READ_REG(&regs->status) & LEON_REG_UART_STATUS_THE) == 0 )
     
    165166
    166167
    167 static int apbuart_inbyte_try(ambapp_apb_uart *regs)
     168static int apbuart_inbyte_try(struct apbuart_regs *regs)
    168169{
    169170        unsigned int status;
     
    387388        {
    388389                struct ambapp_apb_info gptimer;
    389                 LEON3_Timer_Regs_Map *tregs;
     390                struct gptimer_regs *tregs;
    390391
    391392                if ( ambapp_find_apbslv(&ambapp_plb, VENDOR_GAISLER,
    392393                                        GAISLER_GPTIMER, &gptimer) == 1 ){
    393                         tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
     394                        tregs = (struct gptimer_regs *)gptimer.start;
    394395                        sys_freq_hz = (tregs->scaler_reload+1)*1000*1000;
    395396                        DBG("APBUART: detected %dHZ system frequency\n\r",sys_freq_hz);
     
    420421                printk("APBUART[%d]: at 0x%x irq %d (0x%x)\n\r",i,dev.start,dev.irq,(unsigned int)&apbuarts[i]);
    421422
    422                 apbuarts[i].regs = (ambapp_apb_uart *)dev.start;
     423                apbuarts[i].regs = (struct apbuart_regs *)dev.start;
    423424                apbuarts[i].irq = dev.irq;
    424425                apbuarts[i].minor = i;
  • c/src/libchip/network/dec21140.c

    rffd9575 rf0a7f52  
    100100
    101101/* note: the 21143 isn't really a DEC, it's an Intel chip */
    102 #define PCI_INVALID_VENDORDEVICEID      0xffffffff
    103102#define PCI_VENDOR_ID_DEC               0x1011
    104103#define PCI_DEVICE_ID_DEC_21140         0x0009
  • compile

    rffd9575 rf0a7f52  
    11#! /bin/sh
    2 # Wrapper for compilers which do not understand `-c -o'.
    3 
    4 scriptversion=2010-11-15.09; # UTC
    5 
    6 # Copyright (C) 1999, 2000, 2003, 2004, 2005, 2009, 2010 Free Software
    7 # Foundation, Inc.
     2# Wrapper for compilers which do not understand '-c -o'.
     3
     4scriptversion=2012-03-05.13; # UTC
     5
     6# Copyright (C) 1999, 2000, 2003, 2004, 2005, 2009, 2010, 2012 Free
     7# Software Foundation, Inc.
    88# Written by Tom Tromey <tromey@cygnus.com>.
    99#
     
    4141# func_file_conv build_file lazy
    4242# Convert a $build file to $host form and store it in $file
    43 # Currently only supports Win32 hosts. If the determined conversion
     43# Currently only supports Windows hosts. If the determined conversion
    4444# type is listed in (the comma separated) LAZY, no conversion will
    4545# take place.
     
    7878      ;;
    7979  esac
     80}
     81
     82# func_cl_dashL linkdir
     83# Make cl look for libraries in LINKDIR
     84func_cl_dashL ()
     85{
     86  func_file_conv "$1"
     87  if test -z "$lib_path"; then
     88    lib_path=$file
     89  else
     90    lib_path="$lib_path;$file"
     91  fi
     92  linker_opts="$linker_opts -LIBPATH:$file"
     93}
     94
     95# func_cl_dashl library
     96# Do a library search-path lookup for cl
     97func_cl_dashl ()
     98{
     99  lib=$1
     100  found=no
     101  save_IFS=$IFS
     102  IFS=';'
     103  for dir in $lib_path $LIB
     104  do
     105    IFS=$save_IFS
     106    if $shared && test -f "$dir/$lib.dll.lib"; then
     107      found=yes
     108      lib=$dir/$lib.dll.lib
     109      break
     110    fi
     111    if test -f "$dir/$lib.lib"; then
     112      found=yes
     113      lib=$dir/$lib.lib
     114      break
     115    fi
     116  done
     117  IFS=$save_IFS
     118
     119  if test "$found" != yes; then
     120    lib=$lib.lib
     121  fi
    80122}
    81123
     
    95137      case $1 in
    96138        -o)
    97           # configure might choose to run compile as `compile cc -o foo foo.c'.
     139          # configure might choose to run compile as 'compile cc -o foo foo.c'.
    98140          eat=1
    99141          case $2 in
     
    110152          esac
    111153          ;;
     154        -I)
     155          eat=1
     156          func_file_conv "$2" mingw
     157          set x "$@" -I"$file"
     158          shift
     159          ;;
    112160        -I*)
    113161          func_file_conv "${1#-I}" mingw
     
    115163          shift
    116164          ;;
     165        -l)
     166          eat=1
     167          func_cl_dashl "$2"
     168          set x "$@" "$lib"
     169          shift
     170          ;;
    117171        -l*)
    118           lib=${1#-l}
    119           found=no
    120           save_IFS=$IFS
    121           IFS=';'
    122           for dir in $lib_path $LIB
    123           do
    124             IFS=$save_IFS
    125             if $shared && test -f "$dir/$lib.dll.lib"; then
    126               found=yes
    127               set x "$@" "$dir/$lib.dll.lib"
    128               break
    129             fi
    130             if test -f "$dir/$lib.lib"; then
    131               found=yes
    132               set x "$@" "$dir/$lib.lib"
    133               break
    134             fi
    135           done
    136           IFS=$save_IFS
    137 
    138           test "$found" != yes && set x "$@" "$lib.lib"
    139           shift
     172          func_cl_dashl "${1#-l}"
     173          set x "$@" "$lib"
     174          shift
     175          ;;
     176        -L)
     177          eat=1
     178          func_cl_dashL "$2"
    140179          ;;
    141180        -L*)
    142           func_file_conv "${1#-L}"
    143           if test -z "$lib_path"; then
    144             lib_path=$file
    145           else
    146             lib_path="$lib_path;$file"
    147           fi
    148           linker_opts="$linker_opts -LIBPATH:$file"
     181          func_cl_dashL "${1#-L}"
    149182          ;;
    150183        -static)
     
    197230case $1 in
    198231  '')
    199      echo "$0: No command.  Try \`$0 --help' for more information." 1>&2
     232     echo "$0: No command.  Try '$0 --help' for more information." 1>&2
    200233     exit 1;
    201234     ;;
     
    204237Usage: compile [--help] [--version] PROGRAM [ARGS]
    205238
    206 Wrapper for compilers which do not understand `-c -o'.
    207 Remove `-o dest.o' from ARGS, run PROGRAM with the remaining
     239Wrapper for compilers which do not understand '-c -o'.
     240Remove '-o dest.o' from ARGS, run PROGRAM with the remaining
    208241arguments, and rename the output as expected.
    209242
    210243If you are trying to build a whole package this is not the
    211 right script to run: please start by reading the file `INSTALL'.
     244right script to run: please start by reading the file 'INSTALL'.
    212245
    213246Report bugs to <bug-automake@gnu.org>.
     
    234267    case $1 in
    235268      -o)
    236         # configure might choose to run compile as `compile cc -o foo foo.c'.
    237         # So we strip `-o arg' only if arg is an object.
     269        # configure might choose to run compile as 'compile cc -o foo foo.c'.
     270        # So we strip '-o arg' only if arg is an object.
    238271        eat=1
    239272        case $2 in
     
    262295
    263296if test -z "$ofile" || test -z "$cfile"; then
    264   # If no `-o' option was seen then we might have been invoked from a
     297  # If no '-o' option was seen then we might have been invoked from a
    265298  # pattern rule where we don't need one.  That is ok -- this is a
    266299  # normal compilation that the losing compiler can handle.  If no
    267   # `.c' file was seen then we are probably linking.  That is also
     300  # '.c' file was seen then we are probably linking.  That is also
    268301  # ok.
    269302  exec "$@"
     
    274307
    275308# Create the lock directory.
    276 # Note: use `[/\\:.-]' here to ensure that we don't use the same name
     309# Note: use '[/\\:.-]' here to ensure that we don't use the same name
    277310# that we are using for the .o file.  Also, base the name on the expected
    278311# object file name, since that is what matters with a parallel build.
  • cpukit/include/rtems/pci.h

    rffd9575 rf0a7f52  
    3333#define PCI_VENDOR_ID      0x00  /* 16 bits */
    3434#define PCI_DEVICE_ID      0x02  /* 16 bits */
     35
     36#define PCI_INVALID_VENDORDEVICEID 0xffffffff
    3537
    3638#define PCI_COMMAND             0x04    /* 16 bits */
     
    6870#define PCI_LATENCY_TIMER    0x0d /* 8 bits */
    6971
    70 #define PCI_HEADER_TYPE         0x0e /* 8 bits */
    71 #define PCI_HEADER_TYPE_NORMAL  0
    72 #define PCI_HEADER_TYPE_BRIDGE  1
    73 #define PCI_HEADER_TYPE_CARDBUS 2
     72#define PCI_HEADER_TYPE                  0x0e /* 8 bits */
     73#define PCI_HEADER_TYPE_NORMAL           0x00
     74#define PCI_HEADER_TYPE_BRIDGE           0x01
     75#define PCI_HEADER_TYPE_CARDBUS          0x02
     76#define PCI_HEADER_TYPE_MULTI_FUNCTION   0x80
    7477
    7578#define PCI_BIST            0x0f  /* 8 bits */
     
    106109#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
    107110#define PCI_SUBSYSTEM_ID        0x2e
    108 #define PCI_ROM_ADDRESS         0x30/* Bits 31..11 address, 10..1 reserved */
     111#define PCI_ROM_ADDRESS         0x30 /* Bits 31..11 address, 10..1 reserved */
    109112#define PCI_ROM_ADDRESS_ENABLE  0x01
    110113#define PCI_ROM_ADDRESS_MASK    (~0x7ffUL)
    111114
    112 /* 0x34-0x3b are reserved */
     115/* upper 24 bits are reserved */
     116#define PCI_CAPABILITY_LIST_POINTER    0x34
     117
     118/* 0x38-0x3b are reserved */
    113119#define PCI_INTERRUPT_LINE  0x3c  /* 8 bits */
    114120#define PCI_INTERRUPT_PIN   0x3d  /* 8 bits */
     
    373379#define PCI_DEVICE_ID_DEC_TULIP_PLUS               0x0014
    374380#define PCI_DEVICE_ID_DEC_21142                    0x0019
     381#define PCI_DEVICE_ID_DEC_21143                    0x0019
    375382#define PCI_DEVICE_ID_DEC_21052                    0x0021
    376383#define PCI_DEVICE_ID_DEC_21150                    0x0022
     
    628635#define PCI_DEVICE_ID_PLX_9060SD                   0x906D
    629636#define PCI_DEVICE_ID_PLX_9080                     0x9080
     637
     638#define PCI_VENDOR_ID_PLX2                         0x3388
     639#define PCI_DEVICE_ID_PLX2_PCI6154_HB2             0x0026
    630640
    631641#define PCI_VENDOR_ID_MADGE                        0x10b6
     
    851861#define PCI_DEVICE_ID_OMEGA_82C092G                0x1221
    852862
     863#define PCI_VENDOR_ID_MARVELL                      0x11ab
     864#define PCI_DEVICE_ID_MARVELL_GT6426xAB            0x6430
     865
    853866#define PCI_VENDOR_ID_LITEON                       0x11ad
    854867#define PCI_DEVICE_ID_LITEON_LNE100TX              0x0002
     
    10031016#define PCI_DEVICE_ID_INTEL_82430                  0x0486
    10041017#define PCI_DEVICE_ID_INTEL_82434                  0x04a3
     1018#define PCI_DEVICE_ID_INTEL_82544EI_COPPER         0x1008
    10051019#define PCI_DEVICE_ID_INTEL_82092AA_0              0x1221
    10061020#define PCI_DEVICE_ID_INTEL_82092AA_1              0x1222
  • depcomp

    rffd9575 rf0a7f52  
    22# depcomp - compile a program generating dependencies as side-effects
    33
    4 scriptversion=2011-12-04.11; # UTC
     4scriptversion=2012-03-27.16; # UTC
    55
    66# Copyright (C) 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2009, 2010,
    7 # 2011 Free Software Foundation, Inc.
     7# 2011, 2012 Free Software Foundation, Inc.
    88
    99# This program is free software; you can redistribute it and/or modify
     
    2929case $1 in
    3030  '')
    31      echo "$0: No command.  Try \`$0 --help' for more information." 1>&2
     31     echo "$0: No command.  Try '$0 --help' for more information." 1>&2
    3232     exit 1;
    3333     ;;
     
    4141Environment variables:
    4242  depmode     Dependency tracking mode.
    43   source      Source file read by `PROGRAMS ARGS'.
    44   object      Object file output by `PROGRAMS ARGS'.
     43  source      Source file read by 'PROGRAMS ARGS'.
     44  object      Object file output by 'PROGRAMS ARGS'.
    4545  DEPDIR      directory where to store dependencies.
    4646  depfile     Dependency file to output.
     
    5858esac
    5959
     60# A tabulation character.
     61tab='   '
     62# A newline character.
     63nl='
     64'
     65
    6066if test -z "$depmode" || test -z "$source" || test -z "$object"; then
    6167  echo "depcomp: Variables source, object and depmode must be set" 1>&2
     
    101107   cygpath_u='sed s,\\\\,/,g'
    102108   depmode=msvc7
     109fi
     110
     111if test "$depmode" = xlc; then
     112   # IBM C/C++ Compilers xlc/xlC can output gcc-like dependency informations.
     113   gccflag=-qmakedep=gcc,-MF
     114   depmode=gcc
    103115fi
    104116
     
    157169  sed -e 's/^[^:]*: / /' \
    158170      -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile"
    159 ## This next piece of magic avoids the `deleted header file' problem.
     171## This next piece of magic avoids the "deleted header file" problem.
    160172## The problem is that when a header file which appears in a .P file
    161173## is deleted, the dependency causes make to die (because there is
     
    163175## dummy dependencies for each header file.  Too bad gcc doesn't do
    164176## this for us directly.
    165   tr ' ' '
    166 ' < "$tmpdepfile" |
    167 ## Some versions of gcc put a space before the `:'.  On the theory
     177  tr ' ' "$nl" < "$tmpdepfile" |
     178## Some versions of gcc put a space before the ':'.  On the theory
    168179## that the space means something, we add a space to the output as
    169180## well.  hp depmode also adds that space, but also prefixes the VPATH
     
    204215    # lines with more than a fixed number of characters (4096 in
    205216    # IRIX 6.2 sed, 8192 in IRIX 6.5).  We also remove comment lines;
    206     # the IRIX cc adds comments like `#:fec' to the end of the
     217    # the IRIX cc adds comments like '#:fec' to the end of the
    207218    # dependency line.
    208     tr ' ' '
    209 ' < "$tmpdepfile" \
     219    tr ' ' "$nl" < "$tmpdepfile" \
    210220    | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' | \
    211     tr '
    212 ' ' ' >> "$depfile"
     221    tr "$nl" ' ' >> "$depfile"
    213222    echo >> "$depfile"
    214223
    215224    # The second pass generates a dummy entry for each header file.
    216     tr ' ' '
    217 ' < "$tmpdepfile" \
     225    tr ' ' "$nl" < "$tmpdepfile" \
    218226   | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \
    219227   >> "$depfile"
     
    227235  ;;
    228236
     237xlc)
     238  # This case exists only to let depend.m4 do its work.  It works by
     239  # looking at the text of this script.  This case will never be run,
     240  # since it is checked for above.
     241  exit 1
     242  ;;
     243
    229244aix)
    230245  # The C for AIX Compiler uses -M and outputs the dependencies
    231246  # in a .u file.  In older versions, this file always lives in the
    232   # current directory.  Also, the AIX compiler puts `$object:' at the
     247  # current directory.  Also, the AIX compiler puts '$object:' at the
    233248  # start of each line; $object doesn't have directory information.
    234249  # Version 6 uses the directory in both cases.
     
    260275  done
    261276  if test -f "$tmpdepfile"; then
    262     # Each line is of the form `foo.o: dependent.h'.
     277    # Each line is of the form 'foo.o: dependent.h'.
    263278    # Do two passes, one to just change these to
    264     # `$object: dependent.h' and one to simply `dependent.h:'.
     279    # '$object: dependent.h' and one to simply 'dependent.h:'.
    265280    sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile"
    266     # That's a tab and a space in the [].
    267     sed -e 's,^.*\.[a-z]*:[      ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile"
     281    sed -e 's,^.*\.[a-z]*:['"$tab"' ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile"
    268282  else
    269283    # The sourcefile does not contain any dependencies, so just
     
    276290
    277291icc)
    278   # Intel's C compiler understands `-MD -MF file'.  However on
    279   #    icc -MD -MF foo.d -c -o sub/foo.o sub/foo.c
     292  # Intel's C compiler anf tcc (Tiny C Compiler) understand '-MD -MF file'.
     293  # However on
     294  #    $CC -MD -MF foo.d -c -o sub/foo.o sub/foo.c
    280295  # ICC 7.0 will fill foo.d with something like
    281296  #    foo.o: sub/foo.c
    282297  #    foo.o: sub/foo.h
    283   # which is wrong.  We want:
     298  # which is wrong.  We want
    284299  #    sub/foo.o: sub/foo.c
    285300  #    sub/foo.o: sub/foo.h
     
    288303  # ICC 7.1 will output
    289304  #    foo.o: sub/foo.c sub/foo.h
    290   # and will wrap long lines using \ :
     305  # and will wrap long lines using '\':
    291306  #    foo.o: sub/foo.c ... \
    292307  #     sub/foo.h ... \
    293308  #     ...
    294 
     309  # tcc 0.9.26 (FIXME still under development at the moment of writing)
     310  # will emit a similar output, but also prepend the continuation lines
     311  # with horizontal tabulation characters.
    295312  "$@" -MD -MF "$tmpdepfile"
    296313  stat=$?
     
    301318  fi
    302319  rm -f "$depfile"
    303   # Each line is of the form `foo.o: dependent.h',
    304   # or `foo.o: dep1.h dep2.h \', or ` dep3.h dep4.h \'.
     320  # Each line is of the form 'foo.o: dependent.h',
     321  # or 'foo.o: dep1.h dep2.h \', or ' dep3.h dep4.h \'.
    305322  # Do two passes, one to just change these to
    306   # `$object: dependent.h' and one to simply `dependent.h:'.
    307   sed "s,^[^:]*:,$object :," < "$tmpdepfile" > "$depfile"
    308   # Some versions of the HPUX 10.20 sed can't process this invocation
    309   # correctly.  Breaking it into two sed invocations is a workaround.
    310   sed 's,^[^:]*: \(.*\)$,\1,;s/^\\$//;/^$/d;/:$/d' < "$tmpdepfile" |
    311     sed -e 's/$/ :/' >> "$depfile"
     323  # '$object: dependent.h' and one to simply 'dependent.h:'.
     324  sed -e "s/^[ $tab][ $tab]*/  /" -e "s,^[^:]*:,$object :," \
     325    < "$tmpdepfile" > "$depfile"
     326  sed '
     327    s/[ '"$tab"'][ '"$tab"']*/ /g
     328    s/^ *//
     329    s/ *\\*$//
     330    s/^[^:]*: *//
     331    /^$/d
     332    /:$/d
     333    s/$/ :/
     334  ' < "$tmpdepfile" >> "$depfile"
    312335  rm -f "$tmpdepfile"
    313336  ;;
     
    345368  if test -f "$tmpdepfile"; then
    346369    sed -e "s,^.*\.[a-z]*:,$object:," "$tmpdepfile" > "$depfile"
    347     # Add `dependent.h:' lines.
     370    # Add 'dependent.h:' lines.
    348371    sed -ne '2,${
    349372               s/^ *//
     
    360383tru64)
    361384   # The Tru64 compiler uses -MD to generate dependencies as a side
    362    # effect.  `cc -MD -o foo.o ...' puts the dependencies into `foo.o.d'.
     385   # effect.  'cc -MD -o foo.o ...' puts the dependencies into 'foo.o.d'.
    363386   # At least on Alpha/Redhat 6.1, Compaq CCC V6.2-504 seems to put
    364    # dependencies in `foo.d' instead, so we check for that too.
     387   # dependencies in 'foo.d' instead, so we check for that too.
    365388   # Subdirectories are respected.
    366389   dir=`echo "$object" | sed -e 's|/[^/]*$|/|'`
     
    408431   if test -f "$tmpdepfile"; then
    409432      sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile"
    410       # That's a tab and a space in the [].
    411       sed -e 's,^.*\.[a-z]*:[    ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile"
     433      sed -e 's,^.*\.[a-z]*:['"$tab"' ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile"
    412434   else
    413435      echo "#dummy" > "$depfile"
     
    444466}' | $cygpath_u | sort -u | sed -n '
    445467s/ /\\ /g
    446 s/\(.*\)/       \1 \\/p
     468s/\(.*\)/'"$tab"'\1 \\/p
    447469s/.\(.*\) \\/\1:/
    448470H
    449471$ {
    450   s/.*/ /
     472  s/.*/'"$tab"'/
    451473  G
    452474  p
     
    479501  fi
    480502
    481   # Remove `-o $object'.
     503  # Remove '-o $object'.
    482504  IFS=" "
    483505  for arg
     
    499521
    500522  test -z "$dashmflag" && dashmflag=-M
    501   # Require at least two characters before searching for `:'
     523  # Require at least two characters before searching for ':'
    502524  # in the target name.  This is to cope with DOS-style filenames:
    503   # a dependency such as `c:/foo/bar' could be seen as target `c' otherwise.
     525  # a dependency such as 'c:/foo/bar' could be seen as target 'c' otherwise.
    504526  "$@" $dashmflag |
    505     sed 's:^[  ]*[^: ][^:][^:]*\:[    ]*:'"$object"'\: :' > "$tmpdepfile"
     527    sed 's:^['"$tab"' ]*[^:'"$tab"' ][^:][^:]*\:['"$tab"' ]*:'"$object"'\: :' > "$tmpdepfile"
    506528  rm -f "$depfile"
    507529  cat < "$tmpdepfile" > "$depfile"
    508   tr ' ' '
    509 ' < "$tmpdepfile" | \
     530  tr ' ' "$nl" < "$tmpdepfile" | \
    510531## Some versions of the HPUX 10.20 sed can't process this invocation
    511532## correctly.  Breaking it into two sed invocations is a workaround.
     
    563584  # No need to regex-escape $object, excess matching of '.' is harmless.
    564585  sed "s|^.*\($object *:\)|\1|" "$tmpdepfile" > "$depfile"
    565   sed '1,2d' "$tmpdepfile" | tr ' ' '
    566 ' | \
     586  sed '1,2d' "$tmpdepfile" | tr ' ' "$nl" | \
    567587## Some versions of the HPUX 10.20 sed can't process this invocation
    568588## correctly.  Breaking it into two sed invocations is a workaround.
     
    584604  fi
    585605
    586   # Remove `-o $object'.
     606  # Remove '-o $object'.
    587607  IFS=" "
    588608  for arg
     
    653673  rm -f "$depfile"
    654674  echo "$object : \\" > "$depfile"
    655   sed < "$tmpdepfile" -n -e 's% %\\ %g' -e '/^\(.*\)$/ s::      \1 \\:p' >> "$depfile"
    656   echo "        " >> "$depfile"
     675  sed < "$tmpdepfile" -n -e 's% %\\ %g' -e '/^\(.*\)$/ s::'"$tab"'\1 \\:p' >> "$depfile"
     676  echo "$tab" >> "$depfile"
    657677  sed < "$tmpdepfile" -n -e 's% %\\ %g' -e '/^\(.*\)$/ s::\1\::p' >> "$depfile"
    658678  rm -f "$tmpdepfile"
  • testsuites/aclocal/prog-cxx.m4

    rffd9575 rf0a7f52  
    2525     [Inconsistency in compiler configuration:]
    2626     [Target C compiler and target C++ compiler]
    27      [must both either be cross compilers or native compilers]
    28      [Hint: If building a posix bsp: LD_LIBRARY_PATH?] )
     27     [must both either be cross compilers or native compilers])
    2928  fi
    3029else
  • testsuites/aclocal/project-root.m4

    rffd9575 rf0a7f52  
    1 dnl
    2 
    31AC_DEFUN([RTEMS_PROJECT_ROOT],
    42[dnl
  • testsuites/aclocal/rtems-top.m4

    rffd9575 rf0a7f52  
    55dnl RTEMS_TOP($1)
    66dnl
    7 dnl $1 .. relative path from this configure.in to the toplevel configure.in
     7dnl $1 .. relative path from this configure.ac to the toplevel configure.ac
    88dnl
    99AC_DEFUN([RTEMS_TOP],
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