Ignore:
Timestamp:
Apr 21, 2004, 4:01:48 PM (17 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
7dd6e8d
Parents:
6128a4a
Message:

Remove duplicate white lines.

Location:
c/src/lib/libbsp/i386/i386ex/start
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/i386/i386ex/start/80386ex.h

    r6128a4a rf05b2ac  
    4848#define OCW3SDOS          0x00A0
    4949
    50 
    5150/* CONFIGURATION Registers */
    5251#define DMACFG    0xF830
  • c/src/lib/libbsp/i386/i386ex/start/start.S

    r6128a4a rf05b2ac  
    2929 *  $Id$
    3030
    31 
    3231changes:
    3332    SetExRegByte(ICW3S  , 0x02 ) # MUST be 0x02 according to intel
     
    3635 */
    3736
    38 
    3937#include <rtems/asm.h>
    4038#include "macros.inc"
    4139#include "80386ex.inc"
    42 
    4340
    4441/*
     
    7673
    7774END_DATA
    78 
    7975
    8076/* This section is the section that is used by the interrupt
     
    131127        orb     $0x02   , al   # Bit 1 Fast A20 = 0 (always 0) else enabled.
    132128        outb    al      , dx
    133 
    134129
    135130SYM(Watchdog):
     
    285280        SetExRegByte(TMR0   , 0x00 ) # sfa
    286281
    287 
    288282        SetExRegByte(TMRCON , 0x70 ) # mode 0 disables on Gate= Vcc
    289283        SetExRegByte(TMR1   , 0x00 ) # sfa
     
    343337        SetExRegByte(INTCFG , 0x00 )
    344338
    345 
    346339SYM(SetCS4):
    347340        SetExRegWord(CS4ADL , 0x702)         #Configure chip select 4
     
    383376        lgdt SYM(GDTR) #  location of GDT
    384377#endif
    385 
    386378
    387379SYM(SetUCS):
     
    473465        stosl                           #   clear a long in the bss
    474466
    475 
    476467/*
    477468 *  Transfer control to User's Board Support Package
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