Changeset ef04443 in rtems


Ignore:
Timestamp:
Aug 4, 2017, 11:51:42 AM (2 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
ffe7c0e
Parents:
30be024a
git-author:
Sebastian Huber <sebastian.huber@…> (08/04/17 11:51:42)
git-committer:
Sebastian Huber <sebastian.huber@…> (08/04/17 12:22:32)
Message:

bsps/arm: Add ARMv7-AR Generic Timer support

Update #3090.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/shared/include/arm-cp15.h

    r30be024a ref04443  
    19141914}
    19151915
     1916/* CNTFRQ */
     1917ARM_CP15_TEXT_SECTION static inline uint32_t
     1918arm_cp15_get_counter_frequency(void)
     1919{
     1920  ARM_SWITCH_REGISTERS;
     1921  uint32_t val;
     1922
     1923  __asm__ volatile (
     1924    ARM_SWITCH_TO_ARM
     1925    "mrc p15, 0, %[val], c14, c0, 0\n"
     1926    ARM_SWITCH_BACK
     1927    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1928  );
     1929
     1930  return val;
     1931}
     1932
     1933/* CNTFRQ */
     1934ARM_CP15_TEXT_SECTION static inline void
     1935arm_cp15_set_counter_frequency(uint32_t val)
     1936{
     1937  ARM_SWITCH_REGISTERS;
     1938
     1939  __asm__ volatile (
     1940    ARM_SWITCH_TO_ARM
     1941    "mcr p15, 0, %[val], c14, c0, 0\n"
     1942    ARM_SWITCH_BACK
     1943    : ARM_SWITCH_OUTPUT
     1944    : [val] "r" (val)
     1945  );
     1946}
     1947
     1948/* CNTPCT */
     1949ARM_CP15_TEXT_SECTION static inline uint64_t
     1950arm_cp15_get_counter_physical_count(void)
     1951{
     1952  ARM_SWITCH_REGISTERS;
     1953  uint64_t val;
     1954
     1955  __asm__ volatile (
     1956    ARM_SWITCH_TO_ARM
     1957    "mrrc p15, 0, %Q[val], %R[val], c14\n"
     1958    ARM_SWITCH_BACK
     1959    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1960  );
     1961
     1962  return val;
     1963}
     1964
     1965/* CNTKCTL */
     1966ARM_CP15_TEXT_SECTION static inline uint32_t
     1967arm_cp15_get_counter_non_secure_pl1_control(void)
     1968{
     1969  ARM_SWITCH_REGISTERS;
     1970  uint32_t val;
     1971
     1972  __asm__ volatile (
     1973    ARM_SWITCH_TO_ARM
     1974    "mrc p15, 0, %[val], c14, c1, 0\n"
     1975    ARM_SWITCH_BACK
     1976    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1977  );
     1978
     1979  return val;
     1980}
     1981
     1982/* CNTKCTL */
     1983ARM_CP15_TEXT_SECTION static inline void
     1984arm_cp15_set_counter_non_secure_pl1_control(uint32_t val)
     1985{
     1986  ARM_SWITCH_REGISTERS;
     1987
     1988  __asm__ volatile (
     1989    ARM_SWITCH_TO_ARM
     1990    "mcr p15, 0, %[val], c14, c1, 0\n"
     1991    ARM_SWITCH_BACK
     1992    : ARM_SWITCH_OUTPUT
     1993    : [val] "r" (val)
     1994  );
     1995}
     1996
     1997/* CNTP_TVAL */
     1998ARM_CP15_TEXT_SECTION static inline uint32_t
     1999arm_cp15_get_counter_pl1_physical_timer_value(void)
     2000{
     2001  ARM_SWITCH_REGISTERS;
     2002  uint32_t val;
     2003
     2004  __asm__ volatile (
     2005    ARM_SWITCH_TO_ARM
     2006    "mrc p15, 0, %[val], c14, c2, 0\n"
     2007    ARM_SWITCH_BACK
     2008    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2009  );
     2010
     2011  return val;
     2012}
     2013
     2014/* CNTP_TVAL */
     2015ARM_CP15_TEXT_SECTION static inline void
     2016arm_cp15_set_counter_pl1_physical_timer_value(uint32_t val)
     2017{
     2018  ARM_SWITCH_REGISTERS;
     2019
     2020  __asm__ volatile (
     2021    ARM_SWITCH_TO_ARM
     2022    "mcr p15, 0, %[val], c14, c2, 0\n"
     2023    ARM_SWITCH_BACK
     2024    : ARM_SWITCH_OUTPUT
     2025    : [val] "r" (val)
     2026  );
     2027}
     2028
     2029/* CNTP_CTL */
     2030ARM_CP15_TEXT_SECTION static inline uint32_t
     2031arm_cp15_get_counter_pl1_physical_timer_control(void)
     2032{
     2033  ARM_SWITCH_REGISTERS;
     2034  uint32_t val;
     2035
     2036  __asm__ volatile (
     2037    ARM_SWITCH_TO_ARM
     2038    "mrc p15, 0, %[val], c14, c2, 1\n"
     2039    ARM_SWITCH_BACK
     2040    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2041  );
     2042
     2043  return val;
     2044}
     2045
     2046/* CNTP_CTL */
     2047ARM_CP15_TEXT_SECTION static inline void
     2048arm_cp15_set_counter_pl1_physical_timer_control(uint32_t val)
     2049{
     2050  ARM_SWITCH_REGISTERS;
     2051
     2052  __asm__ volatile (
     2053    ARM_SWITCH_TO_ARM
     2054    "mcr p15, 0, %[val], c14, c2, 1\n"
     2055    ARM_SWITCH_BACK
     2056    : ARM_SWITCH_OUTPUT
     2057    : [val] "r" (val)
     2058  );
     2059}
     2060
     2061/* CNTV_TVAL */
     2062ARM_CP15_TEXT_SECTION static inline uint32_t
     2063arm_cp15_get_counter_pl1_virtual_timer_value(void)
     2064{
     2065  ARM_SWITCH_REGISTERS;
     2066  uint32_t val;
     2067
     2068  __asm__ volatile (
     2069    ARM_SWITCH_TO_ARM
     2070    "mrc p15, 0, %[val], c14, c2, 0\n"
     2071    ARM_SWITCH_BACK
     2072    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2073  );
     2074
     2075  return val;
     2076}
     2077
     2078/* CNTV_TVAL */
     2079ARM_CP15_TEXT_SECTION static inline void
     2080arm_cp15_set_counter_pl1_virtual_timer_value(uint32_t val)
     2081{
     2082  ARM_SWITCH_REGISTERS;
     2083
     2084  __asm__ volatile (
     2085    ARM_SWITCH_TO_ARM
     2086    "mcr p15, 0, %[val], c14, c3, 0\n"
     2087    ARM_SWITCH_BACK
     2088    : ARM_SWITCH_OUTPUT
     2089    : [val] "r" (val)
     2090  );
     2091}
     2092
     2093/* CNTV_CTL */
     2094ARM_CP15_TEXT_SECTION static inline uint32_t
     2095arm_cp15_get_counter_pl1_virtual_timer_control(void)
     2096{
     2097  ARM_SWITCH_REGISTERS;
     2098  uint32_t val;
     2099
     2100  __asm__ volatile (
     2101    ARM_SWITCH_TO_ARM
     2102    "mrc p15, 0, %[val], c14, c3, 1\n"
     2103    ARM_SWITCH_BACK
     2104    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2105  );
     2106
     2107  return val;
     2108}
     2109
     2110/* CNTV_CTL */
     2111ARM_CP15_TEXT_SECTION static inline void
     2112arm_cp15_set_counter_pl1_virtual_timer_control(uint32_t val)
     2113{
     2114  ARM_SWITCH_REGISTERS;
     2115
     2116  __asm__ volatile (
     2117    ARM_SWITCH_TO_ARM
     2118    "mcr p15, 0, %[val], c14, c3, 1\n"
     2119    ARM_SWITCH_BACK
     2120    : ARM_SWITCH_OUTPUT
     2121    : [val] "r" (val)
     2122  );
     2123}
     2124
     2125/* CNTVCT */
     2126ARM_CP15_TEXT_SECTION static inline uint64_t
     2127arm_cp15_get_counter_virtual_count(void)
     2128{
     2129  ARM_SWITCH_REGISTERS;
     2130  uint64_t val;
     2131
     2132  __asm__ volatile (
     2133    ARM_SWITCH_TO_ARM
     2134    "mrrc p15, 1, %Q[val], %R[val], c14\n"
     2135    ARM_SWITCH_BACK
     2136    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2137  );
     2138
     2139  return val;
     2140}
     2141
     2142/* CNTP_CVAL */
     2143ARM_CP15_TEXT_SECTION static inline uint64_t
     2144arm_cp15_get_counter_pl1_physical_compare_value(void)
     2145{
     2146  ARM_SWITCH_REGISTERS;
     2147  uint64_t val;
     2148
     2149  __asm__ volatile (
     2150    ARM_SWITCH_TO_ARM
     2151    "mrrc p15, 2, %Q[val], %R[val], c14\n"
     2152    ARM_SWITCH_BACK
     2153    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2154  );
     2155
     2156  return val;
     2157}
     2158
     2159/* CNTP_CVAL */
     2160ARM_CP15_TEXT_SECTION static inline void
     2161arm_cp15_set_counter_pl1_physical_compare_value(uint64_t val)
     2162{
     2163  ARM_SWITCH_REGISTERS;
     2164
     2165  __asm__ volatile (
     2166    ARM_SWITCH_TO_ARM
     2167    "mcrr p15, 2, %Q[val], %R[val], c14\n"
     2168    ARM_SWITCH_BACK
     2169    : ARM_SWITCH_OUTPUT
     2170    : [val] "r" (val)
     2171  );
     2172}
     2173
     2174/* CNTV_CVAL */
     2175ARM_CP15_TEXT_SECTION static inline uint64_t
     2176arm_cp15_get_counter_pl1_virtual_compare_value(void)
     2177{
     2178  ARM_SWITCH_REGISTERS;
     2179  uint64_t val;
     2180
     2181  __asm__ volatile (
     2182    ARM_SWITCH_TO_ARM
     2183    "mrrc p15, 3, %Q[val], %R[val], c14\n"
     2184    ARM_SWITCH_BACK
     2185    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2186  );
     2187
     2188  return val;
     2189}
     2190
     2191/* CNTV_CVAL */
     2192ARM_CP15_TEXT_SECTION static inline void
     2193arm_cp15_set_counter_pl1_virtual_compare_value(uint64_t val)
     2194{
     2195  ARM_SWITCH_REGISTERS;
     2196
     2197  __asm__ volatile (
     2198    ARM_SWITCH_TO_ARM
     2199    "mcrr p15, 3, %Q[val], %R[val], c14\n"
     2200    ARM_SWITCH_BACK
     2201    : ARM_SWITCH_OUTPUT
     2202    : [val] "r" (val)
     2203  );
     2204}
     2205
     2206/* CNTVOFF */
     2207ARM_CP15_TEXT_SECTION static inline uint64_t
     2208arm_cp15_get_counter_virtual_offset(void)
     2209{
     2210  ARM_SWITCH_REGISTERS;
     2211  uint64_t val;
     2212
     2213  __asm__ volatile (
     2214    ARM_SWITCH_TO_ARM
     2215    "mrrc p15, 4, %Q[val], %R[val], c14\n"
     2216    ARM_SWITCH_BACK
     2217    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     2218  );
     2219
     2220  return val;
     2221}
     2222
     2223/* CNTVOFF */
     2224ARM_CP15_TEXT_SECTION static inline void
     2225arm_cp15_set_counter_virtual_offset(uint64_t val)
     2226{
     2227  ARM_SWITCH_REGISTERS;
     2228
     2229  __asm__ volatile (
     2230    ARM_SWITCH_TO_ARM
     2231    "mcrr p15, 4, %Q[val], %R[val], c14\n"
     2232    ARM_SWITCH_BACK
     2233    : ARM_SWITCH_OUTPUT
     2234    : [val] "r" (val)
     2235  );
     2236}
     2237
    19162238/**
    19172239 * @brief Sets the @a section_flags for the address range [@a begin, @a end).
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