Changeset ecd4cd4 in rtems


Ignore:
Timestamp:
Apr 24, 2017, 12:42:34 AM (2 years ago)
Author:
Joel Sherrill <joel@…>
Branches:
master
Children:
bd4072b
Parents:
0a84172b
git-author:
Joel Sherrill <joel@…> (04/24/17 00:42:34)
git-committer:
Joel Sherrill <joel@…> (04/24/17 17:00:54)
Message:

uC5282/startup/bspstart.c: Fix printf() format warnings

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c

    r0a84172b recd4cd4  
    1919#include <errno.h>
    2020#include <stdio.h>
     21#include <inttypes.h>
    2122#include <mcf5282/mcf5282.h>
    2223
     
    126127         || ((char *)(nfp[1]) >= RamSize))
    127128            break;
    128         printk("FP:%x -> %x    PC:%x\n", fp, nfp, nfp[1]);
     129        printk("FP:%p -> %p    PC:%x\n", fp, nfp, nfp[1]);
    129130        fp = nfp;
    130131    }
     
    260261                mfd = MCF5282_CLOCK_SYNCR;
    261262        }
    262         printk("Assuming %uHz PLL ref. clock\n", BSP_pll_ref_clock);
     263        printk("Assuming %" PRIu32 "Hz PLL ref. clock\n", BSP_pll_ref_clock);
    263264        rfd = (mfd >>  8) & 7;
    264265        mfd = (mfd >> 12) & 7;
     
    274275        mfd = 2 * (mfd + 2);
    275276        /* sysclk = pll_ref * 2 * (MFD + 2) / 2^(rfd) */
    276         printk("PLL multiplier: %u, output divisor: %u\n", mfd, rfd);
     277        printk(
     278          "PLL multiplier: %" PRIu32", output divisor: %" PRIu32 "\n",
     279          mfd,
     280          rfd
     281        );
    277282        clk_speed = (BSP_pll_ref_clock * mfd) >> rfd;
    278283  }
     
    283288  } else {
    284289        BSP_sys_clk_speed = clk_speed;
    285         printk("System clock speed: %uHz\n", bsp_get_CPU_clock_speed());
     290        printk(
     291          "System clock speed: %" PRIu32 "Hz\n", bsp_get_CPU_clock_speed());
    286292  }
    287293}
     
    472478      rtems_interrupt_level level;
    473479      rtems_interrupt_disable(level);
    474       printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v & 0x3f);
     480      printk(
     481        "\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%lx) -- "
     482        "DISABLING ALL FPGA INTERRUPTS.\n",
     483        v & 0x3f
     484      );
    475485      MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
    476486      rtems_interrupt_enable(level);
     
    484494      rtems_vector_number nv;
    485495      rtems_interrupt_disable(level);
    486       printk("\nSPURIOUS FPGA INTERRUPT (0x%x).\n", v & 0x3f);
     496      printk("\nSPURIOUS FPGA INTERRUPT (0x%lx).\n", v & 0x3f);
    487497      if ((((nv = FPGA_IRQ_INFO) & 0x80) != 0)
    488498          && ((nv & 0x3f) == (v & 0x3f))) {
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