Index: c/src/lib/libbsp/arm/altera-cyclone-v/README
===================================================================
--- c/src/lib/libbsp/arm/altera-cyclone-v/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,44 +1,0 @@
-Overview
---------
-Evaluation board for this BSP: 
-- Cyclone V SoC FPGA Development Kit
-- DK-DEV-5CSXC6N/ES-0L
-
-RTC
----
-The evaluation board contains a DS1339C RTC connected to I2C0. To use it you
-have to set the following options:
-
-  #define CONFIGURE_APPLICATION_NEEDS_RTC_DRIVER
-  #define CONFIGURE_BSP_PREREQUISITE_DRIVERS I2C_DRIVER_TABLE_ENTRY
-
-Additional there has to be one free file descriptor to access the i2c. Set the
-CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS accordingly.
-
-Network
--------
-The default PHY address can be overwritten by the application. To do this, the
-drv_ctrl pointer of the rtems_bsdnet_ifconfig structure should point to a
-dwmac_ifconfig_drv_ctrl object with the appropriate settings before the
-rtems_bsdnet_initialize_network() is called. E.g.:
-
-  #include <libchip/dwmac.h>
-  #include <bsp.h>
-
-  static dwmac_ifconfig_drv_ctrl drv_ctrl = {
-    .phy_addr = 1
-  };
-
-  ...
-
-  static struct rtems_bsdnet_ifconfig some_ifconfig = {
-    .name = RTEMS_BSP_NETWORK_DRIVER_NAME,
-    .attach = RTEMS_BSP_NETWORK_DRIVER_ATTACH,
-    .drv_ctrl = &drv_ctrl
-  };
-
-  ...
-
-  rtems_bsdnet_initialize_network();
-
-If drv_ctrl is the NULL pointer, default values will be used instead.
Index: c/src/lib/libbsp/arm/atsam/README
===================================================================
--- c/src/lib/libbsp/arm/atsam/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,92 +1,0 @@
-Board support package for the Atmel SAM V71/V70/E70/S70 chip platform.
-
-The BSP is customized to a particular board/chip variant by means of configure
-command line options.
-
-Use --enable-chip=XYZ to select the chip variant where XYZ is one of same70j19,
-same70j20, same70j21, same70n19, same70n20, same70n21, same70q19, same70q20,
-same70q21, sams70j19, sams70j20, sams70j21, sams70n19, sams70n20, sams70n21,
-sams70q19, sams70q20, sams70q21, samv71j19, samv71j20, samv71j21, samv71n19,
-samv71n20, samv71n21, samv71q19, samv71q20 and samv71q21.  By default the BSP
-uses the ATSAMV71Q21 chip.  Not all variants are tested.
-
-Use --enable-sdram=XYZ to select the SDRAM variant where XYZ is one of
-is42s16100e-7bli and is42s16320f-7bl. Not all variants are tested with all
-controller and speed combinations.
-
-Use BOARD_MAINOSC=XYZ to set the main oscillator frequency in Hz (default
-12MHz).
-
-Use ATSAM_MCK=XYZ to set the MCK frequency that should be used. The default case
-(123000000) enables operation of an external SDRAM on the SAMv71 Explained
-evaluation kit. Some other configurations (e.g. 150MHz) would be too fast on
-that board.
-
-Your application can also overwrite the clock settings.  If you have a
-bootloader with one setting in your internal flash and an application with
-another setting in your external SDRAM, you should also use the
-ATSAM_CHANGE_CLOCK_FROM_SRAM=1 option. To overwrite the clock settings, define
-the following structures in your application:
-
---------
-const struct atsam_clock_config atsam_clock_config = {
-  .pllar_init = my_custom_pllar_value,
-  .mckr_init = my_custom_mckr_value,
-  .mck_freq = my_resulting_mck_frequency
-};
-
-const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
-  .sdramc_tr = my_custom_sdramc_tr_value,
-  .sdramc_cr = my_custom_sdramc_cr_value,
-  .sdramc_mdr = my_custom_sdramc_mdr_value,
-  .sdramc_cfr1 = my_custom_sdramc_cfr1_value
-};
---------
-
-Use ATSAM_SLOWCLOCK_USE_XTAL=0 to disable the usage of the external 32kHz
-oscillator for the slow clock. This is useful for example for the SAM E70
-Xplained kit.
-
-Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default
-115200).
-
-Use ATSAM_CONSOLE_DEVICE_TYPE=XYZ to set the device type for /dev/console, use
-0 for USART and 1 for UART (default USART).
-
-Use ATSAM_CONSOLE_DEVICE_INDEX=XYZ to set the device index for /dev/console
-(default 1, e.g. USART1).
-
-Use ATSAM_CONSOLE_USE_INTERRUPTS=XYZ to set the use interrupt driven mode for
-console devices (used by default).
-
-Use ATSAM_MEMORY_TCM_SIZE=XYZ to set the size of tightly coupled memories (TCM)
-in bytes (default 0x00000000).
-
-Use ATSAM_MEMORY_INTFLASH_SIZE=XYZ to set the size of internal flash in bytes
-(default is derived from chip variant).
-
-Use ATSAM_MEMORY_INTSRAM_SIZE=XYZ to set the size of internal SRAM in bytes
-(default is derived from chip variant).
-
-Use ATSAM_MEMORY_SDRAM_SIZE=XYZ to set the size of external SDRAM in bytes
-(default 0x00200000).
-
-Use ATSAM_MEMORY_QSPIFLASH_SIZE=XYZ to set the size of QSPI flash in bytes
-(default 0x00200000).
-
-The pins may be configured by the application at link-time.  See
-<bsp/pin-config.h>.
-
-The clock driver uses the ARMv7-M Systick.
-
-The console driver supports the USART and UART devices.
-
-The default linker command file places the code into the internal flash.  Use
-"LDFLAGS += -qnolinkcmds -T linkcmds.sdram" to place the code into the external
-SDRAM.  Use "LDFLAGS += -qnolinkcmds -T linkcmds.intsram" to place the code
-into the internal SRAM.
-
-The fast text section uses the ITCM.  The fast data section uses the DTCM.
-
-Data and instruction cache are enabled during system start.  The RTEMS cache
-manager is supported with exception of the freeze functions.
Index: c/src/lib/libbsp/arm/beagle/README
===================================================================
--- c/src/lib/libbsp/arm/beagle/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,118 +1,0 @@
-BSP for beagleboard xm, beaglebone (original aka white), and beaglebone black.
-
-original beagleboard isn't tested.
-
-wiki: http://www.rtems.org/wiki/index.php/Beagleboard
-
-1.   *** CONFIGURING ************
-
-bsp-specific build options in the environment at build time:
-CONSOLE_POLLED=1 use polled i/o for console, required to run testsuite
-CONSOLE_BAUD=... override default console baud rate
-
-BSPs recognized are:
-beagleboardorig  original beagleboard
-beagleboardxm    beagleboard xm
-beaglebonewhite  original beaglebone
-beagleboneblack  beaglebone black
-
-Currently the only distinction in the BSP are between the beagleboards and
-the beaglebones, but the 4 names are specified in case hardware-specific
-distinctions are made in the future, so this can be done without changing the
-usage.
-
-
-2.   *** BUILDING    ************
-
-To build BSPs for the beaglebone white and beagleboard xm, starting from
-a directory in which you have this source tree in rtems-src:
-
-$ mkdir b-beagle
-$ cd b-beagle
-$ ../rtems-src/configure --target=arm-rtems4.11 --enable-rtemsbsp="beaglebonewhite beagleboardxm"
-$ make all
-
-This should give you .exes somewhere.
-
-Then you need 'mkimage' to transform a .exe file to a u-boot image
-file. first make a flat binary:
-
-$ arm-rtems4.11-objcopy $exe -O binary $exe.bin
-$ gzip -9 $exe.bin
-$ mkimage -A arm -O rtems -T kernel -a 0x80000000 -e 0x80000000 -n RTEMS -d $exe.bin.gz rtems-app.img
-
-All beagles have memory starting at 0x80000000 so the load & run syntax is the same.
-
-3.   *** BOOTING     ************
-
-Then, boot the beaglebone with u-boot on an SD card and load rtems-app.img
-from u-boot. Interrupt the u-boot boot to get a prompt.
-
-Set up a tftp server and a network connection for netbooting. And to
-copy rtems-app.img to the tftp dir. Otherwise copy the .img to the FAT
-partition on the SD card and make uboot load & run that.
-
-4.   *** BEAGLEBONES ************
-
-(tested on both beaglebones)
-
-Beaglebone original (white) or beaglebone black netbooting:
-
-uboot# setenv ipaddr 192.168.12.20
-uboot# setenv serverip 192.168.12.10
-uboot# echo starting from TFTP
-uboot# tftp 0x80800000 rtems-app.img
-uboot# dcache off ; icache off
-uboot# bootm 0x80800000
-
-Beaglebone original (white) or beaglebone black from a FAT partition:
-
-uboot# fatload mmc :1 0x80800000 ticker.img
-uboot# dcache off ; icache off
-uboot# bootm 0x80800000
-
-4.   *** BEAGLEBOARD ************
-
-(tested on xm)
-
-For the beagleboard the necessary commands are a bit different because
-of the ethernet over usb:
-
-uboot# setenv serverip 192.168.12.10
-uboot# setenv ipaddr 192.168.12.62
-uboot# setenv usbnet_devaddr e8:03:9a:24:f9:10
-uboot# setenv usbethaddr e8:03:9a:24:f9:11
-uboot# usb start
-uboot# echo starting from TFTP
-uboot# tftp 0x80800000 rtems-app.img
-uboot# dcache off ; icache off
-uboot# bootm 0x80800000
-
-4.   *** SD CARD ****************
-
-There is a script here that automatically writes an SD card for any of
-the beagle targets.
-
-Let's write one for the Beaglebone Black. Assuming your source tree is
-at $HOME/development/rtems/rtems-src and your bsp is built and linked
-with examples and installed at $HOME/development/rtems/4.11.
-
-    % cd $HOME/development/rtems/rtems-src/c/src/lib/libbsp/arm/beagle/simscripts
-    % sh sdcard.sh $HOME/development/rtems/4.11 $HOME/development/rtems/b-beagle/arm-rtems4.11/c/beagleboneblack/testsuites/samples/hello/hello.exe
-
-The script should give you a whole bunch of output, ending in:
-
-    Result is in bone_hello.exe-sdcard.img.
-
-There you go. dd that to an SD card and boot!
-
-The script needs to know whether it's for a Beagleboard xM or one of the
-Beaglebones. This is to know which uboot to use. It will detect this
-from the path the executable is in (in the above example, it contains
-'beagleboneblack'), so you have to specify the full path.
-
-
-Good luck & enjoy!
-
-Ben Gras
-beng@shrike-systems.com
Index: c/src/lib/libbsp/arm/beagle/README.JTAG
===================================================================
--- c/src/lib/libbsp/arm/beagle/README.JTAG	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,20 +1,0 @@
-To run RTEMS from scratch (without any other bootcode) on the beagles,
-you can comfortably load the executables over JTAG using gdb. This is
-necessarily target-specific however.
-
-1. BBXM
-
-  - For access to JTAG using openocd, see simscripts/bbxm.cfg.
-  - openocd then offers access to gdb using simscripts/gdbinit.bbxm.
-  - start openocd using bbxm.cfg
-  - copy your .exe to a new dir and that gdbinit file as .gdbinit in the same dir
-  - go there and start gdb:
-    $ arm-rtems4.11-gdb hello.exe
-  - gdb will invoke the BBXM hardware initialization in the bbxm.cfg
-    and load the ELF over JTAG. type 'c' (for continue) to run it.
-  - breakpoints, C statement and single-instruction stepping work.
-
-2. beaglebone white
-
-This has been tested with openocd and works but not in as much detail as for
-the BBXM yet (i.e. loading an executable from scratch).
Index: c/src/lib/libbsp/arm/beagle/TESTING
===================================================================
--- c/src/lib/libbsp/arm/beagle/TESTING	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,20 +1,0 @@
-To build and run the tests for this BSP, use the RTEMS tester.
-The necessary software can be built with the RTEMS source builder.
-
-To build the BSP for testing:
-	- set CONSOLE_POLLED=1 in the configure environment, some tests
-	  assume console i/o is polled
-	- add --enable-tests to the configure line
-
-1. Qemu
-
-Linaro Qemu can emulate the beagleboard xm and so run all regression
-tests in software. Build the bbxm.bset from the RTEMS source builder and
-you will get qemu linaro that can run them. There is a beagleboardxm_qemu
-bsp in the RTEMS tester to invoke it with every test.
-
-2. bbxm hardware
-
-This requires JTAG, see README.JTAG. Use the beagleboardxm bsp in the
-RTEMS tester. It starts gdb to connect to openocd to reset the target
-and load the RTEMS executable for each test iteration.
Index: c/src/lib/libbsp/arm/beagle/pwm/README
===================================================================
--- c/src/lib/libbsp/arm/beagle/pwm/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,197 +1,0 @@
-Pulse Width Modulation subsystem includes EPWM, ECAP , EQEP. There are
-different instances available for each one. For PWM there are three
-different individual EPWM module 0 , 1 and 2. So wherever pwmss word is
-used that affects whole PWM sub system such as EPWM, ECAP and EQEP. This code
-has only implementation Non high resolution PWM module. APIs for high
-resolution PWM has been yet to develop.
-
-For Each EPWM instance, has two PWM channels, e.g. EPWM0 has two channel
-EPWM0A and EPWM0B. If you configure two PWM outputs(e.g. EPWM0A , EPWM0B)
-in the same device, then they *must* be configured with the same frequency.
-Changing frequency on one channel (e.g EPWMxA) will automatically change
-frequency on another channel(e.g. EPWMxB). However, it is possible to set
-different pulse-width/duty cycle to different channel at a time. So always
-set the frequency first and then pulse-width/duty cycle.
-
-For more you can refer :
-http://www.ofitselfso.com/BBBCSIO/Source/PWMPortEnum.cs.html
- 
-Pulse Width Modulation uses the system frequency of Beagle Bone Black.
-
-System frequency = SYSCLKOUT, that is, CPU clock. TBCLK = SYSCLKOUT(By Default)
-SYCLKOUT = 100 MHz
-
-Please visit following link to check why SYSCLKDIV = 100MHz:
-https://groups.google.com/forum/#!topic/beagleboard/Ed2J9Txe_E4
-(Refer Technical Reference Manual (TRM) Table 15-41 as well)
-
-To generate different frequencies with the help of PWM module , SYSCLKOUT
-need to be scaled down, which will act as TBCLK and TBCLK will be base clock
-for the pwm subsystem.
-
-TBCLK = SYSCLKOUT/(HSPCLKDIV * CLKDIV)
-
-                 |----------------| 
-                 |     clock      | 
- SYSCLKOUT--->   |                |---> TBCLK 
-                 |   prescale     |
-                 |----------------|         
-                   ^           ^
-                   |           |
- TBCTL[CLKDIV]-----            ------TBCTL[HSPCLKDIV]
-
-
-CLKDIV and HSPCLKDIV bits are part of the TBCTL register (Refer TRM).
-CLKDIV - These bits determine part of the time-base clock prescale value.
-Please use the following values of CLKDIV to scale down sysclk respectively.
-0h (R/W) = /1 
-1h (R/W) = /2
-2h (R/W) = /4
-3h (R/W) = /8
-4h (R/W) = /16
-5h (R/W) = /32
-6h (R/W) = /64
-7h (R/W) = /128
-
-These bits determine part of the time-base clock prescale value.
-Please use following value of HSPCLKDIV to scale down sysclk respectively
-0h (R/W) = /1
-1h (R/W) = /2
-2h (R/W) = /4
-3h (R/W) = /6
-4h (R/W) = /8
-5h (R/W) = /10
-6h (R/W) = /12
-7h (R/W) = /14
-
-For example, if you set CLKDIV = 3h and HSPCLKDIV= 2h Then
-SYSCLKOUT will be divided by (1/8)(1/4). It means SYSCLKOUT/32
-
-How to generate frequency ?
-
-freq = 1/Period
-
-TBPRD register is responsible to generate the frequency. These bits determine
-the period of the time-base counter.
-
-By default TBCLK = SYSCLKOUT = 100 MHz
-
-Here by default period is 1/100MHz = 10 nsec
-
-Following example shows value to be loaded into TBPRD
- 
-e.g. TBPRD = 1 = 1 count
-  count x Period = 1 x 1ns = 1ns
-  freq = 1/Period = 1 / 1ns = 100 MHz
-
-For duty cycle CMPA and CMPB are the responsible registers.
-
-To generate single with 50% Duty cycle & 100MHz freq.
- 
- CMPA = count x Duty Cycle
-       = TBPRD x Duty Cycle
-       = 1 x 50/100
-       = 0.2
-
-The value in the active CMPA register is continuously compared to
-the time-base counter (TBCNT). When the values are equal, the
-counter-compare module generates a "time-base counter equal to
-counter compare A" event. This event is sent to the action-qualifier
-where it is qualified and converted it into one or more actions.
-These actions can be applied to either the EPWMxA or the
-EPWMxB output depending on the configuration of the AQCTLA and
-AQCTLB registers.
- 
-List of pins for that can be used for different PWM instance :
-
-  ------------------------------------------------ 
-  |  EPWM2        | EPWM1         | EPWM0        |
-  ------------------------------------------------
-  |  BBB_P8_13_2B | BBB_P8_34_1B  | BBB_P9_21_0B |  
-  |  BBB_P8_19_2A | BBB_P8_36_1A  | BBB_P9_22_0A |
-  |  BBB_P8_45_2A | BBB_P9_14_1A  | BBB_P9_29_0B |
-  |  BBB_P8_46_2B | BBB_P9_16_1B  | BBB_P9_31_0A |
-  ------------------------------------------------
-BBB_P8_13_2B represents P8 Header , pin number 13 , 2nd PWM instance and B channel. 
-
-Following sample program can be used to generate 7 Hz frequency.
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <rtems/test.h>
-#include <bsp.h>
-#include <bsp/gpio.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <bsp/bbb-pwm.h>
-
-const char rtems_test_name[] = "Testing PWM driver";
-rtems_printer rtems_test_printer;
-
-static void inline delay_sec(int sec)
-{
-  rtems_task_wake_after(sec*rtems_clock_get_ticks_per_second());
-}  
-
-rtems_task Init(rtems_task_argument argument);
-
-rtems_task Init(
-	rtems_task_argument ignored
-)
-{
-  rtems_test_begin(); 
-  printf("Starting PWM Testing");
-  
-  /*Initialize GPIO pins in BBB*/
-  rtems_gpio_initialize();
-  
-  /* Set P9 Header , 21 Pin number , PWM B channel and 0 PWM instance to generate frequency*/ 
-  beagle_epwm_pinmux_setup(BBB_P9_21_0B,BBB_PWMSS0);
-  
-/** Initialize clock for PWM sub system
-  * Turn on time base clock for PWM o instance
-  */
-  beagle_pwm_init(BBB_PWMSS0);
-
-  float PWM_HZ = 7.0f ;           /* 7 Hz */
-  float duty_A = 20.0f ;          /* 20% Duty cycle for PWM 0_A output */
-  const float duty_B = 50.0f ;    /* 50% Duty cycle for PWM 0_B output*/
-  
-  /*Note: Always check whether pwmss clocks are enabled or not before configuring PWM*/
-  bool is_running = beagle_pwmss_is_running(BBB_PWMSS2);
-  
-  if(is_running) {
-  
-  /*To analyse the two different duty cycle Output should be observed at P8_45 and P8_46 pin number */
-  beagle_pwm_configure(BBB_PWMSS0, PWM_HZ ,duty_A , duty_B);
-  printf("PWM  enable for 10s ....\n");
- 
-  /*Set Up counter and enable pwm module */
-  beagle_pwm_enable(BBB_PWMSS0);
-  delay_sec(10);
-  
-  /*freeze the counter and disable pwm module*/
-  beagle_epwm_disable(BBB_PWMSS0);
-  }
-}
-
-/* NOTICE: the clock driver is enabled */
-#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
-#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
-
-#define CONFIGURE_MAXIMUM_TASKS            1
-#define CONFIGURE_USE_DEVFS_AS_BASE_FILESYSTEM
-
-#define CONFIGURE_MAXIMUM_SEMAPHORES    1
-
-#define CONFIGURE_RTEMS_INIT_TASKS_TABLE 
-
-#define CONFIGURE_EXTRA_TASK_STACKS         (2 * RTEMS_MINIMUM_STACK_SIZE)
-
-#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
-
-#define CONFIGURE_INIT
-#include <rtems/confdefs.h>
-
Index: c/src/lib/libbsp/arm/beagle/simscripts/bbxm.cfg
===================================================================
--- c/src/lib/libbsp/arm/beagle/simscripts/bbxm.cfg	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,174 +1,0 @@
-# Start with: openocd -f interface/ftdi/flyswatter.cfg -f bbxm.cfg -c 'reset init'
-#   or  with: openocd -f interface/ftdi/flyswatter2.cfg -f bbxm.cfg -c 'reset init'
-source [find board/ti_beagleboard_xm.cfg]
-
-#
-# Use the MLO file from uboot to initialise the board.
-#
-proc beagleboard_xm_mlo { file } {
-  global _CHIPNAME
-  adapter_khz 10
-  catch { mww phys 0x48307250 0x00000004 }
-  reset init
-  icepick_c_wreset $_CHIPNAME.jrc
-  halt
-  dm37x.cpu arm core_state arm
-  puts "Beagleboard xM MLO: $file"
-  load_image $file 0x402005f8 bin
-  resume 0x40200800
-  sleep 500
-  halt
-}
-
-proc beagleboard_xm_init {} {
-  global _CHIPNAME
-  adapter_khz 10
-  catch { mww phys 0x48307250 0x00000004 }
-  reset init
-  icepick_c_wreset $_CHIPNAME.jrc
-  halt
-  dm37x.cpu arm core_state arm
-
-  mwh 0x6e00007c 0x000000ff ;# omap-gpmc
-  mwh 0x6e00007c 0x00000090 ;# omap-gpmc
-  mwh 0x6e000080 0x00000000 ;# omap-gpmc
-  mwh 0x6e00007c 0x00000000 ;# omap-gpmc
-  mwh 0x6e000080 0x00000000 ;# omap-gpmc
-  mwh 0x6e000080 0x00000000 ;# omap-gpmc
-  mwh 0x6e000080 0x00000000 ;# omap-gpmc
-  mwh 0x6e000080 0x00000000 ;# omap-gpmc
-  mwh 0x6e000080 0x00000000 ;# omap-gpmc
-  mwh 0x6e00007c 0x00000030 ;# omap-gpmc
-  mww 0x48004c00 0x00000020 ;# omap3_cm
-  mww 0x48004c10 0x00000020 ;# omap3_cm
-  mww 0x48314048 0x0000aaaa ;# omap3_mpu_wdt
-  mww 0x48314048 0x00005555 ;# omap3_mpu_wdt
-  mww 0x6c000048 0xffffffff ;# omap3_sms
-  mww 0x48004c40 0x00000013 ;# omap3_cm
-  mww 0x48004c10 0x00000025 ;# omap3_cm
-  mww 0x48004c00 0x00000021 ;# omap3_cm
-  mww 0x48306d40 0x00000003 ;# omap3_prm
-  mww 0x48307270 0x00000083 ;# omap3_prm
-  mww 0x48307270 0x00000080 ;# omap3_prm
-  mww 0x48004904 0x00000015 ;# omap3_cm
-  mww 0x48004d00 0x00110016 ;# omap3_cm
-  mww 0x48005140 0x10020a50 ;# omap3_cm
-  mww 0x48004d40 0x08000040 ;# omap3_cm
-  mww 0x48004d40 0x09900040 ;# omap3_cm
-  mww 0x48004d40 0x09900c40 ;# omap3_cm
-  mww 0x48004d40 0x09900c00 ;# omap3_cm
-  mww 0x48004a40 0x00001305 ;# omap3_cm
-  mww 0x48004a40 0x00001125 ;# omap3_cm
-  mww 0x48004a40 0x00001109 ;# omap3_cm
-  mww 0x48004a40 0x0000110a ;# omap3_cm
-  mww 0x48004b40 0x00000005 ;# omap3_cm
-  mww 0x48004c40 0x00000015 ;# omap3_cm
-  mww 0x48004d00 0x00110006 ;# omap3_cm
-  mww 0x48004d00 0x00110007 ;# omap3_cm
-  mww 0x48004d00 0x00110007 ;# omap3_cm
-  mww 0x48005140 0x03020a50 ;# omap3_cm
-  mww 0x48004f40 0x00000004 ;# omap3_cm
-  mww 0x48004e40 0x00000409 ;# omap3_cm
-  mww 0x48004e40 0x00001009 ;# omap3_cm
-  mww 0x48004d48 0x00000009 ;# omap3_cm
-  mww 0x48004d44 0x02436000 ;# omap3_cm
-  mww 0x48004d44 0x0243600c ;# omap3_cm
-  mww 0x48004a40 0x0000110a ;# omap3_cm
-  mww 0x48004d00 0x00170007 ;# omap3_cm
-  mww 0x48004d04 0x00000011 ;# omap3_cm
-  mww 0x48004d50 0x00000001 ;# omap3_cm
-  mww 0x48004d4c 0x00007800 ;# omap3_cm
-  mww 0x48004d4c 0x0000780c ;# omap3_cm
-  mww 0x48004d00 0x00170037 ;# omap3_cm
-  mww 0x48004d04 0x00000017 ;# omap3_cm
-  mww 0x48004004 0x00000011 ;# omap3_cm
-  mww 0x48004044 0x00000001 ;# omap3_cm
-  mww 0x48004040 0x00081400 ;# omap3_cm
-  mww 0x48004040 0x00081400 ;# omap3_cm
-  mww 0x48004004 0x00000017 ;# omap3_cm
-  mww 0x48004944 0x00000001 ;# omap3_cm
-  mww 0x48004940 0x000a5800 ;# omap3_cm
-  mww 0x48004940 0x000a580c ;# omap3_cm
-  mww 0x48004904 0x00000017 ;# omap3_cm
-  mww 0x48005040 0x000000ff ;# omap3_cm
-  mww 0x48004c40 0x00000015 ;# omap3_cm
-  mww 0x48005040 0x000000ff ;# omap3_cm
-  mww 0x48005010 0x00000008 ;# omap3_cm
-  mww 0x48005000 0x00000008 ;# omap3_cm
-  mww 0x48004a00 0x00002000 ;# omap3_cm
-  mww 0x48004a10 0x00002042 ;# omap3_cm
-  mww 0x48005000 0x00000808 ;# omap3_cm
-  mww 0x48005010 0x00000808 ;# omap3_cm
-  mww 0x48004a00 0x0003a000 ;# omap3_cm
-  mww 0x48004a10 0x0003a042 ;# omap3_cm
-  mww 0x48004c10 0x00000025 ;# omap3_cm
-  mww 0x48004000 0x00000001 ;# omap3_cm
-  mww 0x48004a00 0x03fffe29 ;# omap3_cm
-  mww 0x48004a10 0x3ffffffb ;# omap3_cm
-  mww 0x48004a14 0x0000001f ;# omap3_cm
-  mww 0x48004c00 0x000000e9 ;# omap3_cm
-  mww 0x48004c10 0x0000003f ;# omap3_cm
-  mww 0x48004e00 0x00000005 ;# omap3_cm
-  mww 0x48004e10 0x00000001 ;# omap3_cm
-  mww 0x48004f00 0x00000001 ;# omap3_cm
-  mww 0x48004f10 0x00000001 ;# omap3_cm
-  mww 0x48005000 0x0003ffff ;# omap3_cm
-  mww 0x48005010 0x0003ffff ;# omap3_cm
-  mww 0x48005410 0x00000001 ;# omap3_cm
-  mww 0x48005400 0x00000003 ;# omap3_cm
-  mww 0x48004a18 0x00000004 ;# omap3_cm
-  mww 0x48004a08 0x00000004 ;# omap3_cm
-  mww 0x6e000060 0x00001800 ;# omap-gpmc
-  mww 0x6e000064 0x00141400 ;# omap-gpmc
-  mww 0x6e000068 0x00141400 ;# omap-gpmc
-  mww 0x6e00006c 0x0f010f01 ;# omap-gpmc
-  mww 0x6e000070 0x010c1414 ;# omap-gpmc
-  mww 0x6e000074 0x1f0f0a80 ;# omap-gpmc
-  mww 0x6e000078 0x00000870 ;# omap-gpmc
-  mwb 0x6e00007c 0x000000ff ;# omap-gpmc
-  mwb 0x6e00007c 0x00000070 ;# omap-gpmc
-  mwb 0x6e00007c 0x00000090 ;# omap-gpmc
-  mwb 0x6e000080 0x00000000 ;# omap-gpmc
-  mww 0x6d000010 0x00000002 ;# omap.sdrc
-  mww 0x6d000010 0x00000000 ;# omap.sdrc
-  mww 0x6d000044 0x00000100 ;# omap.sdrc
-  mww 0x6d000070 0x04000081 ;# omap.sdrc
-  mww 0x6d000060 0x0000000a ;# omap.sdrc
-  mww 0x6d000080 0x04590099 ;# omap.sdrc
-  mww 0x6d00009c 0xc29dc4c6 ;# omap.sdrc
-  mww 0x6d0000a0 0x00022322 ;# omap.sdrc
-  mww 0x6d0000a4 0x0004e201 ;# omap.sdrc
-  mww 0x6d0000a8 0x00000000 ;# omap.sdrc
-  mww 0x6d0000a8 0x00000001 ;# omap.sdrc
-  mww 0x6d0000a8 0x00000002 ;# omap.sdrc
-  mww 0x6d0000a8 0x00000002 ;# omap.sdrc
-  mww 0x6d000084 0x00000032 ;# omap.sdrc
-  mww 0x6d000040 0x00000004 ;# omap.sdrc
-  mww 0x6d0000b0 0x04590099 ;# omap.sdrc
-  mww 0x6d0000c4 0xc29dc4c6 ;# omap.sdrc
-  mww 0x6d0000c8 0x00022322 ;# omap.sdrc
-  mww 0x6d0000d4 0x0004e201 ;# omap.sdrc
-  mww 0x6d0000d8 0x00000000 ;# omap.sdrc
-  mww 0x6d0000d8 0x00000001 ;# omap.sdrc
-  mww 0x6d0000d8 0x00000002 ;# omap.sdrc
-  mww 0x6d0000d8 0x00000002 ;# omap.sdrc
-  mww 0x6d0000b4 0x00000032 ;# omap.sdrc
-  mww 0x6d0000b0 0x00000000 ;# omap.sdrc
-  mww 0x6e00001c 0x00000000 ;# omap-gpmc
-  mww 0x6e000040 0x00000000 ;# omap-gpmc
-  mww 0x6e000050 0x00000000 ;# omap-gpmc
-  mww 0x6e000078 0x00000000 ;# omap-gpmc
-  mww 0x6e000078 0x00000000 ;# omap-gpmc
-  mww 0x6e000060 0x00001800 ;# omap-gpmc
-  mww 0x6e000064 0x00141400 ;# omap-gpmc
-  mww 0x6e000068 0x00141400 ;# omap-gpmc
-  mww 0x6e00006c 0x0f010f01 ;# omap-gpmc
-  mww 0x6e000070 0x010c1414 ;# omap-gpmc
-  mww 0x6e000074 0x1f0f0a80 ;# omap-gpmc
-  mww 0x6e000078 0x00000870 ;# omap-gpmc
-  mww 0x48004a00 0x437ffe00 ;# omap3_cm
-  mww 0x48004a10 0x637ffed2 ;# omap3_cm
-  puts "Beagleboard xM initialised"
-}
-
-init
Index: c/src/lib/libbsp/arm/beagle/simscripts/gdbinit.bbxm
===================================================================
--- c/src/lib/libbsp/arm/beagle/simscripts/gdbinit.bbxm	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,16 +1,0 @@
-target remote localhost:3333
-mon reset halt
-mon beagleboard_xm_init
-load
-
-b _ARMV4_Exception_undef_default
-b _ARMV4_Exception_swi_default
-b _ARMV4_Exception_pref_abort_default
-b _ARMV4_Exception_data_abort_default
-b _ARMV4_Exception_reserved_default
-b _ARMV4_Exception_irq_default
-b _ARMV4_Exception_fiq_default
-
-b rtems_fatal
-b rtems_fatal_error_occurred
-b _exit
Index: c/src/lib/libbsp/arm/beagle/simscripts/qemu-beagleboard.in
===================================================================
--- c/src/lib/libbsp/arm/beagle/simscripts/qemu-beagleboard.in	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,63 +1,0 @@
-#
-#  ARM/BeagleBoard Qemu Support
-#
-
-bspUsesGDBSimulator="no"
-# bspGeneratesGDBCommands="yes"
-# bspSupportsGDBServerMode="yes"
-runBSP=NOT_OVERRIDDEN
-if [ ! -r ${runBSP} ] ; then
-  runBSP=qemu-system-arm
-fi
-bspNeedsDos2Unix="yes"
-bspGeneratesDeviceTree="yes"
-bspInputDevice=qemu-gumstix.cmds
-bspTreeFile=qemu-gumstix.cmds
-bspRedirectInput=yes
-
-runARGS()
-{
-# qemu-system-arm -M connex -m 289 -nographic -monitor null -pflash connex-flash.img <cmds >log
-
-  UBOOT=${HOME}/qemu/u-boot-connex-400-r1604.bin
-  FLASH=connex-flash.img
-  ( dd of=${FLASH} bs=128k count=128 if=/dev/zero ;
-    dd of=${FLASH} bs=128k conv=notrunc if=${UBOOT} ;
-    dd of=${FLASH} bs=1k conv=notrunc seek=4096 if=${1} ) >/dev/null 2>&1
-
-  if [ ${coverage} = yes ] ; then
-     rm -f trace ${1}.tra
-     COVERAGE_ARG="-trace ${1}.tra"
-  fi
-
-  echo "-M connex -m 289 -nographic -monitor null \
-         -pflash ${FLASH} ${COVERAGE_ARG}"
-}
-
-checkBSPFaults()
-{
-  return 0
-}
-
-bspLimit()
-{
-  testname=$1
-  case ${testname} in
-    *stackchk*)limit=5 ;;
-    *fatal*)   limit=1 ;;
-    *minimum*) limit=1 ;;
-    *psxtime*) limit=180 ;;
-    *)         limit=60 ;;
-  esac
-  echo ${limit}
-}
-
-### Generate the commands we boot with
-bspGenerateDeviceTree()
-{
-cat >qemu-gumstix.cmds <<EOF
-
-bootelf 0x400000
-
-EOF
-}
Index: c/src/lib/libbsp/arm/beagle/simscripts/sdcard.sh
===================================================================
--- c/src/lib/libbsp/arm/beagle/simscripts/sdcard.sh	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,84 +1,0 @@
-# we store all generated files here.
-TMPDIR=tmp_sdcard_dir.$$
-
-FATIMG=$TMPDIR/bbxm_boot_fat.img
-SIZE=65536
-OFFSET=2048
-FATSIZE=`expr $SIZE - $OFFSET`
-UENV=uEnv.txt
-
-rm -rf $TMPDIR
-mkdir -p $TMPDIR
-
-if [ $# -ne 2 ]
-then	echo "Usage: $0 <RTEMS prefix> <RTEMS executable>"
-	exit 1
-fi
-
-PREFIX=$1
-
-if [ ! -d "$PREFIX" ]
-then	echo "This script needs the RTEMS tools bindir as the first argument."
-	exit 1
-fi
-
-executable=$2
-
-case "$2" in
-	*beagleboard*)
-		ubootcfg=omap3_beagle
-		imgtype=bb
-		;;
-	*beaglebone*)
-		ubootcfg=am335x_evm
-		imgtype=bone
-		;;
-	*)
-		echo "Can't guess which uboot to use - please specify full path to executable."
-		exit 1
-		;;
-esac
-
-app=rtems-app.img
-
-if [ ! -f "$executable" ]
-then	echo "Expecting RTEMS executable as arg; $executable not found."
-	exit 1
-fi
-
-set -e
-
-IMG=${imgtype}_`basename $2`-sdcard.img
-
-# Make an empty image
-dd if=/dev/zero of=$IMG bs=512 seek=`expr $SIZE - 1` count=1
-dd if=/dev/zero of=$FATIMG bs=512 seek=`expr $FATSIZE - 1` count=1
-
-# Make an ms-dos FS on it
-$PREFIX/bin/newfs_msdos -r 1 -m 0xf8 -c 4 -F16  -h 64 -u 32 -S 512 -s $FATSIZE -o 0 ./$FATIMG
-
-# Prepare the executable.
-base=`basename $executable`
-$PREFIX/bin/arm-rtems4.12-objcopy $executable -O binary $TMPDIR/$base.bin
-gzip -9 $TMPDIR/$base.bin
-$PREFIX/bin/mkimage -A arm -O rtems -T kernel -a 0x80000000 -e 0x80000000 -n RTEMS -d $TMPDIR/$base.bin.gz $TMPDIR/$app
-echo "setenv bootdelay 5
-uenvcmd=run boot
-boot=fatload mmc 0 0x80800000 $app ; bootm 0x80800000" >$TMPDIR/$UENV
-
-# Copy the uboot and app image onto the FAT image
-$PREFIX/bin/mcopy -bsp -i $FATIMG $PREFIX/uboot/$ubootcfg/MLO ::MLO
-$PREFIX/bin/mcopy -bsp -i $FATIMG $PREFIX/uboot/$ubootcfg/u-boot.img ::u-boot.img
-$PREFIX/bin/mcopy -bsp -i $FATIMG $TMPDIR/$app ::$app
-$PREFIX/bin/mcopy -bsp -i $FATIMG $TMPDIR/$UENV ::$UENV
-
-# Just a single FAT partition (type C) that uses all of the image
-$PREFIX/bin/partition -m $IMG $OFFSET c:${FATSIZE}\*
-
-# Put the FAT image into the SD image
-dd if=$FATIMG of=$IMG seek=$OFFSET
-
-# cleanup
-rm -rf $TMPDIR
-
-echo "Result is in $IMG."
Index: c/src/lib/libbsp/arm/csb336/README
===================================================================
--- c/src/lib/libbsp/arm/csb336/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,3 +1,0 @@
-This is the BSP for Cogent Computer System's CSB336, a single board
-computer using the Motorola MC9328MXL CPU.
-
Index: c/src/lib/libbsp/arm/csb337/README
===================================================================
--- c/src/lib/libbsp/arm/csb337/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,11 +1,0 @@
-This is the BSP for Cogent Computer System's CSB337 and updated 
-for CSB637, single board computers using the Atmel AT91RM9200 CPU.
-The differences in the board are very slight but important:
-
- CSB337             CSB637
-========           ========
-16Mb RAM           64Mb RAM
-??
-
-Please check README.kit637_v6 for more explanation about the Cogent's
-Development Kit that uses the CSB637 single board computer.
Index: c/src/lib/libbsp/arm/csb337/README.kit637_v6
===================================================================
--- c/src/lib/libbsp/arm/csb337/README.kit637_v6	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,26 +1,0 @@
-#  Fernando Nicodemos <fgnicodemos@terra.com.br>
-#  from NCB - Sistemas Embarcados Ltda. (Brazil)
-#
-
-This is the BSP for Cogent Computer System's KIT637_V6. It implements an 
-updated version of the CSB337 board with a number of optional peripherals.
-
-This KIT is implemented by CSB637 single board computer using the 
-Atmel AT91RM9200 CPU and the CSB937 target main board. It uses an 
-Optrex LCD (T-51750AA, 640x480) and Touchscreen (not supported in this
-BSP). The IDE and USB (host and device) interfaces are also not supported.
-The SD and Compact Flash cards drivers are still under development. 
-
-The differences in the CSB637 single board computer are very slight but 
-important:
- 
-                     CSB337        CSB637
-                   ==========    ==========
-Clock speed        184MHz        184MHz
-External memory    16MB SDRAM    64MB SDRAM
-Flash memory       8MB Strata    8/16MB Strata (8MB used by default)
-Video buffer       1MB           8MB
-Video driver       S1D13706      S1D13506
-PHY Layer          LXT971ALC     BCM5221
-
-?? Some GPIO or interrupts moved around.
Index: c/src/lib/libbsp/arm/edb7312/README
===================================================================
--- c/src/lib/libbsp/arm/edb7312/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,1 +1,0 @@
-This board is from Cogent.
Index: c/src/lib/libbsp/arm/gumstix/README
===================================================================
--- c/src/lib/libbsp/arm/gumstix/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,2 +1,0 @@
-This is the BSP for GUMSTIX which has a PXA255 CPU.
-
Index: c/src/lib/libbsp/arm/lm3s69xx/0001-target-arm-Fixed-ARMv7-M-SHPR-access.patch
===================================================================
--- c/src/lib/libbsp/arm/lm3s69xx/0001-target-arm-Fixed-ARMv7-M-SHPR-access.patch	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,104 +1,0 @@
-From 0c8e700376cec0c7b5a70f999b5e286efc321423 Mon Sep 17 00:00:00 2001
-From: Sebastian Huber <sebastian.huber@embedded-brains.de>
-Date: Fri, 16 Dec 2011 19:46:40 +0100
-Subject: [PATCH 1/4] target-arm: Fixed ARMv7-M SHPR access
-
-According to "ARMv7-M Architecture Reference Manual" issue D section
-"B3.2.10 System Handler Prioriy Register 1, SHPR1", "B3.2.11 System
-Handler Prioriy Register 2, SHPR2", and "B3.2.12 System Handler Prioriy
-Register 3, SHPR3".
-
-Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
----
- hw/arm_gic.c     |   16 ++++++++++++++--
- hw/armv7m_nvic.c |   19 -------------------
- 2 files changed, 14 insertions(+), 21 deletions(-)
-
-diff --git a/hw/arm_gic.c b/hw/arm_gic.c
-index 9b52119..5139d95 100644
---- a/hw/arm_gic.c
-+++ b/hw/arm_gic.c
-@@ -356,6 +356,11 @@ static uint32_t gic_dist_readb(void *opaque, target_phys_addr_t offset)
-             if (GIC_TEST_TRIGGER(irq + i))
-                 res |= (2 << (i * 2));
-         }
-+#else
-+    } else if (0xd18 <= offset && offset < 0xd24) {
-+        /* System Handler Priority.  */
-+        irq = offset - 0xd14;
-+        res = GIC_GET_PRIORITY(irq, cpu);
- #endif
-     } else if (offset < 0xfe0) {
-         goto bad_reg;
-@@ -387,7 +392,8 @@ static uint32_t gic_dist_readl(void *opaque, target_phys_addr_t offset)
-     gic_state *s = (gic_state *)opaque;
-     uint32_t addr;
-     addr = offset;
--    if (addr < 0x100 || addr > 0xd00)
-+    if (addr < 0x100 || (addr > 0xd00 && addr != 0xd18 && addr != 0xd1c
-+        && addr != 0xd20))
-         return nvic_readl(s, addr);
- #endif
-     val = gic_dist_readw(opaque, offset);
-@@ -528,6 +534,11 @@ static void gic_dist_writeb(void *opaque, target_phys_addr_t offset,
-                 GIC_CLEAR_TRIGGER(irq + i);
-             }
-         }
-+#else
-+    } else if (0xd18 <= offset && offset < 0xd24) {
-+        /* System Handler Priority.  */
-+        irq = offset - 0xd14;
-+        s->priority1[irq][0] = value & 0xff;
- #endif
-     } else {
-         /* 0xf00 is only handled for 32-bit writes.  */
-@@ -553,7 +564,8 @@ static void gic_dist_writel(void *opaque, target_phys_addr_t offset,
- #ifdef NVIC
-     uint32_t addr;
-     addr = offset;
--    if (addr < 0x100 || (addr > 0xd00 && addr != 0xf00)) {
-+    if (addr < 0x100 || (addr > 0xd00 && addr != 0xd18 && addr != 0xd1c
-+        && addr != 0xd20 && addr != 0xf00)) {
-         nvic_writel(s, addr, value);
-         return;
-     }
-diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c
-index bf8c3c5..65b575e 100644
---- a/hw/armv7m_nvic.c
-+++ b/hw/armv7m_nvic.c
-@@ -195,14 +195,6 @@ static uint32_t nvic_readl(void *opaque, uint32_t offset)
-     case 0xd14: /* Configuration Control.  */
-         /* TODO: Implement Configuration Control bits.  */
-         return 0;
--    case 0xd18: case 0xd1c: case 0xd20: /* System Handler Priority.  */
--        irq = offset - 0xd14;
--        val = 0;
--        val |= s->gic.priority1[irq++][0];
--        val |= s->gic.priority1[irq++][0] << 8;
--        val |= s->gic.priority1[irq++][0] << 16;
--        val |= s->gic.priority1[irq][0] << 24;
--        return val;
-     case 0xd24: /* System Handler Status.  */
-         val = 0;
-         if (s->gic.irq_state[ARMV7M_EXCP_MEM].active) val |= (1 << 0);
-@@ -335,17 +327,6 @@ static void nvic_writel(void *opaque, uint32_t offset, uint32_t value)
-     case 0xd14: /* Configuration Control.  */
-         /* TODO: Implement control registers.  */
-         goto bad_reg;
--    case 0xd18: case 0xd1c: case 0xd20: /* System Handler Priority.  */
--        {
--            int irq;
--            irq = offset - 0xd14;
--            s->gic.priority1[irq++][0] = value & 0xff;
--            s->gic.priority1[irq++][0] = (value >> 8) & 0xff;
--            s->gic.priority1[irq++][0] = (value >> 16) & 0xff;
--            s->gic.priority1[irq][0] = (value >> 24) & 0xff;
--            gic_update(&s->gic);
--        }
--        break;
-     case 0xd24: /* System Handler Control.  */
-         /* TODO: Real hardware allows you to set/clear the active bits
-            under some circumstances.  We don't implement this.  */
--- 
-1.7.1
-
Index: c/src/lib/libbsp/arm/lm3s69xx/0002-target-arm-Disable-priority_mask-feature.patch
===================================================================
--- c/src/lib/libbsp/arm/lm3s69xx/0002-target-arm-Disable-priority_mask-feature.patch	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,31 +1,0 @@
-From 5f562d098d84e12d4688272dcf68a2d0318721a7 Mon Sep 17 00:00:00 2001
-From: Sebastian Huber <sebastian.huber@embedded-brains.de>
-Date: Fri, 16 Dec 2011 20:00:59 +0100
-Subject: [PATCH 2/4] target-arm: Disable priority_mask feature
-
-This is unused for the ARMv7-M NVIC.
-
-Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
----
- hw/arm_gic.c |    4 ++++
- 1 files changed, 4 insertions(+), 0 deletions(-)
-
-diff --git a/hw/arm_gic.c b/hw/arm_gic.c
-index 5139d95..cafcc81 100644
---- a/hw/arm_gic.c
-+++ b/hw/arm_gic.c
-@@ -707,7 +707,11 @@ static void gic_reset(gic_state *s)
-     int i;
-     memset(s->irq_state, 0, GIC_NIRQ * sizeof(gic_irq_state));
-     for (i = 0 ; i < NUM_CPU(s); i++) {
-+#ifdef NVIC
-+        s->priority_mask[i] = 0x100;
-+#else
-         s->priority_mask[i] = 0xf0;
-+#endif
-         s->current_pending[i] = 1023;
-         s->running_irq[i] = 1023;
-         s->running_priority[i] = 0x100;
--- 
-1.7.1
-
Index: c/src/lib/libbsp/arm/lm3s69xx/0003-target-arm-Evil-hack-for-BASEPRI-and-BASEPRI_MAX.patch
===================================================================
--- c/src/lib/libbsp/arm/lm3s69xx/0003-target-arm-Evil-hack-for-BASEPRI-and-BASEPRI_MAX.patch	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,63 +1,0 @@
-From 78e85bb79c02b14170c3f39d9bb9cccd4d625890 Mon Sep 17 00:00:00 2001
-From: Sebastian Huber <sebastian.huber@embedded-brains.de>
-Date: Fri, 16 Dec 2011 20:12:29 +0100
-Subject: [PATCH 3/4] target-arm: Evil hack for BASEPRI and BASEPRI_MAX
-
-This is only a quick and dirty fix to get the ARMv7-M BASEPRI and
-BASEPRI_MAX feature working.
-
-Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
----
- cpu-exec.c          |    4 ++--
- target-arm/helper.c |   12 +++++-------
- 2 files changed, 7 insertions(+), 9 deletions(-)
-
-diff --git a/cpu-exec.c b/cpu-exec.c
-index a9fa608..6ca9aab 100644
---- a/cpu-exec.c
-+++ b/cpu-exec.c
-@@ -408,8 +408,8 @@ int cpu_exec(CPUState *env)
-                        We avoid this by disabling interrupts when
-                        pc contains a magic address.  */
-                     if (interrupt_request & CPU_INTERRUPT_HARD
--                        && ((IS_M(env) && env->regs[15] < 0xfffffff0)
--                            || !(env->uncached_cpsr & CPSR_I))) {
-+                        && !(env->uncached_cpsr & CPSR_I)
-+                        && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {
-                         env->exception_index = EXCP_IRQ;
-                         do_interrupt(env);
-                         next_tb = 0;
-diff --git a/target-arm/helper.c b/target-arm/helper.c
-index 65f4fbf..be2e6db 100644
---- a/target-arm/helper.c
-+++ b/target-arm/helper.c
-@@ -2163,7 +2163,7 @@ uint32_t HELPER(v7m_mrs)(CPUState *env, uint32_t reg)
-         return (env->uncached_cpsr & CPSR_I) != 0;
-     case 17: /* BASEPRI */
-     case 18: /* BASEPRI_MAX */
--        return env->v7m.basepri;
-+        return (env->uncached_cpsr & CPSR_I) != 0;
-     case 19: /* FAULTMASK */
-         return (env->uncached_cpsr & CPSR_F) != 0;
-     case 20: /* CONTROL */
-@@ -2218,13 +2218,11 @@ void HELPER(v7m_msr)(CPUState *env, uint32_t reg, uint32_t val)
-             env->uncached_cpsr &= ~CPSR_I;
-         break;
-     case 17: /* BASEPRI */
--        env->v7m.basepri = val & 0xff;
--        break;
-     case 18: /* BASEPRI_MAX */
--        val &= 0xff;
--        if (val != 0 && (val < env->v7m.basepri || env->v7m.basepri == 0))
--            env->v7m.basepri = val;
--        break;
-+        if (val)
-+            env->uncached_cpsr |= CPSR_I;
-+        else
-+            env->uncached_cpsr &= ~CPSR_I;
-     case 19: /* FAULTMASK */
-         if (val & 1)
-             env->uncached_cpsr |= CPSR_F;
--- 
-1.7.1
-
Index: c/src/lib/libbsp/arm/lm3s69xx/0004-target-arm-Evil-hack-to-increase-the-RAM-size.patch
===================================================================
--- c/src/lib/libbsp/arm/lm3s69xx/0004-target-arm-Evil-hack-to-increase-the-RAM-size.patch	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,32 +1,0 @@
-From e06edd436a336e5db5188eb7ffac594138fc825a Mon Sep 17 00:00:00 2001
-From: Sebastian Huber <sebastian.huber@embedded-brains.de>
-Date: Fri, 16 Dec 2011 20:19:45 +0100
-Subject: [PATCH 4/4] target-arm: Evil hack to increase the RAM size
-
-This increases the RAM of the Stellaris LM3S6965 in a brute force way.
-It would be nice to be able to override the default RAM size with
-command line options.  The default RAM size is to small to run complex
-test suites.
-
-Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
----
- hw/stellaris.c |    3 ++-
- 1 files changed, 2 insertions(+), 1 deletions(-)
-
-diff --git a/hw/stellaris.c b/hw/stellaris.c
-index ce62a98..dd7b7d7 100644
---- a/hw/stellaris.c
-+++ b/hw/stellaris.c
-@@ -1219,7 +1219,8 @@ static stellaris_board_info stellaris_boards[] = {
-   { "LM3S6965EVB",
-     0x10010002,
-     0x1073402e,
--    0x00ff007f, /* dc0 */
-+    /* FIXME */
-+    0xffffffff, /* dc0 */
-     0x001133ff,
-     0x030f5317,
-     0x0f0f87ff,
--- 
-1.7.1
-
Index: c/src/lib/libbsp/arm/lm3s69xx/0005-target-arm-Fix-system_clock_scale-initial-value.patch
===================================================================
--- c/src/lib/libbsp/arm/lm3s69xx/0005-target-arm-Fix-system_clock_scale-initial-value.patch	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,29 +1,0 @@
-From bb7192082be2be0acfda61cd46d2b2c3677f8337 Mon Sep 17 00:00:00 2001
-From: Sebastian Huber <sebastian.huber@embedded-brains.de>
-Date: Sat, 24 Mar 2012 19:58:44 +0100
-Subject: [PATCH] target-arm: Fix system_clock_scale initial value
-
-This variable should be initilized somewhere.  This default value avoids
-a division by zero.
-
-Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
----
- hw/armv7m_nvic.c |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c
-index 65b575e..b3a1b3d 100644
---- a/hw/armv7m_nvic.c
-+++ b/hw/armv7m_nvic.c
-@@ -51,7 +51,7 @@ typedef struct {
- #define SYSTICK_CLKSOURCE (1 << 2)
- #define SYSTICK_COUNTFLAG (1 << 16)
- 
--int system_clock_scale;
-+int system_clock_scale = SYSTICK_SCALE;
- 
- /* Conversion factor from qemu timer to SysTick frequencies.  */
- static inline int64_t systick_scale(nvic_state *s)
--- 
-1.7.1
-
Index: c/src/lib/libbsp/arm/lm3s69xx/README
===================================================================
--- c/src/lib/libbsp/arm/lm3s69xx/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,8 +1,0 @@
-Tested only on Qemu simulator with git (git://git.qemu.org/qemu.git) version
-1.0.50.
-
-You have to apply the patches contained in this directory.
-
-Command line:
-
-qemu-system-arm -S -s -net none -nographic -M lm3s6965evb -kernel hello.bin
Index: c/src/lib/libbsp/arm/lpc176x/README
===================================================================
--- c/src/lib/libbsp/arm/lpc176x/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,11 +1,0 @@
-Development Board: Base Board from Embedded Artists
-
-http://www.embeddedartists.com/products/lpcxpresso/mbed.php
-
-Drivers:
-
-	o Console
-	o Clock
-	o Timer
-	o GPIO
-	o Watchdog
Index: c/src/lib/libbsp/arm/lpc24xx/README
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,52 +1,0 @@
-Development Board: QVGA Base Board from Embedded Artists
-
-http://www.embeddedartists.com/products/uclinux/oem_lpc2478.php
-
-Drivers:
-
-	o Console
-	o Clock
-	o RTC
-	o SSP (SPI mode)
-	o Network
-	o I2C
-
-Howto setup QVGA Base Board?
-
-	o Unpack board.
-	o Connect board via USB to your PC.
-	o Verify that demo application runs.
-	o Disconnect board.
-	o Change jumpers to enable ISP.
-	o Connect board.
-	o Load U-Boot image 'u-boot_v1.1.6_lpc2468oem_v1_8_16bit.hex'
-	(available from the EA support page) into the flash (flash tool
-	FlashMagic is availabe from NXP).
-	o Change jumbers back to disable ISP.
-	o Use a terminal program to change the U-Boot settings via the console.
-	o U-Boot settings:
-		set ethaddr '00:1a:f1:X:X:X'
-		set serverip 'X.X.X.X'
-		set ipaddr 'X.X.X.X'
-		set rtems 'tftp a1000000 lpc2478.img;bootm'
-		set bootcmd 'echo Booting RTEMS ...;run rtems'
-		saveenv
-
-Howto make a U-Boot image?
-
-mkimage -A arm -O rtems -T kernel -C gzip \
-   -a a0000000 -e a0000040 -n "RTEMS Application" -d app.bin.gz app.img
-
-Application Board: NCS (Nurse Control Station)
-
-	Board:      NextGenNCS
-	Processor:  NXP LPC2478 or LPC2470
-	SDRAM:      8MByte, 16 bit wide
-	Ext. Flash: 1MByte, 16 bit wide
-	Console:    UART, 115200 Baud
-	Network:    100Base-T
-
-Application Board: TLI800
-	TLI800 is a network node using four serial ports produced by Thorn
-	Security Limited.  It is used by Tyco Fire & Integrated Solutions for a
-	fire control network.
Index: c/src/lib/libbsp/arm/lpc32xx/README
===================================================================
--- c/src/lib/libbsp/arm/lpc32xx/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,6 +1,0 @@
-Development board is phyCORE-LPC3250 RDK.  Basic initialization via stage 1
-bootloader or U-Boot will be assumed.  Drivers:
-
-        o Standard UART 3, 4, 5, 6 (Console = 5, 115200N1)
-        o Clock uses TIMER 0
-        o Ethernet
Index: c/src/lib/libbsp/arm/raspberrypi/README
===================================================================
--- c/src/lib/libbsp/arm/raspberrypi/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,65 +1,0 @@
-BSP for the Raspberry Pi ARM board
-This is a basic port that should work on either Model A or Model B.
-
-It currently supports the following devices:
-    o Console using the PL011 UART0
-       The console driver only works with polled mode right now,
-       the interrupt code is there, but it does not work yet.
-       The console driver is currently hardcoded at 115k 8N1
-    o Clock uses the internal ARM timer
-       The Raspberry Pi can be overclocked through the config.txt file, this
-       would affect the duration of the clock tick.
-    o Benchmark timer reads the lower 32 bit GPU timer register
-
-To run an RTEMS binary, it must be stripped and loaded on the SD card along with
-the following files:
-  bootcode.bin
-  config.txt
-  loader.bin
-  start.elf
-  kernel.img ( the RTEMS binary, you can change the name in config.txt )
-
-These files can be obtained from a Linux installation image, or from here:
-https://github.com/raspberrypi/firmware
-
-I used an old 256MB SD card to boot RTEMS.
-Much more information about the SD card file and bootloader can be found here:
-http://elinux.org/RPi_Hub
-http://www.raspberrypi.org
-
-The linker script is set up for 128MB, so it can be used with a GPU/ARM split
-of 128/128.
-The bootloader that is used on the SD card determines the split of RAM between the
-ARM and the GPU. It might make sense to adjust the GPU/ARM memory split to give
-more memory to RTEMS, especially on a 512MB board.
-
-To do:
-    It would be nice to get support in the BSP for the following:
-    o SD card
-    o USB and USB 10/100 network chip on Model B
-    o SPI
-    o GPIO
-    o ARM MMU
-    o Graphics console
-    o Sound
-
-Credits and links:
-
-  There is a wealth of code and information to reference on the raspberrypi.org bare metal forums:
-  http://www.raspberrypi.org/phpBB3/viewforum.php?f=72
-
-  I found information about how to program the timers, interrupts, and UART 0
-  from the examples provided by:
-
-  David Welch:
-  https://github.com/dwelch67/raspberrypi
-  The readme file at his github repository has valuable information about connecting a UART cable, JTAG etc.
-
-  Steve Bate:
-  http://www.stevebate.net/chibios-rpi/GettingStarted.html
-  Steve provided a port of the Chibios RTOS to the raspberry Pi
-
-  James Walmsley:
-  http://www.raspberrypi.org/phpBB3/viewtopic.php?f=72&t=22423
-  James ported FreeRTOS to the raspberry Pi.
-
Index: c/src/lib/libbsp/arm/realview-pbx-a9/README
===================================================================
--- c/src/lib/libbsp/arm/realview-pbx-a9/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,15 +1,0 @@
-Tested only on Qemu.
-
-git clone git://git.qemu.org/qemu.git qemu
-cd qemu
-git co a1bff71c56f2d1048244c829b63797940dd4ba0e
-mkdir build
-cd build
-../configure --prefix=/opt/qemu --interp-prefix=/opt/qemu
-make
-make install
-export PATH="$PATH:/opt/qemu/bin"
-
-qemu-system-arm -S -s -no-reboot -net none -nographic -M realview-pbx-a9 -m 256M -kernel ticker.exe
-
-qemu-system-arm -S -s -no-reboot -net none -nographic -smp 2 -icount auto -M realview-pbx-a9 -m 256M -kernel ticker.exe
Index: c/src/lib/libbsp/arm/rtl22xx/README
===================================================================
--- c/src/lib/libbsp/arm/rtl22xx/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,23 +1,0 @@
-RTEMS BSP for Philips's ARM processor
-
-This BSP is designed for the following Philips' ARM microprocessors:
-
-+ LPC2210
-+ LPC2212
-+ LPC2214
-+ LPC2290
-+ LPC2294
-
-Some LPC21xx ARM should also be able to use this BSP.
-
-Philphs's LPC22xx ARM processor has an ARM7TDMI-S core, and can
-run at 60MHz. It has an external memory bus, and peripherals like
-UART, I2C, SPI, ADC and etc. Some of them have on chip flash (256k)
-and CAN.  The board used to develop the BSP is compatible with
-LPC-E2214/LPC-E2294 boards from http://www.olimex.com. The board has
-a 512K SRAM (256K used to store the .text for debugging purposes)
-and two serial ports.
-
-The license and distribution terms for this file may be found in
-the file LICENSE in this distribution or at
-http://www.rtems.org/license/LICENSE
Index: c/src/lib/libbsp/arm/smdk2410/README
===================================================================
--- c/src/lib/libbsp/arm/smdk2410/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,9 +1,0 @@
-SMDK2410 is a standard evaluation board for samsung s3c2410 ARM9 CPU
-
-This BSP was first developed by xiajiashan <ximenchuixue4016@sina.com>,
-based on gp32 Apr/2007.
-ZhiMing, Zhang <paopaoerzhang@gmail.com> fix timer defect and run
-it on skeye. Ray, Xu merged this bsp with gp32 on Apr/2008
-
-This BSP can be run on the Skyeye simulator.
-
Index: c/src/lib/libbsp/arm/stm32f4/README
===================================================================
--- c/src/lib/libbsp/arm/stm32f4/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,5 +1,0 @@
-Tested with STM32F4-Discovery evaluation board.
-
-For debugging on Linux use:
-
-https://github.com/texane/stlink
Index: c/src/lib/libbsp/arm/tms570/README
===================================================================
--- c/src/lib/libbsp/arm/tms570/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,148 +1,0 @@
-Development Board: TMS570LS31x Hercules Development Kit from TI
-
-http://www.ti.com/tool/tmds570ls31hdk
-
-Overview
---------
-
-Drivers:
-
-  o Console
-  o Clock
-  o Ethernet - external lwIP fork repository
-
-BSP variants:
-  tms570ls3137_hdk_intram - place code and data into internal SRAM
-  tms570ls3137_hdk_sdram - place code into external SDRAM and data to SRAM
-  tms570ls3137_hdk_with_loader - reserve 256kB at Flash start for loader
-                                 and place RTEMS application from address
-                                 0x00040000
-  tms570ls3137_hdk - variant for stand-alone RTEMS application stored
-                     and running directly from flash. This variant
-                     requires initialization of hardware to be integrated
-                     into RTEMS. RTEMS has to be configured with
-                       TMS570_USE_HWINIT_STARTUP=1
-                     and initialization code has to be included in the sources.
-
-Tool-chain used for development
--------------------------------
-
-  arm-rtems4.12-gcc (GCC) 6.1.1 20160526 + Newlib 2.4.0.20160527 + Binutils 2.26.20160125
-
-  CFLAGS="-O2 -pipe" LDFLAGS=-s \
-  ../../../src/gcc-6.1/configure --target=arm-rtems4.12 --prefix=/usr \
-               --enable-languages=c,c++ \
-               --disable-libstdcxx-pch \
-               --with-gnu-ld \
-               --with-gnu-as \
-               --enable-threads \
-               --enable-target-optspace \
-               --with-system-zlib \
-               --verbose \
-               --disable-nls --without-included-gettext \
-               --disable-win32-registry \
-               --with-newlib \
-               --enable-plugin \
-               --enable-newlib-io-c99-formats \
-               --enable-version-specific-runtime-libs \
-               --enable-newlib-iconv \
-               --disable-lto \
-               --disable-lto \
-               --enable-libgomp \
-               --enable-newlib-iconv \
-               --enable-newlib-iconv-encodings="iso_8859_1,utf_8" \
-
-All patches required for Cortex-R and big-endian ARM support are already
-integrated in GCC the mainline.
-
-RTEMS build configuration used for testing of self contained
-applications to run directly from Flash
-
-  ../../../src/rtems/configure  --target=arm-rtems4.12 --prefix=/opt/rtems4.12 \
-    --enable-rtems-inlines --disable-multiprocessing --enable-cxx \
-    --enable-rdbg --enable-maintainer-mode --enable-tests=samples \
-    --disable-networking --enable-posix --enable-itron --disable-ada \
-    --disable-expada --disable-multilib --disable-docs \
-    --enable-rtemsbsp="tms570ls3137_hdk" \
-    --enable-rtems-debug \
-    TMS570_USE_HWINIT_STARTUP=1
-
-Execution
----------
-
-Application build by above process can be directly programmed
-into Flash and run.
-
-For test and debug purposes, TI's HalCoGen generated application
-is used to set up the board and then the RTEMS application
-image is loaded using OpenOCD to internal EEC SRAM or external SDRAM.
-This prevents wear of Flash which has limited guaranteed
-erase cycles count.
-
-The following features are implemented in the BSP only partially:
-
- + Initial CPU and peripheral initialization
- + Cores Self-test
-
-Setup application code is available there:
-          https://github.com/hornmich/tms570ls3137-hdk-sdram
-
-TMDS570LS31HDK setup to use SDRAM to load and debug RTEMS applications
------------------------------------------------------------------------
-
-  o Program SDRAM_SCI_configuration-program or another boot loader
-    (for example ETHERNET XCP is developed)
-  o write BSP application either to sdram or intram and jump to RTEMS start code
-
-ETHERNET
---------
-
-For ETHERNET, the lwIP port for TMS570LS3137 has been developed
-at Industrial Informatics Group of Czech Technical University
-in Prague and development versions are available on SourceForge.
-
-The RTEMS and TMS570 support is included in uLAN project lwIP
-repository for now
-
-  https://sourceforge.net/p/ulan/lwip-omk/
-
-But other place should be found when RTEMS lwIP
-integration with read, write, close etc. functions
-is implemented in future.
-
-Adapt BSP for another TMS570 based hardware
--------------------------------------------
-
-When TMS570_USE_HWINIT_STARTUP=1 then quite complete
-initialization and selft-test code is included in TMS570
-BSP build. The support included in hwinit subdirectory
-provides version of bsp_start_hook_0 and bsp_start_hook_1
-which proceeds many self-tests functions, clocks, PLLs
-peripherals and other subsystems configuration.
-
-Complete pin multiplexer initialization according
-to the list of individual pins functions is included.
-Pins function definition can be found and altered
-in a file
-
- rtems/c/src/lib/libbsp/arm/tms570/hwinit/init_pinmux.c
-
-Complete "database" of all possible pin functions for
-TMS570LS3137 chip is provided in a file
-
-  rtems/c/src/lib/libbsp/arm/tms570/include/tms570ls3137zwt-pins.h
-
-If another package or chip is considered then tools found
-in next repository can be used or extended to generate header
-files and pins "database"
-
-  https://github.com/AoLaD/rtems-tms570-utils
-
-Links to additional information
--------------------------------
-
-Additional information about the BSP and board can be found at
-  https://devel.rtems.org/wiki/TBR/BSP/Tms570
-
-Additional information about the CPU can be found at
-  http://www.ti.com/product/tms570ls3137
Index: c/src/lib/libbsp/arm/xilinx-zynq/README
===================================================================
--- c/src/lib/libbsp/arm/xilinx-zynq/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,13 +1,0 @@
-Tested only on Qemu.
-
-git clone git://git.qemu.org/qemu.git qemu
-cd qemu
-git checkout 1b0d3845b454eaaac0b2064c78926ca4d739a080
-mkdir build
-cd build
-../configure --prefix=/opt/qemu --interp-prefix=/opt/qemu
-make
-make install
-export PATH="$PATH:/opt/qemu/bin"
-
-qemu-system-arm -no-reboot -serial null -serial mon:stdio -net none -nographic -M xilinx-zynq-a9 -m 256M -kernel ticker.exe
Index: c/src/lib/libbsp/bfin/TLL6527M/README
===================================================================
--- c/src/lib/libbsp/bfin/TLL6527M/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,92 +1,0 @@
-BSP NAME:           TLL6527M
-BOARD:              TLL6527M 
-CPU FAMILY:         Blackfin
-CPU:                Blackfin 527 
-MODE:               32 bit mode
-
-DEBUG MONITOR:      
-SIMULATOR:          
-
-PERIPHERALS
-===========
-TIMERS:             internal
-  RESOLUTION:         1 milisecond
-SERIAL PORTS:       2 internal UART (polled/interrupt/dma)
-REAL-TIME CLOCK:    internal
-DMA:                internal
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       internal
-TIMER DRIVER:       internal
-I2C:
-SPI:
-PPI:
-SPORT:
-
-
-STDIO
-=====
-PORT:               Console port 1
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-The TLL56527M board contains analog devices blackfin 527 processor. In addition
-to the peripherals provided by bf527 the board has a temprature sensor, 
-accelerometer and power module connected via I2C. It also has LCD interface,
-Card reader interface.
-
-The analog device bf52X family of processors are different from the bf53x range 
-of processors. This port supports the additional features that are not 
-supported by the blackfin 53X family of processors.
-  
-The TLL6527M does not use the interrupt module used by the bfin 53x since it has
-an additional system interrupt controller isr registers for additional lines.
-On the 53X these line are multiplexed. 
-The centralized interrupt handler is implemented to use lookup tables for 
-jumping to the user ISR. For more details look at files implemented under 
-libcpu/bfin/bf52x/interrupt/*
-
-This port supports only the uart peripheral. The uart is supported via 
-polling, DMA, interrupt. The uart file is generic and is common between the 
-ports. Under bsp configure.ac files 
-* change the CONSOLE_BAUDRATE or to choose among different baudrate.
-* Set UART_USE_DMA for UART to use DMA based transfers. In DMA based transfer
-  chunk of buffer is transmitted at once and then an interrupt is generated.
-* Set CONSOLE_USE_INTERRUPTS to use interrupt based transfers. After every 
-  character is transmitted an interrupt is generated. 
-* If CONSOLE_USE_INTERRUPTS, UART_USE_DMA are both not set then the port uses
-  polling to transmit data over uart. This call is blocking. 
-
-TLL6527 specific file are mentioned below.
-=====================================
-c/src/lib/libcpu/bfin/bf52x/*
-c/src/lib/libbsp/bfin/TLL6527M/*
-
-
-The port was compiled using
-===========================
-1. bfin-rtems4.11-gcc (GCC) 4.5.2 20101216 
-              (RTEMS gcc-4.5.2-3.el5/newlib-1.19.0-1.el5)
-2. automake (GNU automake) 1.11.1
-3. autoconf (GNU Autoconf) 2.68
-
-
-The port was configured using the flags
-========================================== 
---target=bfin-rtems4.11 --enable-rtemsbsp=TLL6527M --enable-tests=samples 
---disable-posix --disable-itron 
-       
-
-ISSUES:
-Could not place code in l1code (SRAM) because it was not being loaded by the 
-gnu loaded.
Index: c/src/lib/libbsp/bfin/bf537Stamp/README
===================================================================
--- c/src/lib/libbsp/bfin/bf537Stamp/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,37 +1,0 @@
-BSP NAME:           bf537Stamp
-BOARD:              ADZS-BF537-STAMP
-CPU FAMILY:         Blackfin
-CPU:                Blackfin 537 
-MODE:               32 bit mode
-
-DEBUG MONITOR:      ICEBear
-SIMULATOR:          Skyeye
-
-PERIPHERALS
-===========
-TIMERS:             internal
-  RESOLUTION:         1 milisecond
-SERIAL PORTS:       internal UART (polled/interrupt)
-REAL-TIME CLOCK:    internal
-DMA:                internal
-VIDEO:              none
-SCSI:               none
-NETWORKING:         internal
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       internal
-TIMER DRIVER:       internal
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               57600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
Index: c/src/lib/libbsp/bfin/eZKit533/README
===================================================================
--- c/src/lib/libbsp/bfin/eZKit533/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,36 +1,0 @@
-BSP NAME:           eZKit533
-BOARD:              ADSP-BF533 EzKit Lite 
-CPU FAMILY:         Blackfin
-CPU:                Blackfin 533 
-MODE:               32 bit mode
-
-DEBUG MONITOR:      ICEBear
-SIMULATOR:          Skyeye
-
-PERIPHERALS
-===========
-TIMERS:             internal
-  RESOLUTION:         1 milisecond
-SERIAL PORTS:       internal UART (polled/interrupt)
-REAL-TIME CLOCK:    internal
-DMA:                internal
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       internal
-TIMER DRIVER:       internal
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               57600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
Index: c/src/lib/libbsp/epiphany/epiphany_sim/README
===================================================================
--- c/src/lib/libbsp/epiphany/epiphany_sim/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,6 +1,0 @@
-This BSP is intended to run on epiphany-*-run simulator.
-
-From command line type:
-
-$ epiphany-rtems4.11-run -e=on --memory-region 0x8e000000,0x2000000 \
-  $PATH_TO_RTEMS_EXE
Index: c/src/lib/libbsp/i386/pc386/HOWTO
===================================================================
--- c/src/lib/libbsp/i386/pc386/HOWTO	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,396 +1,0 @@
-+-----------------------------------------------------------------------------+
-| RTEMS 4.6.0 PC386 BSP HOWTO - 2003/05/08                                    |
-|                                                                             |
-+-----------------------------------------------------------------------------+
-| (C) Copyright 1998 -                                                        |
-| - NavIST Group - Real-Time Distributed Systems and Industrial Automation    |
-|                                                                             |
-| http://pandora.ist.utl.pt                                                   |
-|                                                                             |
-| Instituto Superior Tecnico * Lisboa * PORTUGAL                              |
-+-----------------------------------------------------------------------------+
-| Disclaimer:                                                                 |
-|                                                                             |
-| This file is provided "AS IS" without warranty of any kind, either          |
-| expressed or implied.                                                       |
-+-----------------------------------------------------------------------------+
-| History:                                                                    |
-|  12 June 2000 - Updated to 4.5 (Joel)                                       |
-|   8 May  2003 - PXE GRUB (Chris Johns)                                      |
-+-----------------------------------------------------------------------------+
-
-
-1. Introduction
----------------
-
-    This tries to explain how to setup the RTEMS host environment so
-that RTEMS applications can be built for and run in a bare PC 386 or
-above.
-
-    It covers essentially the aspects of loading images, since
-information concerning other issues such as building the development
-tools and the RTEMS distribution can be found in the 'RTEMS 4.6.0
-On-Line Library' under 'Getting Started with RTEMS for C/C++ Users'.
-
-    Please note that everything in the following text using the
-notation '<...>' is just an alias to something and should always be
-substituted by the real thing!
-
-
-2. Building the GNU C/C++ Cross Compiler Toolset
-------------------------------------------------
-
-    Obtaining, building and installing the tools for building the
-PC386 BSP of RTEMS is covered in detail in the 'RTEMS 4.6.0 On-Line
-Library' -> 'Getting Started with RTEMS for C/C++ Users'.  You can
-either use pre-built toolset executables or build your own from
-the instructions given there.
-
-    This BSP is designed to work only with ELF toolset configurations.
-This is format used by the i386-rtems target.
-
-
-4. Building RTEMS
------------------
-    Obtaining, building and installing the tools for building the
-PC386 BSP is covered in detail in the 'RTEMS 4.6.0 On-Line Library' ->
-'Getting Started with RTEMS for C/C++ Users' -> 'Building RTEMS'.
-
-    When running configure, use the following values for the listed
-options with an i386-rtems toolset:
-
-          --target=i386-rtems
-          --enable-rtemsbsp=pc386
-
- 
-5. RTEMS Tests
---------------
-
-    If you've completed the last step successfully, you'll find the
-RTEMS sample and test files that can be loaded with GRUB in the
-'<build_point>/pc386/tests' directory, RTEMS sample and test files in
-a format suitable for use with NetBoot in the
-'<build_point>/pc386/BootImgs' directory.
-
-
-6. Loading RTEMS PC386 applications
------------------------------------
-
-6.1. Unarchiving
-----------------
-
-    Files which have been "tarred, gzipped" (i.e. .tar.gz or .tgz
-extension) may be unarchived with a command similar to one of the
-following:
-
-      zcat <file>.tgz | tar xvof -
-
-    OR
-
-      gunzip -c <file>.tgz | tar xvof -
-
-    OR
-
-      tar xzvf <file>.tgz
-
-    NOTE: gunzip -c is equivalent to zcat. On commercial (non-Linux)
-Unices, since the GNU utilities are not the standard 'tar' will be
-gtar (GNU tar) and 'zcat' will be 'gzcat'.
-
-    Given that the necessary utility programs are installed, any of
-the above commands will extract the contents of <file>.tar.gz into the
-current directory. To view the contents of an archive without
-restoring any files, use a command similar to the following:
-
-      zcat <file>.tgz | tar tvf -
-
-
-6.2 Using GRUB to load RTEMS PC386 applications from Floppy
------------------------------------------------------------
-
-    Using GRUB (GRand Unified Bootloader) is the simplest way to load
-and run your PC386 BSP samples, tests and programs. You will need to build GRUB
-so you need a working GCC and friends. The online documentation for GRUB lists
-what you need:
-
-    - http://www.gnu.org/manual/grub/html_node/index.html
-
-    You can get the latest release of GRUB from its homepage:
-
-    - http://www.gnu.org/software/grub/
-
-    Once you obtain the .tar.gz archive from:
-
-    - ftp://alpha.gnu.org/gnu/grub/
-
-Download the lastest version (grub-0.93.tar.gz), change to a temporary
-directory (you won't need the grub files after this and can just go ahead and
-delete the whole directory structure that was generated) and unarchive
-'grub-0.93.tar.gz' following the instructions given above in [2. Unarchiving].
-
-      $ cd /tmp
-      $ mkdir grub
-      $ cd grub
-      $ cat grub-0.93.tar.gz | gzip -d | tar xf -
-
-after this is done create a build directory and decend into it:
-
-      $ mkdir build
-      $ cd build
-
-then configure GRUB with the standard options:
-
-      $ ../grub-0.93/configure
-
-and if successful run make:
-
-      $ make
-
-    Once complete you should have the 'stage1' and 'stage2' files. They will be
-in the directories with the same name.
-
-    You should have two (2) formatted diskettes available. One of
-these will only be used temporarily to create the other one, and we'll
-refer to it as 'RAW GRUB' diskette (you can label it accordingly if
-you wish). The other diskette, which we will refer to as 'GRUB FS'
-should be high-level formatted with one of GRUB's supported file
-systems, which are: DOS FAT, BSD FFS, and Linux ext2fs.
-
-    A DOS FAT diskette can, obviously, be created under DOS with the
-'FORMAT' command. Under Linux, the following commands are available to
-add file systems to low-level formatted diskettes:
-
-    1. To add a DOS FAT file system to a low-level formatted diskette:
-
-      a) If you have mtools installed:
-
-           'mformat a:'.
-
-      b) Assuming that you are formatting the diskette in the first
-         floppy disk drive ('/dev/fd0' under Linux):
-
-           'mkdosfs /dev/fd0' or
-
-           'mkfs.msdos /dev/fd0'.
-
-    2. To add a Linux ext2fs file system to a low-level formatted
-       diskette, assuming that you are formatting the diskette in the
-       first floppy disk drive ('/dev/fd0' under Linux):
-
-         'mke2fs /dev/fd0' or
-
-         'mkfs.ext2 /dev/fd0'.
-
-   Next we will install using 'rawrite' or 'dd' to the 'GRUB RAW'
-diskette.
-
-   NOTE: This will destroy any data currently on the diskette.
-
-   Execute your OS's equivalent of (this should work for recent
-FreeBSD versions and Linux just fine):
-
-     dd if=stage1/stage1 of=/dev/fd0 bs=512 count=1
-     dd if=stage2/stage2 of=/dev/fd0 bs=512 seek=1
-
-   Under DOS/Windows/NT, courtesy of Eric Hanchrow (erich@microsoft.com):
-
-     * Use the copy /b command to binary concatenate the stage1 and
-       stage2 files together via:
-
-         copy /b stage1\stage1 stage2\stage2 grub.raw
-
-     * Use rawrite.exe (which is available in many places on the net and
-       in some Linux distributions) to write grub.raw to a diskette.
-
-(CCJ: I am not sure about the Windows location etc)
-
-   Next stage: copy the 'stage1' and 'stage2' files to the 'GRUB FS'
-diskette (if you are using Linux you can mount the diskette in an
-appropriate mount point and then 'cp' the files to it, if it is either
-a DOS FAT or an EXT2FS diskette, or in the case of a DOS FAT diskette
-you can use 'mcopy' from 'mtools'.)
-
-   After this is done boot a PC using the 'GRUB RAW' diskette. After
-this is done, you will get GRUB's command line interface. Exchange
-'GRUB RAW' with the 'GRUB FS' diskette in the drive and issue the
-following command from GRUB's prompt:
-
-     install=(fd0)/stage1 (fd0) (fd0)/stage2 0x8000 (fd0)/grubmenu
-
-   This command will make the 'GRUB FS' diskette bootable. After this
-is done, you won't require the 'GRUB RAW' diskette anymore and you can
-delete the 'stage1' file from the 'GRUB FS' diskette.
-
-   Next copy all the files you wish to load to the diskette. The GRUB
-loadable test and sample files in the RTEMS distribution have '.exe'
-extension and can be found under the build point in the 'pc386/tests'
-directory. You can compress this files with gzip to save space if you
-wish. GRUB loads 'gzipped' files transparently.
-
-   Finally you have to create a GRUB menu configuration file. We will
-call this file 'grubmenu'. You can call it anything as long as you use
-the correct name in the 'install' command where we used 'grubmenu'.
-
-   The 'grubmenu' file, as far as we are interested has the following
-syntax:
-
-     title=  Hello World Test
-     kernel= (fd0)/hello.exe.gz
-
-   You can add as many of this entries as you want to the 'grubmenu'
-file. There should be one for each program you wish to load. The
-'title=' line provides a description for the program that will appear
-after boot in the GRUB menu for the user to choose and the 'kernel='
-line describes where the file can be found by GRUB (you should leave
-the '(fd0)/' part and just substitute the rest if you've copied the
-files to the root directory of the diskette.
-
-   Just boot the PC with the 'GRUB FS' diskette and you will be able
-to choose which program you want to load from GRUB's menu.
-
-   The GRUB documentation is available in HTML format in the 'docs'
-directory of the GRUB tree starting with the 'index.html' file.
-
-
-6.3 Using GRUB to load RTEMS PC386 applications via PXE NetBoot
-----------------------------------------------------------------
-
-PXE is the Intel Preboot Execution Environment. A number of PC 
-manufactures provide a PXE option in the BIOS. This is usually a 
-Net Boot option in a BIOS configuration screen. The simplist way to 
-load an RTEMS application via PXE is to use GRUB as a first stage 
-loader.
-
-You will need to determine your network card, and have a working
-network with a DHCP (or BOOTP), and TFTP server.
-
-You may to find a TFTP server that does not support option 
-negotiations. A google search shows a number of PC's have a buggy
-PXE loader. Supressing option negotiations seems to make them
-work.
-
-You will need to build GRUB for your network card. Follow the
-procedure in item 6.2 up to the configure point. At this point
-run the following configure command:
-
-    $ ../grub-0.93/configure --enable-diskless --enable-eepro100
-
-for an Etherexpress Pro 100 network card, then run make:
-
-    $ make
-
-    Once complete you should have the 'stage2/pxegrub' file. Copy 
-this to your TFTP server's download directory. Configure your
-DHCP server to provide an IP address and download the image. For
-the ISC server found on operating systems such as Linux something
-like the following should do:
-
-  #
-  # PC loading RTEMS via PXE and GRUB
-  #
-
-  group
-  {
-    filename "/tftpboot/pxeboot";
-    host rtems-pc { hardware ethernet 00:08:c7:73:41:65; }
-  }
-
-If all works your PC should boot and load GRUB over the network:
-
-    GRUB  version 0.93  (639K lower / 64512K upper memory)
-
-  Address: 10.10.10.10
-  NetMask: 255.255.255.0
-  Server: 10.10.10.1
-  Gateway: 10.10.10.1
-
-   [ Minimal BASH-like line editing is supported.  For the first word, TAB
-     lists possible command completions.  Anywhere else TAB lists the possible
-     completions of a device/filename. ]
-
-  grub>
-
-Copy your RTEMS executable to the TFTP server directory then enter 
-the following GRUB commands:
-
-  grub> root (nd)
-    Filesystem type is tftp, using whole disk
-
-  grub> kernel ticker.exe
-     [Multiboot-elf, <0x100000:0x1e5a4:0x2b08>, shtab=0x122140, entry=0x10000c]
-
-  grub> boot
-
-The GRUB documents how to get GRUB to load a configuration file.
-
-
-6.4 Using NetBoot to load RTEMS PC386 applications
----------------------------------------------------
-
-    To load the '*.bt' files you can
-
-    Alternatively, if you have a PC connected to a network with a
-BOOTP server and a TFTP server (this can very well be you're Linux
-RTEMS host system), you can use Gero Kuhlmann's NetBoot loader, to
-load RTEMS to a diskless PC across a network. You can get it from:
-
-   ftp://sunsite.unc.edu/pub/Linux/system/boot/ethernet/netboot-0.7.3.tar.gz
-
-or in any of Sunsite's mirrors. It is also available from NetBoot's
-homepage:
-
-      http://www.han.de/~gero/netboot
-
-    After unarchiving 'netboot-0.7.3.tar.gz' you should change to the
-base directory of this and run:
-
-      ./configure --disable-mknbi-dos --disable-mknbi-linux --disable-mknbi-mgl
-
-    Afterwards, you should follow the instructions contained in the
-'INSTALL' file also contained in the base directory, on how to setup the
-server(s) and to build a boot ROM for the client PC network card, or a
-boot diskette, and the PC client should be able to load the '*.bt' files
-from the server.
-
-    The important sections to check in the 'INSTALL FILE' are the last two:
-
-    - Setup of the server (only the BOOTP and TFTP parts - ignore NFS).
-      ===================
-
-    - Setup of the client including building the bootrom
-      ==================================================
-
-all the rest can be safely ignored if you don't care to examine it.
-
- 
-7. Technical Information
-------------------------
-
-    NOTE: All the following paths are relative to the base directory
-of the RTEMS distribution.
-
-    As of the writing of this HOWTO, PC386 images can be loaded either
-in low memory 0x10000 (64KB) until 0x97C00 (607K) using NetBoot or in
-high memory from 0x100000 (1024KB) until the top of the available
-memory using either NetBoot or GRUB.
-
-    If you want to change the default loading address from 1024KB to
-something else, just change the value of the variable RELOCADDR in the
-'make/custom/pc386.cfg' file to the new value you want (make sure you
-follow the instructions indicated before the definition of RELOCADDR).
-
-    Remember that GRUB restricts the loading addresses to values above
-0x100000 (1024KB), only NetBoot can load images in low memory.
-
-    After you make any changes to RELOCADDR and if you are using
-NetLoader, you'll have to recompile the
-'c/src/lib/libbsp/i386/pc386/start/start16.s' file. The easiest way to
-achieve this is just to 'make clean' and the 'make all' again. The
-quickest way is to change to
-'<build_point>/c/src/lib/libbsp/i386/pc386/start' and 'make
-RTEMS_BSP=pc386 clean all'.
-
-    When programming interrupt handlers take into account that the PIC
-is reprogrammed and so you should use the interface functions provided
-in '<build_point>/pc386/lib/include/irq.h> to guarantee that everything
-works ok.
Index: c/src/lib/libbsp/i386/pc386/README
===================================================================
--- c/src/lib/libbsp/i386/pc386/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,75 +1,0 @@
-#
-# This board support package works with a target PC
-#
-
-This BSP supports a standard Intel/AMD PC on i386 and up CPUs. If on
-a Pentium or above, the TSC register is used for timing calibration
-purposes rather than relying entirely on the i8254.
-
-Partial support is implemented for more modern PCs which do not have
-a complete complement of legacy peripherals.
-
-Console/Printk Device Selection
-===============================
-The pc386 console device driver supports a variety of devices
-including the VGA/keyboard and a number of serial ports. The
-default console is selected based on which devices are present
-in the following order of priority:
-
-+ VGA and keyboard
-+ COM1 through COM4aaa
-
-+ Any COM devices on the PCI bus including IO and memory mapped.
-
-Beyond the dynamic probing for device presence, a combination of
-configure and boot time options are available. By default, all devices
-are enabled. The configure time options are:
-
-+ BSP_ENABLE_VGA - value of 1 to enable, 0 to disable
-+ BSP_ENABLE_COM1_COM4 - value of 1 to enable, 0 to disable
-+ BSP_USE_COM1_AS_CONSOLE - value of 1 forces console to COM1
-
-An example of using these to force the console to COM1 is:
-
-../rtems/configure --target=i386-rtems4.12 \
-  USE_COM1_AS_CONSOLE=1 --enable-rtemsbsp=pc386 \
-  ... other arguments ...
-
-The --console and --printk options can be used to specify the
-device associated with stdin, stdout, and stderr as well as
-the device associated with kernel debug IO (e.g. printk()/getk()).
-Both take the name of a device without the "/dev/" prefix.
-
-The --console argument is interpreted first and assumed to
-specify the console and kernel debug IO device. The --printk
-is then interpreted to specify the debug kernel IO device.
-For example,
-
---console=/dev/com1 --printk=/dev/vgacons
-
-specifies that com1 is to be used for stdin, stdout, and stderr
-while the VGA console is to be used for kernel debug IO.
-Note that the lower case com1 is intentional as this maps to
-the RTEMS device /dev/com1.
-
-The device name may be followed by a baud rate. The following
-example illustrates this:
-
---console=/dev/com1,19200 --printk=/dev/vgacons
-
-If the specified device is not present, then a suitable fallback
-device is selected. The fallback order is based upon the probe
-order listed earlier.
-
-PCI UART devices are /dev/pcicom1 etc as they are probed and found.
-
-GDB
-===
-
-GDB can be support using:
-
- --gdb=/dev/com1,115200  : where the device and baudrate are selectable.
- --gdb-break             : halt at a break point in the BSP and wait for GDB.
- --gdb-remote-debug      : Output the GDB remote protocol data to printk
-
-The GDB stub details and in shared/comm/GDB.HOWTO.
Index: c/src/lib/libbsp/i386/pc386/README.dec21140
===================================================================
--- c/src/lib/libbsp/i386/pc386/README.dec21140	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,1 +1,0 @@
-The dec21140 network driver is found in libchip/networking.
Index: c/src/lib/libbsp/i386/pc386/STATUS
===================================================================
--- c/src/lib/libbsp/i386/pc386/STATUS	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,21 +1,0 @@
-
-There are a wide range of PC configurations.  This BSP has been tested 
-on only a handful.  There are configurations which do not yet work.  The
-failure is suspected to be video card related.  Here is a list of
-successes and failures.
-
-SUCCESSES
-=========
-    GRUB - AMD K6 MMX 200Mhz     + S3 ViRGE
-    GRUB - 486 DX 33Mhz          + Cirrus Logic CL-GD540x/542x
-    GRUB - Pentium MMX 166Mhz    + S3 Trio 64V2
-    GRUB - Pentium (P54C) 120Mhz + S3 Trio 64V+
-    GRUB - Pentium-S 133Mhz      + S3 Trio 64V2
-
-FAILURES
-========
-    GRUB - 486 DX2 66Mhz         + Cirrus Logic CL-GD5428  - reset
-    GRUB - PII 333 Mhz           + STB Vision 128          - reset
-    GRUB - PII 300 Mhz           + Permedia                - reset
-    GRUB - Pentium 60 Mhz        + Mach 32/64              - reset
-
Index: c/src/lib/libbsp/lm32/lm32_evr/README
===================================================================
--- c/src/lib/libbsp/lm32/lm32_evr/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,49 +1,0 @@
-#  The Lattice Mico32 port uses the system_config.h generated by the Mico
-#  System Builder to retrieve the properties of the peripherals.
-#
-#   Implemented (in shared/ subdirectory)
-#     Polled console driver (uart)
-#     Clock interrupt with 10 ms tick
-#     Networking using Lattice tri-speed ethernet MAC
-#
-#   Todo
-#     Support more peripherals:
-#       - uart driver using interrupts
-#
-#  jukka.pietarinen@mrf.fi, 3.12.2008
-#    
-
-BSP NAME:           lm32_evr
-BOARD:              cRIO-EVR, Micro-Research Finland Oy
-BUS:                wishbone
-CPU FAMILY:         lm32 (Lattice Mico32)
-CPU:                small
-COPROCESSORS:       none
-MODE:               32 bit mode
-
-DEBUG MONITOR:      none
-
-PERIPHERALS
-===========
-TIMERS:             clock
-  RESOLUTION:       10 ms
-SERIAL PORTS:       uart
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         tsmac
-
-To on the simulator included in lm32-gdb use these commands:
-
-tar sim --hw-device lm32cpu \
-  --hw-device "lm32uart/reg 0x80006000 0x100" \
-  --hw-device "/lm32uart > int int0 /lm32cpu" \
-  --hw-device "lm32timer/reg 0x80002000 0x80" \
-  --hw-device "/lm32timer > int int1 /lm32cpu" \
-  --memory-region 0x08000000,0x4000000
-load
-
-The simulator is VERY VERY slow when RTEMS is idle.
-To speed this up, add SIMULATOR_FAST_IDLE=1 to the
-configure command.
Index: c/src/lib/libbsp/lm32/milkymist/Documentation/uart.txt
===================================================================
--- c/src/lib/libbsp/lm32/milkymist/Documentation/uart.txt	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,31 +1,0 @@
-Initialization : 
-
-	set the CSR_UART_DIVISOR to the correct VALUE,
-	depending on the internal frequency of the LatticeMico32 softcore.
-
-	for the ML401 board, this value is calculated using this formula : clk_frequency/230400/16
-	clk_frequency  = 100000000 Hz
-	=> we must set CSR_UART_DIVISOR to 27
-
-How to send a byte to uart : 
-
-void writechar(char c)
-{
-	        CSR_UART_RXTX = c;
-		while(!(irq_pending() & IRQ_UARTTX));
-		irq_ack(IRQ_UARTTX);
-}
-
-How to receive a byte from uart : 
-
-
-char readchar()
-{
-	char c;
-	while(!(irq_pending() & IRQ_UARTRX));
-	irq_ack(IRQ_UARTRX);
-	c = CSR_UART_RXTX;
-	return c;
-}
-
-
Index: c/src/lib/libbsp/lm32/milkymist/README
===================================================================
--- c/src/lib/libbsp/lm32/milkymist/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,16 +1,0 @@
-Full RTEMS port to the Milkymist One. Supports Milkymist SoC 1.0.x.
-
-Includes drivers for:
-- Multi-standard video input (PAL/SECAM/NTSC)
-- Two DMX512 (RS485) ports
-- MIDI IN and MIDI OUT ports
-- VGA output
-- AC'97 audio
-- NOR flash
-- 10/100 Ethernet
-- Memory card (experimental and incomplete)
-- USB host connectors (input devices only, using the softusb-input firmware)
-- RC5 infrared receiver
-- RS232 debug port
-
-For more information: http://www.milkymist.org/
Index: c/src/lib/libbsp/m32c/m32cbsp/README
===================================================================
--- c/src/lib/libbsp/m32c/m32cbsp/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,4 +1,0 @@
-This BSP is designed to operate on a variety of M16C and M32C variants.
-It is expected that this BSP will also be able to support R8C variants.
-
-It currently only runs on the M32C simulator in GDB.
Index: c/src/lib/libbsp/m68k/av5282/README
===================================================================
--- c/src/lib/libbsp/m68k/av5282/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,437 +1,0 @@
-Description: Avnet MCF5282 
-============
-CPU: MCF5282, 59MHz
-RAM: 16M
-ROM: 8M
-
-This is an evaluation board that uses the MCF5282 Coldfire CPU. It runs at about 59MHz scaled
-from a 7.372MHz crystal and is integrated with the Avnet designed AvBus. 
-
-ACKNOWLEDGEMENTS:
-=================
-This BSP is based on the work of:
-    D. Peter Siddons
-    Brett Swimley
-    Jay Monkman
-    Eric Norum
-    Mike Bertosh
-
-BSP NAME:           av5282
-BOARD:              Avnet MCF5282
-CPU FAMILY:         ColdFire 5282
-CPU:                MCF5282
-COPROCESSORS:       N/A
-
-DEBUG MONITOR:      AVMON
-
-PERIPHERALS
-===========
-TIMERS:             Four PIT (RTEMS clock is PIT3), Four Timers
-RESOLUTION:         10 microsecond 
-SERIAL PORTS:       Internal UART 1, 2 and 3
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         Internal 10/100MHz FEC
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PIT3
-IOSUPP DRIVER:      none
-SHMSUPP:            none
-TIMER DRIVER:       TIMER3
-TTY DRIVER:         UART1, 2 and 3
-
-STDIO
-=====
-PORT:               UART1 Terminal
-ELECTRICAL:         RS-232
-BAUD:               19200
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-
-      Memory map as set up by AVMON bootstrap and BSP initialization
-
-          +--------------------------------------------------+
-0000 0000 |    16 MByte SDRAM                                | 00FF FFFF
-0100 0000 |  ---------------------------------------------   |
-          |    Address space for future SDRAM expansion      |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 0FFF FFFF
-          +--------------------------------------------------+
-1000 0000 |                                                  |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 1FFF FFFF
-          +--------------------------------------------------+
-2000 0000 | 64 kByte on-chip SRAM (RAMBAR)                   |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 2FFF FFFF
-          +--------------------------------------------------+
-3000 0000 |                                                  | 30FF FFFF
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 3FFF FFFF
-          +--------------------------------------------------+
-4000 0000 | Internal peripheral system (IPSBAR)              |
-          .                                                  .
-          |                                                  |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 4FFF FFFF
-          +--------------------------------------------------+
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          +--------------------------------------------------+
-F000 0000 | 512 kByte on-chip flash (FLASHBAR)               |
-          .                                                  .
-FF80 0000 | External 8 MByte Flash memory                                                 .
-          .                                                  .
-          |                                                  | FFFF FFFF
-          +--------------------------------------------------+
-
-============================================================================
-
-      Interrupt map
-
-+-----+-----------------------------------------------------------------------+
-|     |                                PRIORITY                               |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  7  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  6  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  5  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  4  | FEC RX | FEC TX |        |        |        |        |        |   PIT  |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  2  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  1  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-
-============================================================================
-
-TIMING TESTS
-**************************
-
-
-*** TIME TEST 1 ***
-rtems_semaphore_create 28
-rtems_semaphore_delete 31
-rtems_semaphore_obtain: available 6
-rtems_semaphore_obtain: not available -- NO_WAIT 7
-rtems_semaphore_release: no waiting tasks 14
-*** END OF TEST 1 ***
-
-*** TIME TEST 2 ***
-rtems_semaphore_obtain: not available -- caller blocks 57
-*** END OF TEST 2 ***
-
-*** TIME TEST 3 ***
-rtems_semaphore_release: task readied -- preempts caller 39
-*** END OF TEST 3 ***
-
-*** TIME TEST 4 ***
-rtems_task_restart: blocked task -- preempts caller 86
-rtems_task_restart: ready task -- preempts caller 82
-rtems_semaphore_release: task readied -- returns to caller 28
-rtems_task_create 139
-rtems_task_start 32
-rtems_task_restart: suspended task -- returns to caller 42
-rtems_task_delete: suspended task 99
-rtems_task_restart: ready task -- returns to caller 44
-rtems_task_restart: blocked task -- returns to caller 59
-rtems_task_delete: blocked task 104
-*** END OF TEST 4 ***
-
-*** TIME TEST 5 ***
-rtems_task_suspend: calling task 36
-rtems_task_resume: task readied -- preempts caller 33
-*** END OF TEST 5 ***
-
-*** TIME TEST 6 ***
-rtems_task_restart: calling task 45
-rtems_task_suspend: returns to caller 12
-rtems_task_resume: task readied -- returns to caller 15
-rtems_task_delete: ready task 106
-*** END OF TEST 6 ***
-
-*** TIME TEST 7 ***
-rtems_task_restart: suspended task -- preempts caller 68
-*** END OF TEST 7 ***
-
-*** TIME TEST 9 ***
-rtems_message_queue_create 81
-rtems_message_queue_send: no waiting tasks 30
-rtems_message_queue_urgent: no waiting tasks 31
-rtems_message_queue_receive: available 30
-rtems_message_queue_flush: no messages flushed 12
-rtems_message_queue_flush: messages flushed 18
-rtems_message_queue_delete 42
-*** END OF TEST 9 ***
-
-*** TIME TEST 10 ***
-rtems_message_queue_receive: not available -- NO_WAIT 16
-rtems_message_queue_receive: not available -- caller blocks 58
-*** END OF TEST 10 ***
-
-*** TIME TEST 11 ***
-rtems_message_queue_send: task readied -- preempts caller 53
-*** END OF TEST 11 ***
-
-*** TIME TEST 12 ***
-rtems_message_queue_send: task readied -- returns to caller 35
-*** END OF TEST 12 ***
-
-*** TIME TEST 13 ***
-rtems_message_queue_urgent: task readied -- preempts caller 51
-*** END OF TEST 13 ***
-
-*** TIME TEST 14 ***
-rtems_message_queue_urgent: task readied -- returns to caller 33
-*** END OF TEST 14 ***
-
-*** TIME TEST 15 ***
-rtems_event_receive: obtain current events 0
-rtems_event_receive: not available -- NO_WAIT 9
-rtems_event_receive: not available -- caller blocks 46
-rtems_event_send: no task readied 7
-rtems_event_receive: available 13
-rtems_event_send: task readied -- returns to caller 19
-*** END OF TEST 15 ***
-
-*** TIME TEST 16 ***
-rtems_event_send: task readied -- preempts caller 35
-*** END OF TEST 16 ***
-
-*** TIME TEST 17 ***
-rtems_task_set_priority: preempts caller 56
-*** END OF TEST 17 ***
-
-*** TIME TEST 18 ***
-rtems_task_delete: calling task 124
-*** END OF TEST 18 ***
-
-*** TIME TEST 19 ***
-rtems_signal_catch 8
-rtems_signal_send: returns to caller 17
-rtems_signal_send: signal to self 29
-exit ASR overhead: returns to calling task 23
-exit ASR overhead: returns to preempting task 26
-*** END OF TEST 19 ***
-
-*** TIME TEST 20 ***
-rtems_partition_create 29
-rtems_region_create 59
-rtems_partition_get_buffer: available 15
-rtems_partition_get_buffer: not available 8
-rtems_partition_return_buffer 16
-rtems_partition_delete 14
-rtems_region_get_segment: available 38
-rtems_region_get_segment: not available -- NO_WAIT 41
-rtems_region_return_segment: no waiting tasks 42
-rtems_region_get_segment: not available -- caller blocks 80
-rtems_region_return_segment: task readied -- preempts caller 108
-rtems_region_return_segment: task readied -- returns to caller 86
-rtems_region_delete 36
-rtems_io_initialize 1
-rtems_io_open 2
-rtems_io_close 2
-rtems_io_read 1
-rtems_io_write 1
-rtems_io_control 1
-*** END OF TEST 20 ***
-
-*** TIME TEST 21 ***
-rtems_task_ident 73
-rtems_message_queue_ident 74
-rtems_semaphore_ident 85
-rtems_partition_ident 73
-rtems_region_ident 75
-rtems_port_ident 73
-rtems_timer_ident 76
-rtems_rate_monotonic_ident 72
-*** END OF TEST 21 *
-
-*** TIME TEST 22 ***
-rtems_message_queue_broadcast: task readied -- returns to caller 48
-rtems_message_queue_broadcast: no waiting tasks 18
-rtems_message_queue_broadcast: task readied -- preempts caller 58
-*** END OF TEST 22 ***
-
-*** TIME TEST 23 ***
-rtems_timer_create 10
-rtems_timer_fire_after: inactive 20
-rtems_timer_fire_after: active 24
-rtems_timer_cancel: active 8
-rtems_timer_cancel: inactive 8
-rtems_timer_reset: inactive 16
-rtems_timer_reset: active 17
-rtems_timer_fire_when: inactive 35
-rtems_timer_fire_when: active 35
-rtems_timer_delete: active 16
-rtems_timer_delete: inactive 14
-rtems_task_wake_when 53
-*** END OF TEST 23 ***
-
-*** TIME TEST 24 ***
-rtems_task_wake_after: yield -- returns to caller 5
-rtems_task_wake_after: yields -- preempts caller 30
-*** END OF TEST 24 ***
-
-*** TIME TEST 25 ***
-rtems_clock_tick 11
-*** END OF TEST 25 ***
-
-*** TIME TEST 26 ***
-_ISR_Disable 0
-_ISR_Flash 0
-_ISR_Enable 0
-_Thread_Disable_dispatch 0
-_Thread_Enable_dispatch 3
-_Thread_Set_state 12
-_Thread_Disptach (NO FP) 23
-context switch: no floating point contexts 19
-context switch: self 3
-context switch: to another task 2
-fp context switch: restore 1st FP task 19
-fp context switch: save idle, restore initialized 4
-fp context switch: save idle, restore idle 17
-fp context switch: save initialized, restore initialized 4
-_Thread_Resume 11
-_Thread_Unblock 8
-_Thread_Ready 7
-_Thread_Get 4
-_Semaphore_Get 2
-_Thread_Get: invalid id 0
-*** END OF TEST 26 ***
-
-*** TIME TEST 27 ***
-interrupt entry overhead: returns to interrupted task 5
-interrupt exit overhead: returns to interrupted task 4
-interrupt entry overhead: returns to nested interrupt 3
-interrupt exit overhead: returns to nested interrupt 3
-interrupt entry overhead: returns to preempting task 6
-interrupt exit overhead: returns to preempting task 30
-*** END OF TEST 27 ***
-
-*** TIME TEST 28 ***
-rtems_port_create 18
-rtems_port_external_to_internal 6
-rtems_port_internal_to_external 7
-rtems_port_delete 18
-*** END OF TEST 28 ***
-
-*** TIME TEST 29 ***
-rtems_rate_monotonic_create 18
-rtems_rate_monotonic_period: initiate period -- returns to caller 29
-rtems_rate_monotonic_period: obtain status 15
-rtems_rate_monotonic_cancel 19
-rtems_rate_monotonic_delete: inactive 22
-rtems_rate_monotonic_delete: active 24
-rtems_rate_monotonic_period: conclude periods -- caller blocks 36
-*** END OF TEST 29 ***
-
-*** TIME CHECKER ***
-Units may not be in microseconds for this test!!!
-0 100000
-Total time = 0
-Average time = 0
-<pause>
-NULL timer stopped at 0
-LOOP (1000) timer stopped at 225
-LOOP (10000) timer stopped at 2242
-LOOP (50000) timer stopped at 11207
-LOOP (100000) timer stopped at 22414
-*** END OF TIME CHECKER ***
-
-*** TIME TEST OVERHEAD ***
-rtems_initialize_executive 0
-rtems_shutdown_executive 0
-rtems_task_create 1
-rtems_task_ident 0
-rtems_task_start 0
-rtems_task_restart 0
-rtems_task_delete 0
-rtems_task_suspend 0
-rtems_task_resume 0
-rtems_task_set_priority 0
-rtems_task_mode 0
-rtems_task_wake_when 1
-rtems_task_wake_after 0
-rtems_interrupt_catch 0
-rtems_clock_get 1
-rtems_clock_set 1
-rtems_clock_tick 0
-<pause>
-rtems_timer_create 0
-rtems_timer_delete 0
-rtems_timer_ident 0
-rtems_timer_fire_after 0
-rtems_timer_fire_when 1
-rtems_timer_reset 0
-rtems_timer_cancel 0
-rtems_semaphore_create 1
-rtems_semaphore_delete 0
-rtems_semaphore_ident 0
-rtems_semaphore_obtain 0
-rtems_semaphore_release 0
-rtems_message_queue_create 0
-rtems_message_queue_ident 0
-rtems_message_queue_delete 0
-rtems_message_queue_send 0
-rtems_message_queue_urgent 0
-rtems_message_queue_broadcast 0
-rtems_message_queue_receive 0
-rtems_message_queue_flush 0
-<pause>
-rtems_event_send 0
-rtems_event_receive 0
-rtems_signal_catch 0
-rtems_signal_send 0
-rtems_partition_create 1
-rtems_partition_ident 0
-rtems_partition_delete 0
-rtems_partition_get_buffer 0
-rtems_partition_return_buffer 0
-rtems_region_create 1
-rtems_region_ident 0
-rtems_region_delete 0
-rtems_region_get_segment 1
-rtems_region_return_segment 0
-rtems_port_create 1
-rtems_port_ident 0
-rtems_port_delete 0
-rtems_port_external_to_internal 0
-rtems_port_internal_to_external 0
-<pause>
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-rtems_fatal_error_occurred 0
-rtems_rate_monotonic_create 0
-rtems_rate_monotonic_ident 0
-rtems_rate_monotonic_delete 0
-rtems_rate_monotonic_cancel 0
-rtems_rate_monotonic_period 0
-rtems_multiprocessing_announce 0
-*** END OF TIME OVERHEAD ***
Index: c/src/lib/libbsp/m68k/csb360/README
===================================================================
--- c/src/lib/libbsp/m68k/csb360/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,48 +1,0 @@
-#
-# README for CSB360
-#
-# Copyright (C) 2004 by Cogent Computer Systems
-# Author: Jay Monkman <jtm@lopingdog.com>
-
-BSP NAME:	    csb360
-BOARD:              Cogent CSB360 
-BUS:                none
-CPU FAMILY:         Motorola ColdFire MCF5272
-COPROCESSORS:       none
-MODE:               not applicable
-DEBUG MONITOR:      none (Hardware provides BDM)
-
-PERIPHERALS
-===========
-TIMERS:             
-  RESOLUTION:       
-SERIAL PORTS:       
-REAL-TIME CLOCK:    
-NVRAM:              
-DMA:                
-VIDEO:              
-SCSI:               
-NETWORKING:         
-I2C BUS:            
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       
-IOSUPP DRIVER:      
-SHMSUPP:            
-TIMER DRIVER:       
-I2C DRIVER:         
-
-STDIO
-=====
-PORT:               
-ELECTRICAL:         
-BAUD:               
-BITS PER CHARACTER: 
-PARITY:             
-STOP BITS:          
-
-NOTES
-=====
-
-
Index: c/src/lib/libbsp/m68k/gen68340/README
===================================================================
--- c/src/lib/libbsp/m68k/gen68340/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,82 +1,0 @@
-#
-# This package requires a version of GCC that supports the `-mcpu32' option.
-#
-
-#
-# Please send any comments, improvements, or bug reports to:
-#	Geoffroy Montel
-#	g_montel@yahoo.com
-#
-
-#
-# This board support package works both MC68340 and MC68349 systems.
-#
-# Special console features:
-# - support of polled and interrupts mode (both MC68340 and MC68349)
-# - support of FIFO FULL mode (only for MC68340, the MC68349 doesn't have any timer, so
-#   you may write your own timer driver if you have an external one)
-# 
-# The type of the board is automatically recognised in the initialization sequence.
-#
-# WARNING: there's still no network driver!
-#   I hope it will come in the next RTEMS version!
-#
-
-BSP NAME:	    gen68340
-BOARD:              Generic 68360 as described in Motorola MC68340 User's Manual
-BOARD:              Home made MC68340 board
-BOARD:		    Home made MC68349 board
-BUS:                none
-CPU FAMILY:         Motorola CPU32
-COPROCESSORS:       none
-MODE:               not applicable
-
-DEBUG MONITOR:      none (Hardware provides BDM)
-DEBUG SETUP:	    EST Vision Ice
-
-PERIPHERALS
-===========
-TIMERS:             two timers
-  RESOLUTION:       one microsecond
-SERIAL PORTS:       2 channel on the UART
-REAL-TIME CLOCK:    yes
-DMA:                yes
-VIDEO:              none
-SCSI:               none
-NETWORKING:         Ethernet on SCC1.
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       
-IOSUPP DRIVER:      
-SHMSUPP:            none
-TIMER DRIVER:       Timer 1 for timing test suites
-		    Timer 2 for console's FIFO FULL mode
-STDIO
-=====
-PORT:               1
-ELECTRICAL:         
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
-Board description
------------------
-clock rate:	25 MHz
-bus width:	16-bit PROM, 32-bit DRAM
-ROM:		To 1 MByte, 60 nsec (0 wait states), chip select 0
-RAM:		1 to 16 MByte DRAM SIMM, 60 nsec (0 wait states), parity or nonparity
-
-Host System
------------
-Cygwin 32
-
-Verification (Standalone 68360)
--------------------------------
-Single processor tests:  Passed
-Multi-processor tests:  not applicable
-
Index: c/src/lib/libbsp/m68k/gen68360/README
===================================================================
--- c/src/lib/libbsp/m68k/gen68360/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,299 +1,0 @@
-#
-# This package requires a version of GCC that supports the `-mcpu32' option.
-#
-
-#
-# Please send any comments, improvements, or bug reports to:
-#	W. Eric Norum
-#	Deparment of Electrical Engineering
-#	53 Campus Driver
-#	University of Saskatchewan
-#	Saskatoon, Saskatchewan, CANADA
-#	S7N 5A9
-# eric.norum@usask.ca
-#
-
-#
-# This board support package works with several different versions of
-# MC68360 systems.  See the conditional-compile tests in startup/init68360.c
-# for examples.
-#
-# Decisions made at compile time include:
-#	- If the CPU is a member of the 68040 family, the BSP is
-#	  compiled for a generic 68040/68360 system as described
-#	  in Chapter 9 of the MC68360 User's Manual.  This version
-#	  can be used with the Arnewsh SBC360 card.
-#	- If the preprocessor symbol M68360_ATLAS_HSB is defined,
-#	  the BSP is compiled for an Atlas HSB card.
-#	- If the preprocessor symbol M68360_IMD_PGH is defined,
-#	  the BSP is compiled for an IMD PGH360 card.
-#	- Otherwise, the BSP is compiled for a generic 68360 system
-#	  as described in Chapter 9 of the MC68360 User's Manual.  This
-#	  version works with the Atlas ACE360 card.
-#
-
-BSP NAME:	    gen68360 or gen68360_040
-BOARD:              Generic 68360 as described in Motorola MC68360 User's Manual
-BOARD:              Atlas Computer Equipment Inc. High Speed Bridge (HSB)
-BOARD:              Atlas Computer Equipment Inc. Advanced Communication Engine (ACE)
-BOARD:              Arnewsh SBC360 68040/68360 card
-BOARD:              IMD PGH Board (custom)
-BUS:                none
-CPU FAMILY:         Motorola CPU32+, Motorola 68040
-COPROCESSORS:       none
-MODE:               not applicable
-
-DEBUG MONITOR:      none (Hardware provides BDM)
-
-PERIPHERALS
-===========
-TIMERS:             PIT, Watchdog, 4 general purpose, 16 RISC
-  RESOLUTION:       one microsecond
-SERIAL PORTS:       4 SCC, 2 SMC, 1 SPI
-REAL-TIME CLOCK:
-DMA:                Each serial port, 2 general purpose
-VIDEO:              none
-SCSI:               none
-NETWORKING:         Ethernet on SCC1.
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       Programmable Interval Timer
-IOSUPP DRIVER:      Serial Management Controller 1
-SHMSUPP:            none
-TIMER DRIVER:       Timer 1
-
-STDIO
-=====
-PORT:               SMC1
-ELECTRICAL:         EIA-232 (if board supplies level shifter)
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
-Board description
------------------
-clock rate:	25 MHz
-bus width:	8-bit PROM/FLASH, 32-bit DRAM
-ROM:		To 1 MByte, 180 nsec (3 wait states), chip select 0
-RAM:		4 or 16 MBytes of 60 nsec parity DRAM (1Mx36) to RAS1*/CAS1*
-
-Board description (IMD PGH)
----------------------------
-clock rate:	25 MHz
-bus width:	8-bit PROM/FLASH, 32-bit DRAM
-ROM:		512KByte, 180 nsec (3 wait states), chip select 0
-RAM:		16 MBytes of 60 nsec no-parity DRAM (1Mx32) to RAS1*/CAS1*
-
-Host System
------------
-OPENSTEP 4.2 (Intel and Motorola), Solaris 2.5, Linux 2.0.29
-
-Verification (Standalone 68360)
--------------------------------
-Single processor tests:  Passed
-Multi-processort tests:  not applicable
-Timing tests:
-	Context Switch
-	
-	context switch: self 10
-	context switch: to another task 11
-	context switch: no floating point contexts 38
-	fp context switch: restore 1st FP task 39
-	fp context switch: save initialized, restore initialized 14
-	fp context switch: save idle, restore initialized 15
-	fp context switch: save idle, restore idle 41
-	
-	Task Manager
-	
-	rtems_task_create 202
-	rtems_task_ident 390
-	rtems_task_start 71
-	rtems_task_restart: calling task 99
-	rtems_task_restart: suspended task -- returns to caller 86
-	rtems_task_restart: blocked task -- returns to caller 116
-	rtems_task_restart: ready task -- returns to caller 88
-	rtems_task_restart: suspended task -- preempts caller 132
-	rtems_task_restart: blocked task -- preempts caller 153
-	rtems_task_restart: ready task -- preempts caller 149
-	rtems_task_delete: calling task 236
-	rtems_task_delete: suspended task 191
-	rtems_task_delete: blocked task 195
-	rtems_task_delete: ready task 198
-	rtems_task_suspend: calling task 78
-	rtems_task_suspend: returns to caller 36
-	rtems_task_resume: task readied -- returns to caller 39
-	rtems_task_resume: task readied -- preempts caller 67
-	rtems_task_set_priority: obtain current priority 26
-	rtems_task_set_priority: returns to caller 59
-	rtems_task_set_priority: preempts caller 110
-	rtems_task_mode: obtain current mode 13
-	rtems_task_mode: no reschedule 15
-	rtems_task_mode: reschedule -- returns to caller 20
-	rtems_task_mode: reschedule -- preempts caller 67
-	rtems_task_wake_after: yield -- returns to caller 16
-	rtems_task_wake_after: yields -- preempts caller 65
-	rtems_task_wake_when 116
-	
-	Interrupt Manager
-	
-	interrupt entry overhead: returns to nested interrupt 10
-	interrupt entry overhead: returns to interrupted task 10
-	interrupt entry overhead: returns to preempting task 10
-	interrupt exit overhead: returns to nested interrupt 8
-	interrupt exit overhead: returns to interrupted task 10
-	interrupt exit overhead: returns to preempting task 59
-	
-	Clock Manager
-	
-	rtems_clock_set 73
-	rtems_clock_get 1
-	rtems_clock_tick 16
-	
-	Timer Manager
-	
-	rtems_timer_create 31
-	rtems_timer_ident 380
-	rtems_timer_delete: inactive 43
-	rtems_timer_delete: active 46
-	rtems_timer_fire_after: inactive 53
-	rtems_timer_fire_after: active 56
-	rtems_timer_fire_when: inactive 72
-	rtems_timer_fire_when: active 72
-	rtems_timer_reset: inactive 47
-	rtems_timer_reset: active 51
-	rtems_timer_cancel: inactive 25
-	rtems_timer_cancel: active 28
-	
-	Semaphore Manager
-	
-	rtems_semaphore_create 59
-	rtems_semaphore_ident 438
-	rtems_semaphore_delete 57
-	rtems_semaphore_obtain: available 31
-	rtems_semaphore_obtain: not available -- NO_WAIT 31
-	rtems_semaphore_obtain: not available -- caller blocks 108
-	rtems_semaphore_release: no waiting tasks 40
-	rtems_semaphore_release: task readied -- returns to caller 56
-	rtems_semaphore_release: task readied -- preempts caller 83
-	
-	Message Queue Manager
-	
-	rtems_message_queue_create 241
-	rtems_message_queue_ident 379
-	rtems_message_queue_delete 75
-	rtems_message_queue_send: no waiting tasks 72
-	rtems_message_queue_send: task readied -- returns to caller 72
-	rtems_message_queue_send: task readied -- preempts caller 99
-	rtems_message_queue_urgent: no waiting tasks 72
-	rtems_message_queue_urgent: task readied -- returns to caller 72
-	rtems_message_queue_urgent: task readied -- preempts caller 99
-	rtems_message_queue_broadcast: no waiting tasks 43
-	rtems_message_queue_broadcast: task readied -- returns to caller 82
-	rtems_message_queue_broadcast: task readied -- preempts caller 109
-	rtems_message_queue_receive: available 52
-	rtems_message_queue_receive: not available -- NO_WAIT 34
-	rtems_message_queue_receive: not available -- caller blocks 111
-	rtems_message_queue_flush: no messages flushed 25
-	rtems_message_queue_flush: messages flushed 34
-	
-	Event Manager
-	
-	rtems_event_send: no task readied 22
-	rtems_event_send: task readied -- returns to caller 50
-	rtems_event_send: task readied -- preempts caller 80
-	rtems_event_receive: obtain current events -1
-	rtems_event_receive: available 26
-	rtems_event_receive: not available -- NO_WAIT 22
-	rtems_event_receive: not available -- caller blocks 89
-	
-	Signal Manager
-	
-	rtems_signal_catch 16
-	rtems_signal_send: returns to caller 32
-	rtems_signal_send: signal to self 51
-	exit ASR overhead: returns to calling task 42
-	exit ASR overhead: returns to preempting task 58
-	
-	Partition Manager
-	
-	rtems_partition_create 74
-	rtems_partition_ident 379
-	rtems_partition_delete 40
-	rtems_partition_get_buffer: available 29
-	rtems_partition_get_buffer: not available 27
-	rtems_partition_return_buffer 34
-	
-	Region Manager
-	
-	rtems_region_create 63
-	rtems_region_ident 388
-	rtems_region_delete 40
-	rtems_region_get_segment: available 43
-	rtems_region_get_segment: not available -- NO_WAIT 40
-	rtems_region_get_segment: not available -- caller blocks 120
-	rtems_region_return_segment: no waiting tasks 48
-	rtems_region_return_segment: task readied -- returns to caller 98
-	rtems_region_return_segment: task readied -- preempts caller 125
-	
-	Dual-Ported Memory Manager
-	
-	rtems_port_create 38
-	rtems_port_ident 380
-	rtems_port_delete 40
-	rtems_port_internal_to_external 22
-	rtems_port_external_to_internal 22
-	
-	IO Manager
-	
-	rtems_io_initialize 4
-	rtems_io_open 1
-	rtems_io_close 1
-	rtems_io_read 1
-	rtems_io_write 1
-	rtems_io_control 1
-	
-	Rate Monotonic Manager
-	
-	rtems_rate_monotonic_create 36
-	rtems_rate_monotonic_ident 380
-	rtems_rate_monotonic_cancel 34
-	rtems_rate_monotonic_delete: active 51
-	rtems_rate_monotonic_delete: inactive 47
-	rtems_rate_monotonic_period: obtain status 27
-	rtems_rate_monotonic_period: initiate period -- returns to caller 50
-	rtems_rate_monotonic_period: conclude periods -- caller blocks 72
-
-Network tests:
-       TCP throughput (as measured by ttcp):
-               Receive: 1081 kbytes/sec
-               Transmit: 953 kbytes/sec
-
-Porting
--------
-This board support package is written for a 68360 system similar to that
-described in chapter 9 of the Motorola MC68360 Quad Integrated Communication
-Processor Users' Manual.  The salient features of this hardware are:
-
-	25 MHz external clock
-	DRAM address multiplexing provided by 68360
-	8-bit 180nsec PROM to CS0*
-	4 MBytes of 60 nsec parity DRAM (1Mx36) to RAS1*/CAS1*
-	Console serial port on SMC1
-	Ethernet interface on SCC1
-
-The board support package has been tested with:
-	A home-built 68360 board
-	An ACE360A and an HSB board produced by:
-		Atlas Computer Equipment
-		703 Colina Lane
-		Santa Barbara, CA 93103
-	A 68040/68360 board (SBC360) produced by:
-		Arnewsh Inc.
-		P.O. Box 270352
-		Fort Collins, CO 80527-0352
-	A custom 68360 board (PGH360) produced by IMD
Index: c/src/lib/libbsp/m68k/genmcf548x/README
===================================================================
--- c/src/lib/libbsp/m68k/genmcf548x/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,229 +1,0 @@
-/*===============================================================*\
-| Project: RTEMS generic mcf548x BSP                              |
-+-----------------------------------------------------------------+
-| File: README                                                    |
-+-----------------------------------------------------------------+
-| This is the README for the  generic MCF548x BSP.                |
-+-----------------------------------------------------------------+
-|                    Copyright (c) 2007                           |
-|                    Embedded Brains GmbH                         |
-|                    Obere Lagerstr. 30                           |
-|                    D-82178 Puchheim                             |
-|                    Germany                                      |
-|                    rtems@embedded-brains.de                     |
-+-----------------------------------------------------------------+
-|                                                                 |
-| Parts of the code has been derived from the "dBUG source code"  |
-| package Freescale is providing for M548X EVBs. The usage of     |
-| the modified or unmodified code and it's integration into the   |
-| generic mcf548x BSP has been done according to the Freescale    |
-| license terms.                                                  |
-|                                                                 |
-| The Freescale license terms can be reviewed in the file         |
-|                                                                 |
-|    Freescale_license.txt                                        |
-|                                                                 |
-+-----------------------------------------------------------------+
-|                                                                 |
-| The generic mcf548x BSP has been developed on the basic         |
-| structures and modules of the av5282 BSP.                       |
-|                                                                 |
-+-----------------------------------------------------------------+
-|                                                                 |
-| The license and distribution terms for this file may be         |
-| found in the file LICENSE in this distribution or at            |
-|                                                                 |
-| http://www.rtems.org/license/LICENSE.                           |
-|                                                                 |
-+-----------------------------------------------------------------+
-|                                                                 |
-|   date                      history                        ID   |
-| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
-| 12.11.07                    1.0                            ras  |
-|                                                                 |
-\*===============================================================*/
-
-
-Description: Generic mcf548x BSP
-
-The genmcf548x supports several boards based on the Freescale MCF547x/8x
-ColdFire microcontrollers
-
-Supported Hardware: mcf5484FireEngine
-=============================
-CPU:         MCF548x, 200MHz
-XLB:         100 MHz, which is the main clock for all onchip peripherals
-RAM:         64M (m5484FireEngine)
-Boot-Flash:  2M (m5484FireEngine)
-Code-Flash:  16M (m5484FireEngine)
-Core-SRAM:   8K
-Core-SysRAM: 32K
-Boot-Monitor:None
-
-Supported Hardware: COBRA5475
-=============================
-CPU:         MCF5475, 266MHz
-XLB:         132 MHz, which is the main clock for all onchip peripherals
-RAM:         128M 
-Boot-Flash:  32M 
-Core-SRAM:   8K
-Core-SysRAM: 32K
-Boot-Monitor:DBug
-
-
-ACKNOWLEDGEMENTS:
-=================
-This BSP is based on the 
-
-  av5282 BSP
-
-and the work of
-
-  D. Peter Siddons
-  Brett Swimley
-  Jay Monkman
-  Eric Norum
-  Mike Bertosh
-
-BSP INFO:
-=========
-BSP NAME:           genmcf548x
-BOARD:              various MCF547x/8x based boards
-CPU FAMILY:         ColdFire 548x
-CPU:                MCF5475/MCF5484
-FPU:                MCF548x FPU, context switch supported by RTEMS multitasking
-EMAC:               MCF548x EMAC context switch supported by RTEMS multitasking (handeld together with FPU context)
-
-PERIPHERALS
-===========
-TIMERS:             2 slice timers, 4 general purpose timers  (SLT0 is used for RTEMS clock, SLT1 is used for diagnostic pupose)
-RESOLUTION:         System tick 10 millieconds (via SLT0) 
-SERIAL PORTS:       Internal PSC 0-3
-NETWORKING:         Internal 10/100MHz FEC on two channels
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       SLT0
-TIMER DRIVER:       SLT1 (diagnostics)
-TTY DRIVER:         PSC0-3
-
-STDIO
-=====
-PORT:               PSC0 (UART mode) terminal
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-MODES:              Interrupt driven (polled mode alternatively)
-
-
-----------------------------------------------------------------------
-
-      Memory map of m5484FireEngine as set up by BSP initialization:
-
-          +--------------------------------------------------+
-0000 0000 |    64 MByte SDRAM (external)                     | 03FF FFFF
-          .                                                  .
-          .                                                  .
-          .                                                  .
- 
-          
-m5484FireEngine:
-          
-          
-          |                                                  | 0FFF FFFF
-          +--------------------------------------------------+
-1000 0000 |    internal per. registers via MBAR              | 1003 FFFF
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 
-          +--------------------------------------------------+
-2000 0000 |    8K core SRAM (internal)                       | 2000 1FFF
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          
-m5484FireEngine:
-
-          |                                                  | 
-          +--------------------------------------------------+
-E000 0000 |    16M code flash (external)                     | E0FF FFFF
-          .                                                  .
-	  .                                                  .
-          .                                                  .
-          |                                                  | 
-          +--------------------------------------------------+          
-FF80 0000 | External 8 MByte Flash memory                    | FF9F FFFF
-          .                                                  .
-	  .                                                  .
-          .                                                  .          
-          |                                                  | FFFF FFFF
-          +--------------------------------------------------+
-
-
-----------------------------------------------------------------------
-
-      Memory map for COBRA5475 as set up by DBug:
-
-          +--------------------------------------------------+
-F000 0000 |   128 MByte SDRAM (external)                     |
-          .                                                  .
-          .   (first 256KByte reserved for DBug)             .
-          .                                                  . F03F FFFF
-F040 0000 |                                                  |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | F7FF FFFF
-          +--------------------------------------------------+
-FC00 0000 |    32M code flash (external)                     |
-          .                                                  .
-	  .                                                  .
-          .                                                  .
-          |                                                  | FDFF FFFF 
-          +--------------------------------------------------+          
-FE00 0000 |    internal per. registers via MBAR              |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | FE03 FFFF 
-          +--------------------------------------------------+
-FF00 0000 |    8K core SRAM (internal)                       |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | FF00 1FFF 
-          +--------------------------------------------------+
-
-============================================================================
-
-      Interrupt map
-
-+-----+-----------------------------------------------------------------------+
-|     |                                PRIORITY                               |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  7  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  6  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  5  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  4  |        |        |        |        |        |        |        |  SLT0  |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  3  | PSC 0  | PSC 1  | PSC 2  | PSC 3  |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  2  |        |        |        |        | FEC0/1 | MCDMA  |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  1  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-
-============================================================================
-
-TIMING TESTS
-**************************
-
-tbd.
Index: c/src/lib/libbsp/m68k/mcf5206elite/README
===================================================================
--- c/src/lib/libbsp/m68k/mcf5206elite/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,101 +1,0 @@
-#
-# README for MCF5206eLITE Board Support Package
-#
-# Copyright (C) 2000,2001 OKTET Ltd., St.-Petersburg, Russia
-# Author: Victor V. Vengerov <vvv@oktet.ru>
-#
-# The license and distribution terms for this file may be
-# found in the file LICENSE in this distribution or at
-# http://www.rtems.org/license/LICENSE.
-
-#
-# This board support package works with MCF5206eLITE evaluation board with
-# Motorola Coldfire MCF5206e CPU.
-#
-# Many thanks to Balanced Audio Technology (http://www.balanced.com),
-# company which donates MCF5206eLITE evaluation board, P&E Coldfire BDM 
-# interface and provides support for development of this BSP and generic
-# MCF5206 CPU code.
-#
-# Decisions made at compile time include:
-#
-# Decisions to be made a link-edit time are:
-#     - The size of memory allocator heap. By default, all available
-#       memory allocated for the heap. To specify amount of memory
-#       available for heap:
-#       LDFLAGS += -Wl,--defsym -Wl,HeapSize=xxx
-#
-#     - The frequency of system clock oscillator. By default, this frequency
-#       is 54MHz. To select other clock frequency for your application, put
-#       line like this in application Makefile: 
-#       LDFLAGS += -qclock=40000000
-#
-#     - Select between RAM or ROM images. By default, RAM image generated
-#       which may be loaded starting from address 0x30000000 to the RAM.
-#       To prepare image intended to be stored in ROM, put the following
-#       line to the application Makefile:
-#       LDFLAGS += -qflash
-#
-#       You may select other memory configuration providing your own
-#       linker script.
-#
-
-BSP NAME:	    mcf5206elite
-BOARD:              MCF5206eLITE Evaluation Board
-BUS:                none
-CPU FAMILY:         Motorola ColdFire
-COPROCESSORS:       none
-MODE:               not applicable
-DEBUG MONITOR:      none (Hardware provides BDM)
-
-PERIPHERALS
-===========
-TIMERS:             PIT, Watchdog(disabled)
-  RESOLUTION:       one microsecond
-SERIAL PORTS:       2 UART
-REAL-TIME CLOCK:    DS1307
-NVRAM:              DS1307
-DMA:                2 general purpose
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-I2C BUS:            MCF5206e MBUS module
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       Programmable Interval Timer
-IOSUPP DRIVER:      UART 1
-SHMSUPP:            none
-TIMER DRIVER:       yes
-I2C DRIVER:         yes
-
-STDIO
-=====
-PORT:               UART 1
-ELECTRICAL:         EIA-232
-BAUD:               19200
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
-Board description
------------------
-clock rate:	54 MHz default (other oscillator can be installed)
-bus width:	16-bit PROM, 32-bit external SRAM
-ROM:		Flash memory device AM29LV800BB, 1 MByte, 3 wait states, 
-                chip select 0
-RAM:            Static RAM 2xMCM69F737TQ, 1 MByte, 1 wait state, chip select 2
-
-Host System
------------
-RedHat 6.2 (Linux 2.2.14), RedHat 7.0 (Linux 2.2.17)
-
-Verification
-------------
-Single processor tests:  passed
-Multi-processort tests:  not applicable
-Timing tests: passed
-
Index: c/src/lib/libbsp/m68k/mcf52235/README
===================================================================
--- c/src/lib/libbsp/m68k/mcf52235/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,153 +1,0 @@
-Description: Motorola MCF52235EVB
-============================================================================
-CPU: MCF52235, 60MHz
-SRAM: 32K
-FLASH: 256K
-
-This is a Motorola evaluation board that uses the MCF52235 Coldfire CPU. 
-This board is running at 60MHz scaled from a 25MHz oscillator.
-
-============================================================================
-NOTES:
-
-Currently this BSP must be configured with most RTEMS features turned
-off as RAM usage is too high.
-
-Configure as follows:
-configure --target=m68k-rtems4.XXX --enable-rtemsbsp=mcf52235 \
-
-To get the tests to compile (but not run) change the linkcmds to specify
-a larger sram memory region (256K works).  This of course will let you 
-compile all tests, but many or most of them wont run.
-
-See testsuites/samples/minumum for an example of what type of config flags
-you need for this BSP!
-
-In you project before you include confdefs.h, define some or all of the
-following:
-
-#define CONFIGURE_INIT_TASK_STACK_SIZE x
-#define CONFIGURE_MINIMUM_TASK_STACK_SIZE x
-#define CONFIGURE_INTERRUPT_STACK_SIZE x
-
-Note that the default stack size is 1K
-Note that the default number of priorities is 15
-
-============================================================================
-TODO:
-
-*) Add drivers for I2C, ADC, FEC
-*) Support for LWIP
-*) Update the coverhd.h (calling overheads) page 21 of the BSP guide
-*) Recover the 1K stack space reserved in linkcmds used for board startup.
-
-============================================================================
-
-      Interrupt map
-
-+-----+-----------------------------------------------------------------------+
-|     |                                PRIORITY                               |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  7  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  6  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  5  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  4  |        |        |        |        |        |        |        |   PIT  |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  2  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  1  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+ 
-
-============================================================================
-
-*** TIME TEST 1 ***
-rtems_semaphore_create 8
-rtems_semaphore_delete 10
-rtems_semaphore_obtain: available 3
-rtems_semaphore_obtain: not available -- NO_WAIT 3
-rtems_semaphore_release: no waiting tasks 7
-*** END OF TEST 1 ***
-
-
-*** TIME TEST OVERHEAD ***
-rtems_shutdown_executive 0
-rtems_task_create 0
-rtems_task_ident 0
-rtems_task_start 0
-rtems_task_restart 0
-rtems_task_delete 0
-rtems_task_suspend 0
-rtems_task_resume 0
-rtems_task_set_priority 0
-rtems_task_mode 0
-rtems_task_wake_when 0
-rtems_task_wake_after 0
-rtems_interrupt_catch 0
-rtems_clock_get 0
-rtems_clock_set 0
-rtems_clock_tick 0
-<pause>
-rtems_timer_create 0
-rtems_timer_delete 0
-rtems_timer_ident 0
-rtems_timer_fire_after 0
-rtems_timer_fire_when 1
-rtems_timer_reset 0
-rtems_timer_cancel 0
-rtems_semaphore_create 0
-rtems_semaphore_delete 0
-rtems_semaphore_ident 0
-rtems_semaphore_obtain 0
-rtems_semaphore_release 0
-rtems_message_queue_create 0
-rtems_message_queue_ident 0
-rtems_message_queue_delete 0
-rtems_message_queue_send 0
-rtems_message_queue_urgent 0
-rtems_message_queue_broadcast 0
-rtems_message_queue_receive 0
-rtems_message_queue_flush 0
-<pause>
-rtems_event_send 0
-rtems_event_receive 0
-rtems_signal_catch 0
-rtems_signal_send 0
-rtems_partition_create 0
-rtems_partition_ident 0
-rtems_partition_delete 0
-rtems_partition_get_buffer 0
-rtems_partition_return_buffer 0
-rtems_region_create 0
-rtems_region_ident 0
-rtems_region_delete 0
-rtems_region_get_segment 0
-rtems_region_return_segment 0
-rtems_port_create 0
-rtems_port_ident 0
-rtems_port_delete 0
-rtems_port_external_to_internal 0
-rtems_port_internal_to_external 0
-<pause>
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-rtems_fatal_error_occurred 0
-rtems_rate_monotonic_create 0
-rtems_rate_monotonic_ident 0
-rtems_rate_monotonic_delete 0
-rtems_rate_monotonic_cancel 0
-rtems_rate_monotonic_period 0
-rtems_multiprocessing_announce 0
-*** END OF TIME OVERHEAD ***
-
-
Index: c/src/lib/libbsp/m68k/mcf52235/gdb-init
===================================================================
--- c/src/lib/libbsp/m68k/mcf52235/gdb-init	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,48 +1,0 @@
-#
-# Show the exception stack frame.
-#
-define show-exception-sframe
- set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
- set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
- set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
- set $frcode = $frfvo >> 12
- set $frvect = ($frfvo & 0xFFF) >> 2
- set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
- printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
- if $frstatus == 4
-  printf " Fault Type: Error on instruction fetch"
- end
- if $frstatus == 8
-  printf " Fault Type: Error on operand write"
- end
- if $frstatus == 12
-  printf " Fault Type: Error on operand read"
- end
- if $frstatus == 9
-  printf " Fault Type: Attempted write to write-protected space"
- end
-end
-
-# Add -v and -d flags for bdm info
-# Add -B flags to utilize hardware breakpoints when they are availiable
-
-#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
-target remote | m68k-bdm-gdbserver pipe /dev/tblcf2 -B
-#monitor set remote-debug 1
-
-monitor bdm-reset
-
-# Set VBR to the beginning of what will be SRAM
-monitor bdm-ctl-set 0x0801 0x20000000
-
-# Set RAMBAR1
-monitor bdm-ctl-set 0x0C05 0x20000021
-
-# Set FLASHBAR
-monitor bdm-ctl-set 0x0C04 0x00000061
-
-# Enable PST[3:0] signals
-set *((char*) 0x40100074) = 0x0F
-
-# Add the load when debugging from ram which won't happen with rtems!
-#load
Index: c/src/lib/libbsp/m68k/mcf5225x/README
===================================================================
--- c/src/lib/libbsp/m68k/mcf5225x/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,156 +1,0 @@
-Description: embed-it dpu
-============================================================================
-CPU: MCF52259, ??MHz
-SRAM: 64K
-FLASH: 512K
-
-This is a embed-it board that uses the MCF52258 Coldfire CPU. 
-This board is running at ??MHz scaled from the internal relocation 8MHz oscillator.
-
-
-
-OLD-STUFF from MCF52235 EVB ... we have to change it ...
-============================================================================
-NOTES:
-
-Currently this BSP must be configured with most RTEMS features turned
-off as RAM usage is too high.
-
-Configure as follows:
-configure --target=m68k-rtems4.XXX --enable-rtemsbsp=mcf52235 ...
-
-To get the tests to compile (but not run) change the linkcmds to specify
-a larger sram memory region (256K works).  This of course will let you 
-compile all tests, but many or most of them wont run.
-
-See testsuites/samples/minumum for an example of what type of config flags
-you need for this BSP!
-
-In you project before you include confdefs.h, define some or all of the
-following:
-
-#define CONFIGURE_INIT_TASK_STACK_SIZE x
-#define CONFIGURE_MINIMUM_TASK_STACK_SIZE x
-#define CONFIGURE_INTERRUPT_STACK_SIZE x
-
-Note that the default stack size is 1K
-Note that the default number of priorities is 15
-
-============================================================================
-TODO:
-
-*) Add drivers for I2C, ADC, FEC
-*) Support for LWIP
-*) Update the coverhd.h (calling overheads) page 21 of the BSP guide
-*) Recover the 1K stack space reserved in linkcmds used for board startup.
-
-============================================================================
-
-      Interrupt map
-
-+-----+-----------------------------------------------------------------------+
-|     |                                PRIORITY                               |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  7  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  6  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  5  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  4  |        |        |        |        |        |        |        |   PIT  |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  2  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  1  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+ 
-
-============================================================================
-
-*** TIME TEST 1 ***
-rtems_semaphore_create 8
-rtems_semaphore_delete 10
-rtems_semaphore_obtain: available 3
-rtems_semaphore_obtain: not available -- NO_WAIT 3
-rtems_semaphore_release: no waiting tasks 7
-*** END OF TEST 1 ***
-
-
-*** TIME TEST OVERHEAD ***
-rtems_shutdown_executive 0
-rtems_task_create 0
-rtems_task_ident 0
-rtems_task_start 0
-rtems_task_restart 0
-rtems_task_delete 0
-rtems_task_suspend 0
-rtems_task_resume 0
-rtems_task_set_priority 0
-rtems_task_mode 0
-rtems_task_wake_when 0
-rtems_task_wake_after 0
-rtems_interrupt_catch 0
-rtems_clock_get 0
-rtems_clock_set 0
-rtems_clock_tick 0
-<pause>
-rtems_timer_create 0
-rtems_timer_delete 0
-rtems_timer_ident 0
-rtems_timer_fire_after 0
-rtems_timer_fire_when 1
-rtems_timer_reset 0
-rtems_timer_cancel 0
-rtems_semaphore_create 0
-rtems_semaphore_delete 0
-rtems_semaphore_ident 0
-rtems_semaphore_obtain 0
-rtems_semaphore_release 0
-rtems_message_queue_create 0
-rtems_message_queue_ident 0
-rtems_message_queue_delete 0
-rtems_message_queue_send 0
-rtems_message_queue_urgent 0
-rtems_message_queue_broadcast 0
-rtems_message_queue_receive 0
-rtems_message_queue_flush 0
-<pause>
-rtems_event_send 0
-rtems_event_receive 0
-rtems_signal_catch 0
-rtems_signal_send 0
-rtems_partition_create 0
-rtems_partition_ident 0
-rtems_partition_delete 0
-rtems_partition_get_buffer 0
-rtems_partition_return_buffer 0
-rtems_region_create 0
-rtems_region_ident 0
-rtems_region_delete 0
-rtems_region_get_segment 0
-rtems_region_return_segment 0
-rtems_port_create 0
-rtems_port_ident 0
-rtems_port_delete 0
-rtems_port_external_to_internal 0
-rtems_port_internal_to_external 0
-<pause>
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-rtems_fatal_error_occurred 0
-rtems_rate_monotonic_create 0
-rtems_rate_monotonic_ident 0
-rtems_rate_monotonic_delete 0
-rtems_rate_monotonic_cancel 0
-rtems_rate_monotonic_period 0
-rtems_multiprocessing_announce 0
-*** END OF TIME OVERHEAD ***
-
-
Index: c/src/lib/libbsp/m68k/mcf5225x/gdb-init
===================================================================
--- c/src/lib/libbsp/m68k/mcf5225x/gdb-init	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,48 +1,0 @@
-#
-# Show the exception stack frame.
-#
-define show-exception-sframe
- set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
- set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
- set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
- set $frcode = $frfvo >> 12
- set $frvect = ($frfvo & 0xFFF) >> 2
- set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
- printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
- if $frstatus == 4
-  printf " Fault Type: Error on instruction fetch"
- end
- if $frstatus == 8
-  printf " Fault Type: Error on operand write"
- end
- if $frstatus == 12
-  printf " Fault Type: Error on operand read"
- end
- if $frstatus == 9
-  printf " Fault Type: Attempted write to write-protected space"
- end
-end
-
-# Add -v and -d flags for bdm info
-# Add -B flags to utilize hardware breakpoints when they are availiable
-
-#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
-target remote | m68k-bdm-gdbserver pipe /dev/tblcf2 -B
-#monitor set remote-debug 1
-
-monitor bdm-reset
-
-# Set VBR to the beginning of what will be SRAM
-monitor bdm-ctl-set 0x0801 0x20000000
-
-# Set RAMBAR1
-monitor bdm-ctl-set 0x0C05 0x20000021
-
-# Set FLASHBAR
-monitor bdm-ctl-set 0x0C04 0x00000061
-
-# Enable PST[3:0] signals
-set *((char*) 0x40100074) = 0x0F
-
-# Add the load when debugging from ram which won't happen with rtems!
-#load
Index: c/src/lib/libbsp/m68k/mcf5235/README
===================================================================
--- c/src/lib/libbsp/m68k/mcf5235/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,443 +1,0 @@
-Description: Motorola MCF5235EVB
-============
-CPU: MCF5235, 150MHz
-RAM: 16M
-ROM: 2M
-
-This is a Motorola evaluation board that uses the MCF5235 Coldfire CPU. 
-This board is running at 150MHz scaled from a 25MHz oscillator.
-
-By default the BSP creates an image file for use when loaded into the
-RAM of the evaluation board.  To create an image file to boot from flash
-add the following command to the applications Makefile:
-LDFLAGS += -qnolinkcmds -T linkcmdsflash
-
-Note: This BSP has also been tested with the Freescale / Axiom Manufacturing
-(M5235BCC Business Card Controller) evaluation board.
-
-ACKNOWLEDGEMENTS:
-=================
-This BSP is heavily based on the work of:
-    D. Peter Siddons
-    Brett Swimley
-    Jay Monkman
-    Eric Norum
-    Mike Bertosh
-     
-BSP NAME:           mcf5235
-BOARD:              Motorola MCF5235EVB
-CPU FAMILY:         ColdFire 5235
-CPU:                MCF5235
-COPROCESSORS:       N/A
-
-DEBUG MONITOR:      dBUG
-
-PERIPHERALS
-===========
-TIMERS:             Four PIT (RTEMS clock is PIT3), Four Timers
-RESOLUTION:         10 microsecond 
-SERIAL PORTS:       Internal UART 1, 2 and 3
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         Internal 10/100MHz FEC
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PIT3
-IOSUPP DRIVER:      none
-SHMSUPP:            none
-TIMER DRIVER:       TIMER3
-TTY DRIVER:         UART1, 2 and 3
-
-STDIO
-=====
-PORT:               UART0 Terminal
-ELECTRICAL:         RS-232
-BAUD:               19200
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-
-
-      Memory map as set up by dBUG bootstrap and BSP initialization
-
-          +--------------------------------------------------+
-0000 0000 |       16 MByte SDRAM                             | 00FF FFFF
-0100 0000 |  ---------------------------------------------   |
-          |    Address space for future SDRAM expansion      |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 0FFF FFFF
-          +--------------------------------------------------+
-1000 0000 |                                                  |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 1FFF FFFF
-          +--------------------------------------------------+
-2000 0000 | 64 kByte on-chip SRAM (RAMBAR)                   |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 2FFF FFFF
-          +--------------------------------------------------+
-3000 0000 |                                                  | 30FF FFFF
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 3FFF FFFF
-          +--------------------------------------------------+
-4000 0000 | Internal peripheral system (IPSBAR)              |
-          .                                                  .
-          |                                                  |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 4FFF FFFF
-          +--------------------------------------------------+
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          +--------------------------------------------------+
-FFE0 0000 | External 4 MByte Flash                           |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | FFFF FFFF
-          +--------------------------------------------------+
-
-============================================================================
-      Interrupt map
-
-+-----+-----------------------------------------------------------------------+
-|     |                                PRIORITY                               |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  7  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  6  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  5  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  4  | FEC RX | FEC TX |        |        |        |        |        |   PIT  |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  2  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  1  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-
-============================================================================
-TIMING TESTS
-************************************
-*** TIME TEST 1 ***
-rtems_semaphore_create 12
-rtems_semaphore_delete 11
-rtems_semaphore_obtain: available 2
-rtems_semaphore_obtain: not available -- NO_WAIT 3
-rtems_semaphore_release: no waiting tasks 6
-*** END OF TEST 1 ***
-
-*** TIME TEST 2 ***
-rtems_semaphore_obtain: not available -- caller blocks 18
-*** END OF TEST 2 ***
-
-*** TIME TEST 3 ***
-rtems_semaphore_release: task readied -- preempts caller 12
-*** END OF TEST 3 ***
-
-*** TIME TEST 4 ***
-rtems_task_restart: blocked task -- preempts caller 31
-rtems_task_restart: ready task -- preempts caller 30
-rtems_semaphore_release: task readied -- returns to caller 8
-rtems_task_create 45
-rtems_task_start 9
-rtems_task_restart: suspended task -- returns to caller 14
-rtems_task_delete: suspended task 32
-rtems_task_restart: ready task -- returns to caller 14
-rtems_task_restart: blocked task -- returns to caller 21
-rtems_task_delete: blocked task 32
-*** END OF TEST 4 ***
-
-*** TIME TEST 5 ***
-rtems_task_suspend: calling task 15
-rtems_task_resume: task readied -- preempts caller 9
-*** END OF TEST 5 ***
-
-*** TIME TEST 6 ***
-rtems_task_restart: calling task 12
-rtems_task_suspend: returns to caller 5
-rtems_task_resume: task readied -- returns to caller 6
-rtems_task_delete: ready task 34
-*** END OF TEST 6 ***
-
-*** TIME TEST 7 ***
-rtems_task_restart: suspended task -- preempts caller 22
-*** END OF TEST 7 ***
-
-*** TIME TEST 9 ***
-rtems_message_queue_create 37
-rtems_message_queue_send: no waiting tasks 11
-rtems_message_queue_urgent: no waiting tasks 10
-rtems_message_queue_receive: available 10
-rtems_message_queue_flush: no messages flushed 3
-rtems_message_queue_flush: messages flushed 5
-rtems_message_queue_delete 17
-*** END OF TEST 9 ***
-
-*** TIME TEST 10 ***
-rtems_message_queue_receive: not available -- NO_WAIT 6
-rtems_message_queue_receive: not available -- caller blocks 20
-*** END OF TEST 10 ***
-
-*** TIME TEST 11 ***
-rtems_message_queue_send: task readied -- preempts caller 17
-*** END OF TEST 11 ***
-
-*** TIME TEST 12 ***
-rtems_message_queue_send: task readied -- returns to caller 12
-*** END OF TEST 12 ***
-
-*** TIME TEST 13 ***
-rtems_message_queue_urgent: task readied -- preempts caller 20
-*** END OF TEST 13 ***
-
-*** TIME TEST 14 ***
-rtems_message_queue_urgent: task readied -- returns to caller 14
-*** END OF TEST 14 ***
-
-*** TIME TEST 15 ***
-rtems_event_receive: obtain current events 0
-rtems_event_receive: not available -- NO_WAIT 3
-rtems_event_receive: not available -- caller blocks 18
-rtems_event_send: no task readied 3
-rtems_event_receive: available 5
-rtems_event_send: task readied -- returns to caller 7
-*** END OF TEST 15 ***
-
-*** TIME TEST 16 ***
-rtems_event_send: task readied -- preempts caller 12
-*** END OF TEST 16 ***
-
-*** TIME TEST 17 ***
-rtems_task_set_priority: preempts caller 21
-*** END OF TEST 17 ***
-
-*** TIME TEST 18 ***
-rtems_task_delete: calling task 40
-*** END OF TEST 18 ***
-
-*** TIME TEST 19 ***
-rtems_signal_catch 3
-rtems_signal_send: returns to caller 6
-rtems_signal_send: signal to self 11
-exit ASR overhead: returns to calling task 8
-exit ASR overhead: returns to preempting task 10
-*** END OF TEST 19 ***
-
-*** TIME TEST 20 ***
-rtems_partition_create 13
-rtems_region_create 24
-rtems_partition_get_buffer: available 6
-rtems_partition_get_buffer: not available 4
-rtems_partition_return_buffer 6
-rtems_partition_delete 6
-rtems_region_get_segment: available 12
-rtems_region_get_segment: not available -- NO_WAIT 13
-rtems_region_return_segment: no waiting tasks 12
-rtems_region_get_segment: not available -- caller blocks 30
-rtems_region_return_segment: task readied -- preempts caller 40
-rtems_region_return_segment: task readied -- returns to caller 25
-rtems_region_delete 12
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-*** END OF TEST 20 ***
-
-*** TIME TEST 21 ***
-rtems_task_ident 31
-rtems_message_queue_ident 30
-rtems_semaphore_ident 34
-rtems_partition_ident 30
-rtems_region_ident 30
-rtems_port_ident 29
-rtems_timer_ident 30
-rtems_rate_monotonic_ident 30
-*** END OF TEST 21 ***
-
-*** TIME TEST 22 ***
-rtems_message_queue_broadcast: task readied -- returns to caller 19
-rtems_message_queue_broadcast: no waiting tasks 6
-rtems_message_queue_broadcast: task readied -- preempts caller 20
-*** END OF TEST 22 ***
-
-*** TIME TEST 23 ***
-rtems_timer_create 4
-rtems_timer_fire_after: inactive 6
-rtems_timer_fire_after: active 6
-rtems_timer_cancel: active 4
-rtems_timer_cancel: inactive 3
-rtems_timer_reset: inactive 6
-rtems_timer_reset: active 6
-rtems_timer_fire_when: inactive 8
-rtems_timer_fire_when: active 8
-rtems_timer_delete: active 5
-rtems_timer_delete: inactive 5
-rtems_task_wake_when 16
-*** END OF TEST 23 ***
-
-*** TIME TEST 24 ***
-rtems_task_wake_after: yield -- returns to caller 2
-rtems_task_wake_after: yields -- preempts caller 12
-*** END OF TEST 24 ***
-
-*** TIME TEST 25 ***
-rtems_clock_tick 4
-*** END OF TEST 25 ***
-
-*** TIME TEST 26 ***
-_ISR_Disable 0
-_ISR_Flash 0
-_ISR_Enable 0
-_Thread_Disable_dispatch 0
-_Thread_Enable_dispatch 1
-_Thread_Set_state 4
-_Thread_Disptach (NO FP) 9
-context switch: no floating point contexts 7
-context switch: self 1
-context switch: to another task 1
-fp context switch: restore 1st FP task 6
-fp context switch: save idle, restore initialized 2
-fp context switch: save idle, restore idle 6
-fp context switch: save initialized, restore initialized 1
-_Thread_Resume 4
-_Thread_Unblock 3
-_Thread_Ready 2
-_Thread_Get 0
-_Semaphore_Get 0
-_Thread_Get: invalid id 0
-*** END OF TEST 26 ***
-
-*** TIME TEST 27 ***
-interrupt entry overhead: returns to interrupted task 2
-interrupt exit overhead: returns to interrupted task 1
-interrupt entry overhead: returns to nested interrupt 1
-interrupt exit overhead: returns to nested interrupt 1
-interrupt entry overhead: returns to preempting task 2
-interrupt exit overhead: returns to preempting task 12
-*** END OF TEST 27 ***
-
-*** TIME TEST 28 ***
-rtems_port_create 8
-rtems_port_external_to_internal 2
-rtems_port_internal_to_external 3
-rtems_port_delete 7
-*** END OF TEST 28 ***
-
-*** TIME TEST 29 ***
-rtems_rate_monotonic_create 8
-rtems_rate_monotonic_period: initiate period -- returns to caller 12
-rtems_rate_monotonic_period: obtain status 5
-rtems_rate_monotonic_cancel 7
-rtems_rate_monotonic_delete: inactive 8
-rtems_rate_monotonic_delete: active 7
-rtems_rate_monotonic_period: conclude periods -- caller blocks 11
-*** END OF TEST 29 ***
-
-*** TIME CHECKER ***
-Units may not be in microseconds for this test!!!
-0 100000
-Total time = 0
-Average time = 0
-<pause>
-NULL timer stopped at 0
-LOOP (1000) timer stopped at 94
-LOOP (10000) timer stopped at 941
-LOOP (50000) timer stopped at 4704
-LOOP (100000) timer stopped at 9408
-*** END OF TIME CHECKER ***
-
-*** TIME TEST OVERHEAD ***
-rtems_initialize_executive 0
-rtems_shutdown_executive 0
-rtems_task_create 0
-rtems_task_ident 0
-rtems_task_start 0
-rtems_task_restart 0
-rtems_task_delete 0
-rtems_task_suspend 0
-rtems_task_resume 0
-rtems_task_set_priority 0
-rtems_task_mode 0
-rtems_task_wake_when 0
-rtems_task_wake_after 0
-rtems_interrupt_catch 0
-rtems_clock_get 0
-rtems_clock_set 0
-rtems_clock_tick 0
-<pause>
-rtems_timer_create 0
-rtems_timer_delete 0
-rtems_timer_ident 0
-rtems_timer_fire_after 0
-rtems_timer_fire_when 0
-rtems_timer_reset 0
-rtems_timer_cancel 0
-rtems_semaphore_create 0
-rtems_semaphore_delete 0
-rtems_semaphore_ident 0
-rtems_semaphore_obtain 0
-rtems_semaphore_release 0
-rtems_message_queue_create 0
-rtems_message_queue_ident 0
-rtems_message_queue_delete 0
-rtems_message_queue_send 0
-rtems_message_queue_urgent 0
-rtems_message_queue_broadcast 0
-rtems_message_queue_receive 0
-rtems_message_queue_flush 0
-<pause>
-rtems_event_send 0
-rtems_event_receive 0
-rtems_signal_catch 0
-rtems_signal_send 0
-rtems_partition_create 0
-rtems_partition_ident 0
-rtems_partition_delete 0
-rtems_partition_get_buffer 0
-rtems_partition_return_buffer 0
-rtems_region_create 0
-rtems_region_ident 0
-rtems_region_delete 0
-rtems_region_get_segment 0
-rtems_region_return_segment 0
-rtems_port_create 0
-rtems_port_ident 0
-rtems_port_delete 0
-rtems_port_external_to_internal 0
-rtems_port_internal_to_external 0
-<pause>
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-rtems_fatal_error_occurred 0
-rtems_rate_monotonic_create 0
-rtems_rate_monotonic_ident 0
-rtems_rate_monotonic_delete 0
-rtems_rate_monotonic_cancel 0
-rtems_rate_monotonic_period 0
-rtems_multiprocessing_announce 0
-*** END OF TIME OVERHEAD ***
Index: c/src/lib/libbsp/m68k/mcf5235/gdb-init
===================================================================
--- c/src/lib/libbsp/m68k/mcf5235/gdb-init	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,54 +1,0 @@
-#
-# Connect to the target.
-# 
-target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
-
-#
-# The console loop in the Axman dbug monitor. Found by trial and error
-# with the debugger.
-#
-thb *0xffe254c0
-
-#
-# Show the exception stack frame.
-#
-define show-exception-sframe
- set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
- set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
- set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
- set $frcode = $frfvo >> 12
- set $frvect = ($frfvo & 0xFFF) >> 2
- set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
- printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
- if $frstatus == 4
-  printf " Fault Type: Error on instruction fetch"
- end
- if $frstatus == 8
-  printf " Fault Type: Error on operand write"
- end
- if $frstatus == 12
-  printf " Fault Type: Error on operand read"
- end
- if $frstatus == 9
-  printf " Fault Type: Attempted write to write-protected space"
- end
-end
-
-#
-# Run to initialise the RAM. The target will stop when the
-# breakpoint is hit. Load the program.
-#
-c
-load
-
-#
-# Break on an exception.
-#
-b _uhoh
-
-#
-# Travel to main then stop.
-#
-tb main
-c
-
Index: c/src/lib/libbsp/m68k/mcf5329/README
===================================================================
--- c/src/lib/libbsp/m68k/mcf5329/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,342 +1,0 @@
-Description: Motorola MCF5329EVB Zoom + (LogicPD)
-============
-CPU: MCF5329, 240MHz
-CORESRAM: 32K
-FLASH: 2M
-DRAM: 32M
-
-This is a Motorola Zoom evaluation board that uses the MCF5329 Coldfire CPU on
-a logicPD card.  This board is running at 240MHz with DRAM clocking at 80MHz.
-
-The bsp is configured for the MT46V16M16TG-75:F DRAM.
-
-NOTES:
-======
-
-This BSP is based heavily off the 5235 BSP.
-
-TODO:
-======
-
-Add other drivers for can, i2c, lcd (fb), qspi etc.
-
-============================================================================
-
-      Interrupt map
-
-+-----+
-|     |
-+-----+
-|LEVEL|
-+-----+
-|  7  |
-+-----+
-|  6  |
-+-----+
-|  5  |
-+-----+
-|  4  | FEC RX, FEC TX, PIT
-+-----+
-|  3  | UART 0, UART 1, UART 2
-+-----+
-|  2  |
-+-----+
-|  1  |
-+-----+
-
-============================================================================
-      Timings
-
-*** TIME TEST 1 ***
-rtems_semaphore_create 11
-rtems_semaphore_delete 9
-rtems_semaphore_obtain: available 0
-rtems_semaphore_obtain: not available -- NO_WAIT 0
-rtems_semaphore_release: no waiting tasks 2
-*** END OF TEST 1 ***
-
-*** TIME TEST 2 ***
-rtems_semaphore_obtain: not available -- caller blocks 14
-*** END OF TEST 2 ***
-
-*** TIME TEST 3 ***
-rtems_semaphore_release: task readied -- preempts caller 11
-*** END OF TEST 3 ***
-
-*** TIME TEST 4 ***
-rtems_task_restart: blocked task -- preempts caller 24
-rtems_task_restart: ready task -- preempts caller 15
-rtems_semaphore_release: task readied -- returns to caller 3
-rtems_task_create 40
-rtems_task_start 7
-rtems_task_restart: suspended task -- returns to caller 8
-rtems_task_delete: suspended task 18
-rtems_task_restart: ready task -- returns to caller 9
-rtems_task_restart: blocked task -- returns to caller 10
-rtems_task_delete: blocked task 19
-*** END OF TEST 4 ***
-
-*** TIME TEST 5 ***
-rtems_task_suspend: calling task 11
-rtems_task_resume: task readied -- preempts caller 9
-*** END OF TEST 5 ***
-
-*** TIME TEST 6 ***
-rtems_task_restart: calling task 4
-rtems_task_suspend: returns to caller 2
-rtems_task_resume: task readied -- returns to caller 2
-rtems_task_delete: ready task 19
-*** END OF TEST 6 ***
-
-*** TIME TEST 7 ***
-rtems_task_restart: suspended task -- preempts caller 15
-*** END OF TEST 7 ***
-
-*** TIME TEST 9 ***
-rtems_message_queue_create 45
-rtems_message_queue_send: no waiting tasks 2
-rtems_message_queue_urgent: no waiting tasks 2
-rtems_message_queue_receive: available 3
-rtems_message_queue_flush: no messages flushed 1
-rtems_message_queue_flush: messages flushed 1
-rtems_message_queue_delete 12
-*** END OF TEST 9 ***
-
-*** TIME TEST 10 ***
-rtems_message_queue_receive: not available -- NO_WAIT 1
-rtems_message_queue_receive: not available -- caller blocks 14
-*** END OF TEST 10 ***
-
-*** TIME TEST 11 ***
-rtems_message_queue_send: task readied -- preempts caller 13
-*** END OF TEST 11 ***
-
-*** TIME TEST 12 ***
-rtems_message_queue_send: task readied -- returns to caller 5
-*** END OF TEST 12 ***
-
-*** TIME TEST 13 ***
-rtems_message_queue_urgent: task readied -- preempts caller 13
-*** END OF TEST 13 ***
-
-*** TIME TEST 14 ***
-rtems_message_queue_urgent: task readied -- returns to caller 5
-*** END OF TEST 14 ***
-
-*** TIME TEST 15 ***
-rtems_event_receive: obtain current events 0
-rtems_event_receive: not available -- NO_WAIT 1
-rtems_event_receive: not available -- caller blocks 12
-rtems_event_send: no task readied 1
-rtems_event_receive: available 3
-rtems_event_send: task readied -- returns to caller 4
-*** END OF TEST 15 ***
-
-*** TIME TEST 16 ***
-rtems_event_send: task readied -- preempts caller 13
-*** END OF TEST 16 ***
-
-*** TIME TEST 17 ***
-rtems_task_set_priority: preempts caller 13
-*** END OF TEST 17 ***
-
-*** TIME TEST 18 ***
-rtems_task_delete: calling task 30
-*** END OF TEST 18 ***
-
-*** TIME TEST 19 ***
-rtems_signal_catch 2
-rtems_signal_send: returns to caller 5
-rtems_signal_send: signal to self 11
-exit ASR overhead: returns to calling task 6
-exit ASR overhead: returns to preempting task 11
-*** END OF TEST 19 ***
-
-*** TIME TEST 20 ***
-rtems_partition_create 15
-rtems_region_create 20
-rtems_partition_get_buffer: available 4
-rtems_partition_get_buffer: not available 1
-rtems_partition_return_buffer 4
-rtems_partition_delete 6
-rtems_region_get_segment: available 6
-rtems_region_get_segment: not available -- NO_WAIT 5
-rtems_region_return_segment: no waiting tasks 5
-rtems_region_get_segment: not available -- caller blocks 29
-rtems_region_return_segment: task readied -- preempts caller 29
-rtems_region_return_segment: task readied -- returns to caller 11
-rtems_region_delete 6
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-*** END OF TEST 20 ***
-
-*** TIME TEST 21 ***
-rtems_task_ident 4
-rtems_message_queue_ident 3
-rtems_semaphore_ident 4
-rtems_partition_ident 3
-rtems_region_ident 3
-rtems_port_ident 3
-rtems_timer_ident 3
-rtems_rate_monotonic_ident 3
-*** END OF TEST 21 ***
-
-*** TIME TEST 22 ***
-rtems_message_queue_broadcast: task readied -- returns to caller 16
-rtems_message_queue_broadcast: no waiting tasks 2
-rtems_message_queue_broadcast: task readied -- preempts caller 12
-*** END OF TEST 22 ***
-
-*** TIME TEST 23 ***
-rtems_timer_create 2
-rtems_timer_fire_after: inactive 2
-rtems_timer_fire_after: active 1
-rtems_timer_cancel: active 1
-rtems_timer_cancel: inactive 1
-rtems_timer_reset: inactive 2
-rtems_timer_reset: active 2
-rtems_timer_fire_when: inactive 2
-rtems_timer_fire_when: active 2
-rtems_timer_delete: active 2
-rtems_timer_delete: inactive 2
-rtems_task_wake_when 13
-*** END OF TEST 23 ***
-
-*** TIME TEST 24 ***
-rtems_task_wake_after: yield -- returns to caller 0
-rtems_task_wake_after: yields -- preempts caller 9
-*** END OF TEST 24 ***
-
-*** TIME TEST 25 ***
-rtems_clock_tick 10
-*** END OF TEST 25 ***
-
-*** TIME TEST 26 ***
-_ISR_Disable 1
-_ISR_Flash 0
-_ISR_Enable 0
-_Thread_Disable_dispatch 0
-_Thread_Enable_dispatch 1
-_Thread_Set_state 4
-_Thread_Disptach (NO FP) 11
-context switch: no floating point contexts 5
-context switch: self 0
-context switch: to another task 1
-fp context switch: restore 1st FP task 5
-fp context switch: save idle, restore initialized 1
-fp context switch: save idle, restore idle 6
-fp context switch: save initialized, restore initialized 1
-_Thread_Resume 5
-_Thread_Unblock 3
-_Thread_Ready 2
-_Thread_Get 0
-_Semaphore_Get 0
-_Thread_Get: invalid id 0
-*** END OF TEST 26 ***
-
-*** TIME TEST 27 ***
-interrupt entry overhead: returns to interrupted task 1
-interrupt exit overhead: returns to interrupted task 1
-interrupt entry overhead: returns to nested interrupt 0
-interrupt exit overhead: returns to nested interrupt 0
-interrupt entry overhead: returns to preempting task 1
-interrupt exit overhead: returns to preempting task 9
-*** END OF TEST 27 ***
-
-*** TIME TEST 28 ***
-rtems_port_create 5
-rtems_port_external_to_internal 1
-rtems_port_internal_to_external 1
-rtems_port_delete 4
-*** END OF TEST 28 ***
-
-*** TIME TEST 29 ***
-rtems_rate_monotonic_create 8
-rtems_rate_monotonic_period: initiate period -- returns to caller 14
-rtems_rate_monotonic_period: obtain status 3
-rtems_rate_monotonic_cancel 6
-rtems_rate_monotonic_delete: inactive 7
-rtems_rate_monotonic_delete: active 3
-rtems_rate_monotonic_period: conclude periods -- caller blocks 15
-*** END OF TEST 29 ***
-
-
-*** TIME TEST OVERHEAD ***
-rtems_shutdown_executive 0
-rtems_task_create 0
-rtems_task_ident 0
-rtems_task_start 0
-rtems_task_restart 0
-rtems_task_delete 0
-rtems_task_suspend 0
-rtems_task_resume 0
-rtems_task_set_priority 0
-rtems_task_mode 0
-rtems_task_wake_when 0
-rtems_task_wake_after 0
-rtems_interrupt_catch 0
-rtems_clock_get 0
-rtems_clock_set 0
-rtems_clock_tick 0
-<pause>
-rtems_timer_create 0
-rtems_timer_delete 0
-rtems_timer_ident 0
-rtems_timer_fire_after 0
-rtems_timer_fire_when 0
-rtems_timer_reset 0
-rtems_timer_cancel 0
-rtems_semaphore_create 0
-rtems_semaphore_delete 0
-rtems_semaphore_ident 0
-rtems_semaphore_obtain 0
-rtems_semaphore_release 0
-rtems_message_queue_create 0
-rtems_message_queue_ident 0
-rtems_message_queue_delete 0
-rtems_message_queue_send 0
-rtems_message_queue_urgent 0
-rtems_message_queue_broadcast 0
-rtems_message_queue_receive 0
-rtems_message_queue_flush 0
-<pause>
-rtems_event_send 0
-rtems_event_receive 0
-rtems_signal_catch 0
-rtems_signal_send 0
-rtems_partition_create 0
-rtems_partition_ident 0
-rtems_partition_delete 0
-rtems_partition_get_buffer 0
-rtems_partition_return_buffer 0
-rtems_region_create 0
-rtems_region_ident 0
-rtems_region_delete 0
-rtems_region_get_segment 0
-rtems_region_return_segment 0
-rtems_port_create 0
-rtems_port_ident 0
-rtems_port_delete 0
-rtems_port_external_to_internal 0
-rtems_port_internal_to_external 0
-<pause>
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-rtems_fatal_error_occurred 0
-rtems_rate_monotonic_create 0
-rtems_rate_monotonic_ident 0
-rtems_rate_monotonic_delete 0
-rtems_rate_monotonic_cancel 0
-rtems_rate_monotonic_period 0
-rtems_multiprocessing_announce 0
-*** END OF TIME OVERHEAD ***
-
-
Index: c/src/lib/libbsp/m68k/mcf5329/gdb-init
===================================================================
--- c/src/lib/libbsp/m68k/mcf5329/gdb-init	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,104 +1,0 @@
-#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0 -v -d
-target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
-
-#monitor set remote-debug 1
-#monitor set debug 1
-monitor bdm-reset
-
-#
-# Show the exception stack frame.
-#
-define show-exception-sframe
- set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
- set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
- set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
- set $frcode = $frfvo >> 12
- set $frvect = ($frfvo & 0xFFF) >> 2
- set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
- printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
- if $frstatus == 4
-  printf " Fault Type: Error on instruction fetch"
- end
- if $frstatus == 8
-  printf " Fault Type: Error on operand write"
- end
- if $frstatus == 12
-  printf " Fault Type: Error on operand read"
- end
- if $frstatus == 9
-  printf " Fault Type: Attempted write to write-protected space"
- end
-end
-
-# I have to do this as there seems to be a problem with me setting up the 
-# chip selects.  As far as I can tell, gdb is probing whats at the program
-# counter.  It issues a 2 byte read (smallest instruction) followed by a
-# 4 byte read (depending on the result of the 2 byte read).  gdb issues these
-# reads after each and every write that the .gdbinit script issues.  This means
-# that as I'm initializing the chip selects the gdb reads can happen in an 
-# invalid memory address and this causes a target bus error.  For now I'm just
-# setting pc to 0, which seems to stop gdb from probing around to read 
-# assembler.  This lets me setup chip selects without error.
-
-set $pc = 0x00000000
-
-# Turn on RAMBAR1 at address 80000000 
-monitor bdm-ctl-set 0x0C05 0x80000221
-
-# Set VBR to the beginning of what will be SDRAM
-# VBR is an absolute CPU register
-monitor bdm-ctl-set 0x0801 0x40000000
-
-# Disable watchdog timer
-set *((short*) 0xFC098000) = 0x0000
-
-#Init CS0
-set *((long*) 0xFC008000) = 0x00000000
-set *((long*) 0xFC008008) = 0x00001FA0
-set *((long*) 0xFC008004) = 0x001F0001
-
-# SDRAM Initialization
-
-monitor delay-ms 100
-
-# SDCS0 
-set *((long*) 0xFC0B8110) = 0x40000018
-# SDCFG1
-set *((long*) 0xFC0B8008) = 0x53722730
-# SDCFG2
-set *((long*) 0xFC0B800C) = 0x56670000
-
-# Issue PALL
-# SDCR
-set *((long*) 0xFC0B8004) = 0xE1092002
-
-# Issue LEMR
-# SDMR
-set *((long*) 0xFC0B8000) = 0x40010000
-
-# Write mode register
-# SDMR
-set *((long*) 0xFC0B8000) = 0x058D0000
-
-# Wait a bit
-monitor delay-ms 600
-
-# Issue PALL
-# SDCR
-set *((long*) 0xFC0B8004) = 0xE1092002
-
-# Perform two refresh cycles
-# SDCR
-set *((long*) 0xFC0B8004) = 0xE1092004
-# SDCR
-set *((long*) 0xFC0B8004) = 0xE1092004
-
-# SDMR
-set *((long*) 0xFC0B8000) = 0x018D0000
-# SDCR
-set *((long*) 0xFC0B8004) = 0x71092C00
-
-# Wait a bit
-monitor delay-ms 100
-
-load
Index: c/src/lib/libbsp/m68k/mrm332/README
===================================================================
--- c/src/lib/libbsp/m68k/mrm332/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,20 +1,0 @@
-Description: mrm332
-============
-CPU: MC68332 @16 or 25MHz
-RAM: 32k or 512k
-ROM: 512k flash
-
-   The Mini RoboMind is a small board based on the 68332 microcontroller
-designed and build by Mark Castelluccio.  For details, see:
-
-        http://www.robominds.com
-
-   This BSP was ported from the efi332 BSP by Matt Cross (profesor@gweep.net),
-the efi332 BSP was written by John S Gwynne.
-
-TODO:
-=====
-- integrate the interrupt driven stdin/stdout into RTEMS to (a) reduce
-  the interrupt priority and (2) to prevent it from blocking.
-- add a timer driver for the tmtest set.
-
Index: c/src/lib/libbsp/m68k/mrm332/misc/dotests
===================================================================
--- c/src/lib/libbsp/m68k/mrm332/misc/dotests	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,12 +1,0 @@
-#! /bin/bash
-
-mkdir MyTests
-find -name MyTests -prune -or -name "*.nxe" -exec cp {} MyTests \;
-
-stty 1:0:80001cb2:0:3:1c:7f:15:4:5:1:0:11:13:1a:0:12:f:17:16:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 </dev/ttyS1
-/bin/cp /dev/ttyS1 screen &
-cpJob=$!
-
-( cd MyTests; for f in *nxe; do m68k-elf-gdb ${f} </dev/null; done )
-
-kill -9 $cpJob
Index: c/src/lib/libbsp/m68k/mrm332/misc/gdbinit68
===================================================================
--- c/src/lib/libbsp/m68k/mrm332/misc/gdbinit68	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,13 +1,0 @@
-echo Setting up the environment for mrm debuging.\n
-
-target bdm /dev/bdmcpu320
-bdm_setdelay 1000
-bdm_autoreset on
-set remotecache off
-bdm_timetocomeup 0
-bdm_init
-bdm_reset
-set $sfc=5
-set $dfc=5
-r
-q
Index: c/src/lib/libbsp/m68k/mvme147/README
===================================================================
--- c/src/lib/libbsp/m68k/mvme147/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,82 +1,0 @@
-Notes about the MVME147 bsp
-
-MVME147 port for TNI - Telecom Bretagne
-by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
-May 1996
-
-
-This bsp is essentially based on the mvme136 bsp.
-
-Summary of the modifications that were made:
-
- * include
- 
-   - bsp.h 
-      Peripheral Channel Controller memory mapping
-      Z8530 memory mapping
- 
- * startup
- 
-   - bspstart.c
-      main () setup for VME roundrobin mode
-	      setup for the PCC interrupt vector base 
-   - bspclean.c
-      bsp_cleanup () disable timer 1 & 2 interruptions
-   - linkcmds set the RAM start (0x5000) and size (4Meg - 0x5000)
-   - setvec.c unchanged
-   - sbrk.c unchanged
- 
- * console
- 
-   - console.c taken from the dmv152 bsp (Zilog Z8530)
-               with no modification
- 
- * clock
- 
-   - ckinit.c entirely rewritten for the PCC tick timer 2
- 
- * timer
- 
-   - timerisr.s and timer.c 
-     entirely rewritten for the PCC tick timer 1
-     now gives results un 6.25 us units (mininum timer delay,
-     suprising big grain)
- 
- * times
- 
-   - updated results for the mvme147 (beware of the 6.25 us grain)
-
- * Makefiles
-   
-   - compilation of shmsupp simply removed
-
-
-To be done:
-
- * add VMEchip memory mapping to include/bsp.h
-
- * update the overheads in coverhead.h 
-
- * add support for serila ports 2,3 and 4.
-
-Other notes:
-
- * There is no MP support (no more shmsupp) because I have no
-   experience of the VME bus. The mvme136 shared memory support
-   does not seem applicable on the VMEchip of the mvme147, so
-   I don't know where to start. Suggestions are welcome.
-
- * All the timing tests and sp tests have been run except tmoverhd.
-   The test hangs during the pause (where the task should be suspended
-   until a return). Maybe the rtems_initialize_executive is no more
-   reentrant with this bsp. 
-
-Future work:
-
- * Add gdb serial remote support.
-
- * Shared memory support (I don't really need it, but I can do
-   it if it's simple).
-
- * Message passing on VME bus, with Ada 95 annex E (distributed
-   systems) in mind.
Index: c/src/lib/libbsp/m68k/mvme147s/README
===================================================================
--- c/src/lib/libbsp/m68k/mvme147s/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,88 +1,0 @@
-Notes about the MVME147S bsp
-
-MVME147 port for TNI - Telecom Bretagne
-by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
-May 1996
-
-
-This bsp is essentially based on the mvme136 bsp,
-and is only an extention of the MVME147 bsp. There
-are slight differences in the VMEchips used in the MVME147S and
-the MVME147 that should prevent the shmsupport and the startup
-code from running on a MVME147.
-
-Summary of the modifications that were made:
-
- * include
- 
-   - bsp.h 
-      Peripheral Channel Controller memory mapping
-      Z8530 memory mapping
-      VMEchip memory mapping
- 
- * startup
- 
-   - bspstart.c
-      main () setup for VME roundrobin mode
-	      setup for the PCC interrupt vector base 
-              setup of the VME shared memory
-   - bspclean.c
-      bsp_cleanup () disable timer 1 & 2 interruptions
-   - linkcmds set the RAM start (0x7000) and size (4Meg - 0x7000)
-   - setvec.c unchanged
-   - sbrk.c unchanged
- 
- * console
- 
-   - console.c taken from the dmv152 bsp (Zilog Z8530)
-               with no modification
- 
- * clock
- 
-   - ckinit.c entirely rewritten for the PCC tick timer 2
- 
- * timer
- 
-   - timerisr.s and timer.c 
-     entirely rewritten for the PCC tick timer 1
-     now gives results un 6.25 us units (mininum timer delay,
-     suprising big grain)
- 
- * times
- 
-   - updated results for the mvme147 (beware of the 6.25 us grain)
-
- * shmsupp :
-   Specific to the S version of the MVME147
-   Only tested with 2 boards, in interrupt mode.
-   Uses the top 128k of the VME system controller board RAM
-   as the shared space.
-
-   - mpisr.c : uses the SIGLP interruption
-
-   - Makefile : unchanged
-
-   - getcfg.c : rewritten 
-
-   - lock.c unchanged
-
-   - addrconv.c unchanged
-
- * Makefiles
-   
-   - unchanged
-
-
-To be done:
-
- * update the overheads in coverhead.h 
-
- * add support for serial ports 2,3 and 4.
-
-Other notes:
-
- * All the timing tests and sp tests have been run except tmoverhd.
-   The test hangs during the pause (where the task should be suspended
-   until a return). Maybe the rtems_initialize_executive is no more
-   reentrant with this bsp. 
-
Index: c/src/lib/libbsp/m68k/mvme162/README
===================================================================
--- c/src/lib/libbsp/m68k/mvme162/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,173 +1,0 @@
---
---  EISCAT Scientific Association. M.Savitski
---
---  This material is a part of the MVME162 Board Support Package
---  for the RTEMS executive. Its licensing policies are those of the
---  RTEMS distribution.
---
---  Updated by Joel Sherrill (jsherril@redstone.army.mil) after
---  inclusion in the standard release.
---
-
-
-MVME162 Models
---------------
-
-There are three different models of the MVME162 board.  There are many
-variations within each model.
-
-  Model        Variants
-  ---------    --------------------------------------------------
-  MVME162      MVME162-0xx
-  MVME162FX    MVME162-4xx, MVME162-5xx
-  MVME162LX    MVME162-2xx, MVME162-3xx, MVME162-7xx, MVME162-8xx
-
-All models use either an MC68040 or MC68LC040 (no FPU) processors.  The
-processor used varies by variant as does the speed, the amount and type
-of memory and the I/O devices (serial, ethernet, SCSI and VME).  See the
-README.models file for details.
-
-
-Configuring the BSP
--------------------
-The BSP needs to be configured for your specific board.  The following
-files need to be modified.
-
-include/bsp.h
-Change the MOT_162BUG_VEC_ADDRESS define to start of memory for your
-board
-
-make/custom/mvme162.cfg
-If your board has an MC68040 processor
-- change the value of RTEMS_CPU_MODEL
-- remove the -msoft-float flag from CPU_CFLAGS
-
-
-
-MVME162FX and DMA on the IP bus
--------------------------------
-
-From Eric Vaitl <eric@viasat.com>:
-
-If you have any customers that will be using the 162FX, tell them to 
-be careful. The main difference between the 162 and the 162FX is DMA 
-on the IP bus. I spent over a month trying to write a DMA HDLC driver 
-for GreenSprings IP-MP and couldn't get it to work. I talked to some 
-people at GreenSprings, and they agreed that there really is no way to 
-get DMA to work unless you know the size of the packets in advance. 
-Once the IP2 chip DMA controller is given the character count and 
-enabled, it doesn't accept further commands until all of the 
-characters have arrived. The only way to terminate a DMA transfer 
-prematurely is by raising DMAEND* during the last read. None of the IP 
-modules that I know of are currently able to do that. GreenSprings is 
-working on the problem, but nothing is going to available for a few 
-months. 
-
-Installation
-------------
-Nothing unique to the MVME162.  It has been incorporated into the
-standard release.
-
-Port Description
-----------------
-This section describes the initial port effort.  There have been 
-additions and modifications to the bsp since this was done.
-Interestingly, this was the first bsp submitted to the RTEMS project
-and the submission offer came out of the blue with no prior
-communication with the author. :)
-
-The port was done using already existing ports to the M68020 boards,
-DMV152 and MVME136. 
-
-The initial host development system was SUN/Solaris 2.3, and
-the cross-development environment consisted of Free Software
-Foundation (FSF)'s GNU C compiler (version 2.6), GNU Assembler
-(version 2.3) and GNU binary utilities binutils version 2.5.2,
-built with m68k as a target. The recent/latest versions of other
-GNU programs (flex, make, etc) were also used at the build stage.
-
-In all subdirectories of the RTEMS distribution tree, the directories
-mvme136 were duplicated as mvme162.
-
-Essential modifications are detailed below:
-
-- the MVME162-specific hardware registers were described in bsp.h
-
-- timer and clock routines were made to use the MVME162's Tick Timers 1
-and 2, respectively
-
-- shared memory support was replaced by stubs for the time being
-
-- console IO was lifted entirely from the DMV152 support code, thanks
-to the fact that Z8530 SCC used in DMV152 is upwards compatible with
-the Z85230 SCC of the MVME162. (Only the memory mapping of the SCC
-registers had to be changed.)
-
-- symbols in several *.s files were prepended with underscores to
-comply with the xgcc configuration used (it prepends underscores to all
-symbols defined in c code)
-
-- linkcmds file was modified to place the linked code into the memory
-configured for the board in use
-
-- bspstart.c was modified as follows:
-
-         monitors_vector_table = (rtems_isr *)0xFFE00000;
-
-was made to point to the power-up location of MVME162 interrupt vector
-table.  
-     
-- The shutdown is a temporary solution. To exit cleanly, it has to disable
-all enabled interrupts and restore the board to its power-up status.
-Presently this is not done satisfactorily, as a result, the board needs
-a hardware reset from the external VMEbus master or from the front
-panel to ensure correct operation for subsequent downloads.
-
-Host System
------------
-The VMEbus master used to externally control and download the MVME162
-is a FORCE CPU-2CE board running Solaris 2.3. A simple program to load
-s-records and start/reset the MVME162 was written. The code is in the
-file tools/sload.c
-
-This code depends on the external VMEbus master's vme driver and is
-provided as an example, without the Makefile. The bulk of the program
-which parses the s-records is courtesy of Kym Newbery,
-(8918927y@lux.levels.unisa.edu.au).
-
-In general, apart from x-gcc, the tools most often used while building
-RTEMS for MVME162 were: find, grep, diff, and, of course
-
-MVME162 Embedded Controller Programmer's Reference Guide,
-Motorola, MVME162PG/D1.
-
-Thanks
-------
-- to On-Line Applications Research Corporation (OAR) for developing
-RTEMS and making it available on a Technology Transfer basis;
-- to Joel Sherril, the leader of the RTEMS development group for
-stimulating and helpful discussions;
-- to Kym Newbery (8918927y@lux.levels.unisa.edu.au) for his s-record
-parser;
-- to Gerd Truschinski (gt@first.gmd.de) for creating and running the
-crossgcc mailing list
-- to FSF and Cygnus Support for great free software;
-
-What's new
-----------
-  - 28.07.95 BSP adjusted to rtems-3.2.0. 
-  - Now console driver uses interrupts on receive (ring buffer
-    code lifted with thanks from the IDP BSP next door (../idp))
-  - both front-panel serial interfaces are supported
-  - serious bug in timer interrupts fixed
-  - interrupt test tm27 now supported
-  
-+----------------------------------+-------------------------------+
-|  Dr. Mikhail (Misha) Savitski    |  Voice : +46-980-79162        |
-|  Software Systems Engineer       |  Fax   : +46-980-79161        |
-|  EISCAT Svalbard Radar Project   |  E-mail: mms@eiscathq.irf.se  |
-|  EISCAT Scientific Association   |-----------  /\_/\  -----------|
-|  Box 812 S-98128 Kiruna, Sweden  |  EIS       { o o }       CAT  |
-+----------------------------------+-------oQQQ--(>I<)--QQQo-------+
-
-
Index: c/src/lib/libbsp/m68k/mvme162/README.models
===================================================================
--- c/src/lib/libbsp/m68k/mvme162/README.models	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,233 +1,0 @@
-MVME162 Models
-==============
-
-There are three different models of the MVME162 board with many variations
-within each model.
-
-  Model        Variants
-  ---------    --------------------------------------------------
-  MVME162      MVME162-0xx
-  MVME162FX    MVME162-4xx, MVME162-5xx
-  MVME162LX    MVME162-2xx, MVME162-3xx, MVME162-7xx, MVME162-8xx
-
-All models use either an MC68040 or MC68LC040 (no FPU) processors.  The
-processor used varies by variant as does the speed, the amount and type
-of memory and the I/O devices (serial, ethernet, SCSI and VME).  See the
-following tables for details.
-
-
-
-MVME162 Variants
-================
-
-Source
-------
-o  MVME162 Embedded Controller User's Manual (MVME162/D2)
-
-
-Common Configuration
---------------------
-o  One EPROM socket
-o  8Kx8 NVRAM/TOD clock
-o  Two serial ports
-o  1MB Flash memory
-o  Four MVIP Industry Pack interfaces
-o  One or two DRAM/SRAM mezzanine memory boards
-
-
-Model  Processor  Speed  DRAM  SRAM   Other
------  ---------  -----  ----  -----  ------------------
- 001   MC68LC040  25MHz   1MB  512KB
- 002   MC68040    25MHz   1MB  512KB
- 003   MC68LC040  25MHz   1MB  512KB  No VMEbus
- 010   MC68LC040  25MHz   4MB  512KB
- 011   MC68LC040  25MHz   4MB  512KB  SCSI
- 012   MC68LC040  25MHz   4MB  512KB  Ethernet
- 013   MC68LC040  25MHz   4MB  512KB  Ethernet, SCSI
- 014   MC68LC040  25MHz   4MB    -    Ethernet, No VMEbus
- 020   MC68040    25MHz   4MB  512KB
- 021   MC68040    25MHz   4MB  512KB  SCSI
- 022   MC68040    25MHz   4MB  512KB  Ethernet
- 023   MC68040    25MHz   4MB  512KB  Ethernet, SCSI
- 026   MC68040    25MHz   4MB    -    Ethernet, No VMEbus
- 030   MC68LC040  25MHz   8MB  512KB
- 031   MC68LC040  25MHz   8MB  512KB  SCSI
- 032   MC68LC040  25MHz   8MB  512KB  Ethernet
- 033   MC68LC040  25MHz   8MB  512KB  Ethernet, SCSI
- 040   MC68040    25MHz   8MB  512KB
- 041   MC68040    25MHz   8MB  512KB  SCSI
- 042   MC68040    25MHz   8MB  512KB  Ethernet
- 043   MC68040    25MHz   8MB  512KB  Ethernet, SCSI
-
-
-Serial Interface Modules
-------------------------
-SIM05  01-W3846B  EIA-232-D  DTE
-SIM06  01-W3865B  EIA-232-D  DCE
-SIM07  01-W3868B  EIA-530    DTE
-SIM08  01-W3867B  EIA-530    DCE
-
-
-DRAM/SRAM Expansion Memory Boards
----------------------------------
-?
-
-
-
-MVME162FX Variants
-==================
-
-Source
-------
-o  MVME162FX Data Sheet
-o  MVME162FX Embedded Controller Installation and Use (V162FXA/IH3)
-o  MVME162FX Embedded Controller Programmer's Reference Guide (V162FXA/PG1)
-o  MVME162FX 400/500-Series VME Embedded Controller Installation and Use
-     (V162FXA/IH4) Edition of March 2000\Uffffffff
-o  V162FXA/LT2, November 1995
-
-
-Common Configuration
---------------------
-o  One EPROM socket
-o  8Kx8 NVRAM/TOD clock
-o  Two serial ports
-o  1MB Flash memory with 162Bug installed
-o  512KB SRAM with battery backup
-o  Four IndustryPack interfaces
-o  One or two DRAM/SRAM mezzanine memory boards
-
-
-Uses MC2 Chip, IP2 Chip, 4MB or 12MB mezzanine DRAM board
-
-Model  Processor  Speed  DRAM  Other
------  ---------  -----  ----  ------------------
- 403
- 410   MC68LC040  25Mhz   4MB
- 411   MC68LC040  25Mhz   4MB  SCSI
- 412   MC68LC040  25Mhz   4MB  Ethernet
- 413   MC68LC040  25Mhz   4MB  Ethernet, SCSI
- 420   ?
- 421   ?
- 422   ?
- 423   ?
- 430   MC68LC040  25Mhz   8MB
- 431   MC68LC040  25Mhz   8MB  SCSI
- 432   MC68LC040  25Mhz   8MB  Ethernet
- 433   MC68LC040  25Mhz   8MB  Ethernet, SCSI
- 440   ?
- 441   ?
- 442   ?
- 443   ?
- 450   ?
- 451   ?
- 452   ?
- 453   MC68LC040  25Mhz  16MB  Ethernet, SCSI
- 460   ?
- 461   ?
- 462   ?
- 463   ?
- 510   MC68040    32MHz   4MB
- 511   MC68040    32MHz   4MB  SCSI
- 512   MC68040    32MHz   4MB  Ethernet
- 513   MC68040    32MHz   4MB  Ethernet, SCSI
- 520   MC68040    32MHz   8MB
- 521   MC68040    32MHz   8MB  SCSI
- 522   MC68040    32MHz   8MB  Ethernet
- 523   MC68040    32MHz   8MB  Ethernet, SCSI
- 530   MC68040    32MHz  16MB
- 531   MC68040    32MHz  16MB  SCSI
- 532   MC68040    32MHz  16MB  Ethernet
- 533   MC68040    32MHz  16MB  Ethernet, SCSI
-
-
-Serial Interface Modules
-------------------------
-SIM05  01-W3846B  EIA-232-D    DTE
-SIM06  01-W3865B  EIA-232-D    DCE
-SIM07  01-W3868B  EIA-530      DTE
-SIM08  01-W3867B  EIA-530      DCE
-SIM09  01-W3002F  EIA-485/422  DTE/DCE
-
-
-DRAM/SRAM Expansion Memory Boards
----------------------------------
-MVME162-502   4MB DRAM
-MVME162-503  12MB DRAM
-?             2MB SRAM
-
-
-
-MVME162LX Variants
-==================
-
-Source
-------
-o  Supplement to MVME162LX Embedded Controller Installation Guide
-    (MVME162LXIG/D1A1) February 1995
-o  MVME162LX Embedded Controller Data Sheet
-o  MVME162LX 200/300 Series Embedded Controller Programmer's Reference
-     Guide (V162LX2-3A/PG2)
-o  MVME162LX 200/300 Series Embedded Controller Installation and Use
-     (V162LX2-3A/IH3)
-o  MVME162LX 700/800 Series Embedded Controller Installation and Use
-     (V162-7A/IH1)
-o  MVME162LX 700/800 Series Embedded Controller Installation and Use
-     (V162-7A/IH2)
-
-
-Common Configuration
---------------------
-o  One EPROM socket
-o  8Kx8 NVRAM/TOD clock
-o  4 serial ports EIA-232-D DTE (unless otherwise noted)
-o  1MB Flash
-o  2 IP sites (unless otherwise noted)
-
-
-Model  Processor  Speed  DRAM      Other
------  ---------  -----  --------  ------------------
- 200   MC68LC040  25MHz   1MB      No serial(?)
- 201   MC68LC040  25MHz   1MB
- 202   MC68LC040  25MHz   1MB
- 210   MC68LC040  25MHz   4MB
- 211   MC68LC040  25MHz   4MB      SCSI
- 212   MC68LC040  25MHz   4MB      Ethernet
- 213   MC68LC040  25MHz   4MB      Ethernet, SCSI
- 216   MC68LC040  25MHz   4MB      Ethernet, No VMEbus, No serial(?)
- 220   MC68040    25MHz   4MB
- 222   MC68040    25MHz   4MB      Ethernet
- 223   MC68040    25MHz   4MB      Ethernet, SCSI
- 233   MC68LC040  25MHz   4MB ECC
- 233   MC68LC040  25MHz   4MB ECC  Ethernet, SCSI
- 243   MC68040    25MHz   4MB ECC  Ethernet, SCSI
- 253   MC68LC040  25MHz  16MB ECC  Ethernet, SCSI
- 253   MC68LC040  25MHz  16MB ECC  Ethernet, SCSI
- 262   MC68040    25MHz  16MB ECC  Ethernet
- 263   MC68040    25MHz  16MB ECC  Ethernet, SCSI
- 322   MC68LC040  25MHz   8MB ECC  Ethernet
- 323   MC68LC040  25MHz   8MB ECC  Ethernet, SCSI
- 333   MC68040    25MHz   8MB ECC  Ethernet, SCSI, No IP sites(?)
- 353   MC68040    25MHz  32MB ECC  Ethernet, SCSI, 4 IP sites
- 723   MC68040    32MHz   4MB      Ethernet, SCSI
- 743   MC68040    32MHz   4MB ECC  Ethernet, SCSI
- 763   MC68040    32MHz  16MB ECC  Ethernet, SCSI
- 813   MC68040    32MHz   8MB      Ethernet, SCSI
- 833   MC68040    32MHz   8MB ECC  Ethernet, SCSI
- 853   MC68040    32MHz  32MB ECC  Ethernet, SCSI
- 863   MC68040    32MHz  16MB ECC  Ethernet, SCSI
-
-
-DRAM Expansion Memory Boards
-------------------------------------
-MVME162-202   4MB     (non-stacking)
-MVME162-203  16MB ECC (non-stacking)
-MVME162-204  16MB ECC (stacking)
-MVME162-207   4MB ECC (non-stakcing)
-MVME162-208   4MB ECC (stacking)
-MVME162-209   8MB ECC (non-stacking)
-MVME162-210   8MB ECC (stacking)
-MVME162-211  32MB ECC (non-stacking)
-MVME162-212  32MB ECC (stacking)
-
-
Index: c/src/lib/libbsp/m68k/mvme167/README
===================================================================
--- c/src/lib/libbsp/m68k/mvme167/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,435 +1,0 @@
-This is a README file for the MVME167 port of RTEMS 4.5.0.
-
-Please send any comments, improvements, or bug reports to:
-
-Charles-Antoine Gauthier
-charles.gauthier@nrc.ca
-
-or
-
-Darlene Stewart
-Darlene.Stewart@nrc.ca
-  
-Software Engineering Group
-Institute for Information Technology
-National Research Council of Canada
-Ottawa, ON, K1A 0R6
-Canada
-
-
-Disclaimer
-----------
-
-The National Research Council of Canada is distributing this RTEMS
-board support package for the Motorola MVME167 as free software; you
-can redistribute it and/or modify it under terms of the GNU General
-Public License as published by the Free Software Foundation; either
-version 2, or (at your option) any later version.  This software is
-distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details. You should have received a copy of the GNU General
-Public License along with RTEMS; see file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
-
-Under no circumstances will the National Research Council of Canada
-nor Her Majesty the Queen in right of Canada assume any liablility
-for the use this software, nor any responsibility for its quality or
-its support.
-
-
-Installation
-------------
-
-Nothing unique to the MVME167. It uses the standard build process for
-m68k targets. You will need to edit linkcmds to put in the start address
-of your board. We do TFTP transfers to our target. The mvme167.cfg file
-builds only the ELF images, which we download to the target, skipping
-over the first 0x54 bytes; Motorola S-records are not generated. Edit
-this file if you want S-records.
-
-
-Port Description
-
-Console driver
----------------
-
-This BSP includes an termios-capable interrupt-driven I/O console driver
-that supports all four serial ports on the MVME167 model. The port labelled
-Serial Port 1/Console on the MVME712 is normally used by 167Bug; do not open
-/dev/tty00 if you are debugging using 167Bug.
-
-Limited support is provided for polled terminal I/O. This is used when
-running the timing tests, and by the printk() debug output function.
-Polled I/O may use termios, or it may bypass those services. The printk()
-function does not use termios. When polled I/O is used, the terminal settings
-must be set through 167-Bug; trying to change the line settings through RTEMS
-has no effect.
-
-Three is no support for using interrupt-driven I/O without termios support.
-
-The default configuration is to use polled I/O and to bypass termios. This
-is done so the test can be built at the same time as the rest of the system.
-It is highly recommended that the defaults be changed in the mvme167.cfg file
-to reflect the desired defaults, or that the appropriate parameters be set up
-in NVRAM to select the appropriate I/O modes at boot time.
-
-When configured for interrupt-driven I/O, the console is initialized with
-whatever parameters are set up in termios before it calls the firtOpen driver
-callback, EXCEPT THAT HARDWARE HANDSHAKING IS TURNED OFF, i.e. CLOCAL is set
-in the struct termios c_cflag field. We use 3-wire cables for I/O, and find
-hardware handshaking a pain. If you enable hardware handshaking, you must drive
-CTS* low on the CD2401 for output to occur. If the port is in the DTE
-configuration, you must drive the RS-232 CTS line to space; if the port is
-in the DCE configuration, you must drive the RS-232 RTS line to space.
-
-To use interrupt-driven I/O, set the CD2401_IO_MODE manifest constant to 1 in
-rtems/make/custom/mvme167.cfg, or configure the appropriate parameter in
-User Area Non-volatile RAM. See the Configuration Parameters section below
-for instructions on setting up NVRAM.
-
-To use termios, set the CD2401_USE_TERMIOS manifest constant to 1 in
-rtems/make/custom/mvme167.cfg, or configure the appropriate parameter in
-User Area Non-volatile RAM. See the Configuration Parameters section
-below for instructions on setting up NVRAM.
-
-The RTEMS console, i.e. the port used by stdin, stdout and stderr (do not
-confuse it with the port labelled Console on the MVME712), must be
-specified in the rtems/make/custom/mvme167.cfg file, or in the NVRAM
-parameters. Set the value of CONSOLE_MINOR appropriately. See below for a
-list of choices. See the Configuration Parameters section below for
-instructions on setting up NVRAM.
-
-The RTEMS printk port, i.e. the port where printk sends it debugging output
-text, must be specified in the rtems/make/custom/mvme167.cfg file, or in the
-NVRAM parameters. Set the value of PRINTK_MINOR appropriately. See below for a
-list of choices. See the Configuration Parameters section below for
-instructions on setting up NVRAM.
-
-Interrupt-driven and polled I/O cannot be mixed in the MVME167, except that
-printk always used polled I/O without termios. If interrupt-driven I/O is
-used and printk is used, do not open the device that printk uses from an
-RTEMS application.
-
-Console and printk port choices:
-
-  0 - /dev/tty0, Serial Port 1/Console on the MVME712M.
-  1 - /dev/tty1, Serial Port 2/TTY01 on the MVME712M.
-  2 - /dev/tty2, Serial Port 3 on the MVME712M.
-  3 - /dev/tty3, Serial Port 4 on the MVME712M.
-
-Setting the RTEMS console to port 0 when interrupt-driven I/O is specified
-will prevent 167-Bug from using that port.
-
-To use polled I/O on port 2 or 3, the port must be configured in 167-Bug. See
-the "PF" command in the "Debugging Package for Motorola 68K CISC CPUs User's
-Manual", part number 68KBUG.
-
-
-Floating-point
---------------
-
-The MC68040 has a built-in FPU. This FPU does not implement all the
-instruction of the MC68881/MC68882 floating-point coprocessors in
-hardware. The -m68040 compilation options instructs gcc to not generate
-the missing instructions. All of the RTEMS code is built this way. Some
-of the missing functionality must be supplied by external libraries. The
-required functions are part of libgcc.a.
-
-The issue gets complicated because libc, libm and libgcc do not come as
-m68040-specific variants. The default variants of these libraries are for the
-MC68020 and MC68030. There are specific variants for the MC68000 (which has
-limited addressing modes with respect to later family members), and specific
-variants for systems without a floating-point unit, either a built-in FPU or
-a coprocessor. These latter variants will be referred to as the msoft-float
-variants. There is a msoft-float variant for the MC68000, and one for the
-other family members.
-
-The default variants of libc, libm and libgcc appear to work just fine for the
-MC68040, AS LONG AS NO FLOATING POINT FUNCTIONS ARE CALLED. In particular,
-printf() and scanf() raise unimplemented floating-point instruction exceptions
-at run time. Expect almost every function that must compute a floating-point
-result to also raise unimplemented floating-point instruction exceptions. Do
-not use these variants if your application does any floating-point operations,
-unless you use the Motorola FPSP package (described further down).
-
-The msoft-float variants do print out floating-point numbers properly, but we
-have not tested them extensively, so use them with caution. In particular,
-the Paranoia test fails when linked with the msoft-float variants of the
-libraries; it goes into an infinite loop after milestone 40.
-
-MSOFT_FLOAT VARIANTS MUST BE USED TOGETHER. If you use the msoft-float variant
-of libc and libm, you must also linked with the msoft-float variant of libgcc,
-otherwise calls such as printf() print out floating-point values incorrectly.
-
-RTEMS comes with the Motorola FPSP (Floating-Point Support Package) for the
-MC68040 (rtems/c/src/lib/libcp/m68k/m68040/fpsp). This package emulates the
-missing floating-point instructions. It is built automatically for the
-MVME167 and installed in bsp_start().
-
-The FPSP allows the use of the default variants of libc, libm and libgcc.
-It also runs the paranoia test properly, and prints out the correct results.
-It should probably be used in preference to the msoft-float libraries, as it
-appears to work better. The disadvantage of the FPSP is that it increases the
-size of the executable by about 60KB and that it relies on run time
-exceptions.
-
-If your application does not do any floating-point operations at all, you
-should consider disabling the FPSP. In bsp_start(), emove the call to
-M68KFPSPInstallExceptionHandlers(), and uncomment the three lines in
-mvme167.cfg that redefine which variants of libc, libm and libgcc to link
-against.
-
-
-Configuration Parameters
-------------------------
-
-If Jumper J1-4 is installed, certain configuration parameters may be read from
-the first 31 bytes of User Area NVRAM starting at 0xFFFC0000. In this case, the
-remaining J1-[5-7] jumpers are ignored, and the user is responsible for writing
-the appropriate values in NVRAM (via 167-Bug) in order to alter the default
-behaviour. A zero value in NVRAM results in the default behaviour. The paramaters
-that are configurable and their default settings are described below. 
-		
-	Cache Mode (0xFFFC0000 - 1 byte)
-	  Set the following bits in the byte to set the desired cache mode:
-	    bit 0
-	      0 - data cache disable
-	      1 - data cache enable
-	    bit 1
-	      0 - instruction cache disable
-	      1 - instruction cache enable
-	    bits 2 & 3:
-		    00 = cachable, write-through
-		    01 = cachable, copyback
-		    10 = noncachable, serialized
-		    11 = noncachable
-
-	Console driver I/O mode (0xFFFC0001 - 1 byte)
-	  Set the following bits in the byte to set the desired I/O mode:
-	    bit 0
-	      0 - do not use termios
-	      1 - use termios
-	    bit 1
-	      0 - polled I/O
-	      1 - interrupt-driven I/O
-
-	Console driver ports (0xFFFC0002 - 1 byte)
-	  Set the following bits in the byte to select the console and printk ports:
-	    bit 0 & 1 select the RTEMS console port
-        00 - /dev/tty0, Serial Port 1/Console on the MVME712M.
-        01 - /dev/tty1, Serial Port 2/TTY01 on the MVME712M.
-        10 - /dev/tty2, Serial Port 3 on the MVME712M.
-        11 - /dev/tty3, Serial Port 4 on the MVME712M.
-	    bit 4 & 5 select the RTEMS printk port
-        00 - /dev/tty0, Serial Port 1/Console on the MVME712M.
-        01 - /dev/tty1, Serial Port 2/TTY01 on the MVME712M.
-        10 - /dev/tty2, Serial Port 3 on the MVME712M.
-        11 - /dev/tty3, Serial Port 4 on the MVME712M.
-    If the printk port is the same as some other port that will be opened by an
-    RTEMS application, then the driver must use polled I/O, or the printk port
-    must not be used.
-    
-	IP Address (0xFFFC0004 - 4 bytes)
-		write the hexadecimal representation of the IP address of the board in this
-		locatio, e.g. 192.168.1.2 = 0xC0A80102
-		default: obtain the IP address from an rtems_bsdnet_ifconfig structure
-
-	Netmask (0xFFFC0008 - 4 bytes)
-		write the hexadecimal representation of the netmask in this location
-		for example, 255.255.255.0 = 0xFFFFFF00
-		default: obtain the netmask from an rtems_bsdnet_ifconfig structure
-		
-	Ethernet Address (0xFFFC000C - 6 bytes)
-		write the Ethernet address of the board in this location
-		default: obtain the hardware address from an rtems_bsdnet_ifconfig
-		         structure
-
-	Processor ID (0xFFFC0012 - 2 bytes)
-		reserved for future use
-		
-	RMA start (0xFFFC0014 - 4 bytes)
-		reserved for future use
-		
-	VMA start (0xFFFC0018 - 4 bytes)
-		reserved for future use
-		
-	RamSize (0xFFFC001C - 4 bytes)
-		reserved for future use
-
-
-Cache Control and Memory Mapping
---------------------------------
-
-If configuration is not obtained from non-volatile RAM (ie. J1-4 is off),
-cache control is done through the remaining J1 jumpers as follows:
-
-If Jumper J1-7 is installed, the data cache will be turned on. If Jumper
-J1-6 is installed, the instruction cache will be turned on. (If a jumper
-is off, its corresponding cache will remain disabled).
-
-If Jumper J1-5 is installed, the data cache will be placed in copyback
-mode. If it is removed, it will be placed in writethrough mode.
-
-Currently, block address translation is set up to map the virtual
-0x00000000--0x7FFFFFFF to the physical range 0x00000000--0x7FFFFFFF. The
-port relies on the hardware to raise exceptions when addressing
-non-existent memory. Caching is not controllable on a finer grain.
-
-
-Networking
-----------
-
-If configuration is not obtained from non-volatile RAM (ie. J1-4 is off),
-the networking parameters shown above must be specified in an initialized
-rtems_bsdnet_ifconfig struct. This structure is declared and initialized to
-specify any network devices and includes entries for ip_address, ip_netmask
-and hardware_address. See the Network Device Configuration section of the
-RTEMS Networking Supplement.
-
-When non-default (non-zero) networking paramaters are provided in NVRAM (ie.
-j1-4 is on), the user MUST ensure that the corresponding entries in the
-ifconfig struct are NULL. Failing to do so is an error, because it causes
-the memory allocated for the initialized struct values to be lost.
-
-
-Miscellaneous
--------------
-
-The timer and clock drivers were patterned after the MVME162 and MVME152
-ports.
-
-At this time, we do not have an MPCI layer for the MVME167. We are planning
-to write one.
-
-This port supplies its own fatal_error_handler, which attempts to print some
-error message through 167Bug (on the Serial Port 1/Console on the MVME712M).
-
-
-Host System
------------
-
-The port was initially developed on an RS-6000 running AIX 4.2. The following
-tools were used:
-
-    - GNU gcc 2.8.1 configured for a powerpc-ibm-aix4.2.0.0 host and
-      m68k-rtems target;
-    - GNU binutils 2.9.1 configured for a powerpc-ibm-aix4.2.0.0 host and
-      m68k-rtems target;
-
-It was also tested on a Pentium II-based PC running Windows NT Workstation 4.0
-and the Cygnus Cygwin32 release b20.1 environment, with the following tools:
-
-    - EGCS 1.1.1 configured for a i586-cygwin32 host and m68k-rtems target;
-    - GNU binutils 2.9.4 configured for a i586-cygwin32 host and m68k-rtems
-      target;
-
-With the latter environment, be patient; builds take a very looong time...
-
-Current development is done on a Pentium III PC running RedHat Linux 6.1.
-At the time this README was composed, the latest working compiler that was
-used successfully was gcc version 2.96 20000213 (experimental). Both the C
-and C++ compilers were working. Binutils 2.10 are used.
-
-
-Known Problems
---------------
-
-Polled I/O without termios may not work very well on input. The problem
-is that input processing is not done: applications may get characters too
-early, and may get characters that they normally would not get, such as
-backspace or delete. Furthermore, input is not buffered at all. The latest
-versions of rtems seem to set the count field in the rtems_libio_rw_args_t
-argument to the buffer size, not to the number of characters expected on
-input. Rather than wait for 1024 characters on each call, the driver
-returns each character when it is received.
-
-The cdtest will not run with interrupt-driven I/O. The reason is that the
-constructors for the static objects are called at boot time when the
-interrupts are still disabled. The output buffer fills up, but never empties,
-and the application goes into an infinite loop waiting for buffer space. This
-should have been documented in the rtems/c/src/tests/PROBLEMS file. The moral
-of this story is: do not do I/O from the constructors or destructors of static
-objects.
-
-Output stops prematurely in the termios test when the console is operating in
-interrupt-driven mode because the serial port is re-initialized before all
-characters in the last raw output buffer are sent. Adding calls to tcdrain()
-in the test task helps, but it does not solve the problem. What happens is
-that the CD2401 raises a transmit interrupt when the last character in the
-DMA buffer is written into the transmit FIFO, not when the last character
-has been transmitted. When tcdrain() returns, there might be up to 16
-characters in the output FIFO. The call to tcsetattr() causes the serial port
-to re-initialize, at which point the output FIFO is cleared. We could not find
-a way to detect whether characters are still in the FIFO and to wait for them
-to be transmitted.
-
-The first raw buffer to be transmitted after the console is re-initialized
-with tcsetattr() is garbled. At this time, it does not seem worth while to
-track this problem down.
-
-In the stackchk test, an access fault exception is raised after the stack is
-blown. This is one case were overwritting the first or last 16 bytes of the
-stack does cause problems (but hey, an exception occurred, which is better
-than propagating the error).
-
-In the stackchk test, an access fault exception is raised after the stack is
-blown. This is one case were overwritting the first or last 16 bytes of the
-stack does cause problems (but hey, an exception occurred, which is better
-than propagating the error).
-
-When using interrupt-driven I/O, psx08 produces all the expected output, but
-it does not return control to 167Bug. Is this test supposed to work with
-interrupt-driven console I/O?
-
-
-What is new
------------
-
-Support for Java is being actively worked on.
-
-
-Thanks
-------
-
-- to On-Line Applications Research Corporation (OAR) for developing
-RTEMS and making it available on a Technology Transfer basis;
-
-- to FSF and Cygnus Support for great free software;
-
-
-Test Configuration
-------------------
-
-Board:                Motorola MVME167
-CPU:                  Motorola MC68040
-Clock Speed:          25 MHz
-RAM:                  4 MBytes of 32-bit DRAM with parity
-Cache Configuration:  Instruction cache on; data cache on, copyback mode.
-Times Reported in:    microseconds
-Timer Source:         VMEchip2 Tick Timer 1
-GCC Flags:            -m68040 -g -O4 -fomit-frame-pointer
-Console:              Operate in polled mode. Set CD2401_POLLED_IO to 1 in
-                      rtems/c/src/lib/libbsp/m68k/mvme167/console/console.c.     
-
-
-Test Results
-------------
-
-Single processor tests:  All tests passed, except the following ones:
-
-  - paranoia required the FPSP and the default variants of libm (and libc and
-    libgcc) for us. It may work with the msoft-float variants for you, but it
-    does require the FPSP.
-  
-  - cpuuse and malloctest did not work.
-  
-  - The stackchk test got an access fault exception before the RTEMS stack
-    checker had had a chance to detect the corrupted stack.
-                         
-                         
-Multi-processort tests:  not applicable -- No MPCI layer yet.
-
-
-Timing tests: See rtems/c/src/lib/libbsp/m68k/mvme167/times
-  
Index: c/src/lib/libbsp/m68k/uC5282/README
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,236 +1,0 @@
-Description: Arcturus Networks uC DIMM ColdFire 5282 
-============
- CPU: MCF5282, 64MHz
- RAM: 16M
-SRAM: 64k (BSP places FEC buffer descriptors here)
- ROM: 4M
-
-This is a credit-card sized board in a DIMM format. It is part of a family
-which includes Dragonball and Coldfire CPUs, with a standardized DIMM-based bus. 
-
-ACKNOWLEDGEMENTS:
-=================
-This BSP is based on the work of:
-    D. Peter Siddons
-    Till Straumann
-    Brett Swimley
-    Jay Monkman
-
-TODO:
-=====
-The bsp relies on the Arcturus monitor to set up DRAM and all chip selects. 
-This seems OK to me, but others may find it lame.....
-
-I/O pin restrictions make simultaneous operation of I2C, CAN and UART2
-impossible.  The BSP configures UART2 to use the CAN pins and leaves
-the I2C pins available for use.
- 
-BSP NAME:           uC5282
-BOARD:              Arcturus Netrworks uCdimm 5282
-BUS:                Arcturus DIMM bus, A24/D16, plus peripherals.
-CPU FAMILY:         ColdFire 5282
-CPU:                MCF5282
-COPROCESSORS:       N/A
-
-DEBUG MONITOR:      Arcturus bootloader
-
-PERIPHERALS
-===========
-TIMERS:             Four PIT (RTEMS clock is PIT3), Four Timers
-  RESOLUTION:       1 microsecond 
-SERIAL PORTS:       Internal UART 0, 1 and 2
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         Internal 10/100Mbs FEC, 100 Mb/s, full/half-duplex
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PIT3
-IOSUPP DRIVER:      none
-SHMSUPP:            none
-TIMER DRIVER:       TIMER3
-TTY DRIVER:         UART0, 1 and 2
-
-STDIO
-=====
-PORT:               UART0 Terminal
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-Downloading the image to the board.
-===================================
-The bootable image is generated by the make-exe target in the bsp makefile. It
-generates a simple stripped binary file which is downloaded over the ethernet
-port into RAM then executed or programmed into flash memory.
-
-1) Power up the uC5282 board. A dump of some memory maps is produced
-   followed by a prompt.
-
-2) (first time only)
-   Set the uC5282 board Internet configuration:
-        setenv IPADDR0 www.xxx.yyy.zzz  (Your board's address)
-        setenv NETMASK ppp.qqq.rrr.sss  (Your local network address mask)
-        setenv HOSTNAME somename        (Your board's name)
-
-3) Type 'tftp<CR>'
-   This forces the network link to half-duplex.  If your network link is
-   locked at full duplex you'll have to find another port!
-   The RTEMS network driver can be forced to 100 Mbs/full-duplex by setting
-   the bootstrap environment variable IPADDR0_100FULL to Y.  The driver can
-   be forced to 10 Mbs/half-duplex by setting the bootstrap environment
-   variable IPADDR0_10HALF to Y.
-
-4) Run 'tftp' on your host machine:
-        tftp> binary
-        tftp> connect www.xxx.yyy.zzz   (Your ucDIMM's address)
-        tftp> put someFile.exe          (someFile.boot for the EPICS build system)
-
-5) When the file has downloaded press the <ESC> key to terminate
-   the uCDIMM tftp command.
-
-6) Type 'goram<CR>' to start the downloaded program, or type 'program<CR>'
-to burn the code onto the uCDIMM flash.
-
-Clock Speed Determination Algorithm
-===================================
-Till Straumann submitted a patch to provide more dynamic clock speed
-selection. 
-
-Currently, the uC5282 BSP requires relinking the application with a
-special linker flag in order to make it work with 80MHz boards (breaking
-run-time compatibility with 64MHz variants).
-
-The change aims adds support for run-time guessing/setting of
-the system-clock frequency:
-
-1) If uCbootloader environment variable SYS_CLOCK_SPEED is set to a
-non-zero number then the BSP assumes this number to specify the clock
-frequency in Hz.
-
-2) If 1) yields no non-zero frequency then the linker-provided symbol
-_CPUClockSpeed is assumed to specify the clock frequency (in Hz). This
-is the traditional behavior but the default value of _CPUClockSpeed
-was changed from 64000000 to 0 (in order to let step 3) do it's work
-by default).
-
-3) If neither 1) nor 2) yield a non-zero frequency then assume a PLL
-reference frequency (in Hz) as defined by the linker-provided symbol
-'_PLLRefClockSpeed' (which defaults to 8000000) and compute the system
-clock frequency from the divisor/multiplier settings in the SYNCR
-register.
-
-We have both, 64MHz and 80MHz variants and both use a PLL reference of
-8MHz so that run-time heuristics + detection 3) work fine.
-
-EPICS Bootstrap Information
-===========================
-The EPICS startup code uses the following environment variables.  If an
-optional environment variable is missing the value in parentheses will be used.
-All Internet addresses must be given in 'dotted-decimal' format.
-HWADDR0    - Ethernet hardware address.
-IPADDR0    - Internet address (192.168.0.2).
-NETMASK    - Local network address mask (255.255.252.0).
-HOSTNAME   - Internet host name (iocNobody).
-GATEWAY    - Internet address of gateway machine (NULL).
-SERVER     - Internet address of NFS server (192.168.0.1).
-NAMESERVER - Internet address of DNS server (SERVER).
-DOMAIN     - DNS domain name (precompiled value from CONFIG_SITE).
-NTPSERVER  - Internet address of NTP server (SERVER).
-BOOTFILE   - Path to executable (epics/iocNobody/bin/RTEMS-uC5282/myApp.boot).
-CMDLINE    - Path to startup script (epics/iocBoot/iocNobody/st.cmd).
-NFSMOUNT   - NFS information: www.xxx.yyy.zzz:/remote/path /localpath
-             A : can also be used to separate the remote and local paths.
-             If NFSMOUNT is not set, SERVER will be used as the NFS server,
-             and the remote and local paths will be taken from the first
-             component of CMDLINE.  If CMDLINE does not begin with a /
-             then '/tftpboot' is prepended to the remote path.  This allows
-             a remote TFTP and NFS server to be handled transaparently.
-
-
-============================================================================
-
-      Memory map as set up by dBUG bootstrap and BSP initialization
-
-          +--------------------------------------------------+
-0000 0000 |       16 MByte SDRAM                             | 00FF FFFF
-0100 0000 |  ---------------------------------------------   |
-          |    Address space for future SDRAM expansion      |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 0FFF FFFF
-          +--------------------------------------------------+
-1000 0000 | External 4 MByte flash memory                    |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 1FFF FFFF
-          +--------------------------------------------------+
-2000 0000 | 64 kByte on-chip SRAM (RAMBAR)                   |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 2FFF FFFF
-          +--------------------------------------------------+
-3000 0000 |  CS1* (devLib 'VME' A24 space)                   | 30FF FFFF
-3100 0000 |  CS2* (devLib 'VME' A32 and A16 space)          x| 31FF FFFF
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 3FFF FFFF
-          +--------------------------------------------------+
-4000 0000 | Internal peripheral system (IPSBAR)              |
-          .                                                  .
-4400 0000 | Backdoor access to on-chip flash                 |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | 4FFF FFFF
-          +--------------------------------------------------+
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          +--------------------------------------------------+
-f000 0000 | 512 kByte on-chip flash (FLASHBAR)               |
-          .                                                  .
-          .                                                  .
-          .                                                  .
-          |                                                  | fFFF FFFF
-          +--------------------------------------------------+
-
-x - Final 16-bit location of CS2* space is reserved for FPGA interrupt status.
-
-============================================================================
-
-      Interrupt map
-
-External interrupt lines (priority is fixed between 3 and 4):
-    IRQ7* - Ethernet Transceiver interrupts
-    IRQ1* - FPGA ('VME') interrupts.
-+-----+-----------------------------------------------------------------------+
-|     |                                PRIORITY                               |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  7  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  6  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  5  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  4  | FEC RX | FEC TX |        |        |        |        |        |   PIT  |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  2  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-|  1  |        |        |        |        |        |        |        |        |
-+-----+--------+--------+--------+--------+--------+--------+--------+--------+
-
-============================================================================
-
Index: c/src/lib/libbsp/m68k/uC5282/TIMES
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/TIMES	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,305 +1,0 @@
-TIMING TESTS  2005-01-28
-========================
-
-*** TIME TEST 1 ***
-rtems_semaphore_create 19
-rtems_semaphore_delete 21
-rtems_semaphore_obtain: available 4
-rtems_semaphore_obtain: not available -- NO_WAIT 5
-rtems_semaphore_release: no waiting tasks 12
-*** END OF TEST 1 ***
-
-*** TIME TEST 2 ***
-rtems_semaphore_obtain: not available -- caller blocks 34
-*** END OF TEST 2 ***
-
-*** TIME TEST 3 ***
-rtems_semaphore_release: task readied -- preempts caller 27
-*** END OF TEST 3 ***
-
-*** TIME TEST 4 ***
-rtems_task_restart: blocked task -- preempts caller 54
-rtems_task_restart: ready task -- preempts caller 52
-rtems_semaphore_release: task readied -- returns to caller 18
-rtems_task_create 87
-rtems_task_start 24
-rtems_task_restart: suspended task -- returns to caller 27
-rtems_task_delete: suspended task 66
-rtems_task_restart: ready task -- returns to caller 28
-rtems_task_restart: blocked task -- returns to caller 38
-rtems_task_delete: blocked task 69
-*** END OF TEST 4 ***
-
-*** TIME TEST 5 ***
-rtems_task_suspend: calling task 23
-rtems_task_resume: task readied -- preempts caller 22
-*** END OF TEST 5 ***
-
-*** TIME TEST 6 ***
-rtems_task_restart: calling task 30
-rtems_task_suspend: returns to caller 9
-rtems_task_resume: task readied -- returns to caller 12
-rtems_task_delete: ready task 69
-*** END OF TEST 6 ***
-
-*** TIME TEST 7 ***
-rtems_task_restart: suspended task -- preempts caller 44
-*** END OF TEST 7 ***
-
-*** TIME TEST 9 ***
-rtems_message_queue_create 55
-rtems_message_queue_send: no waiting tasks 20
-rtems_message_queue_urgent: no waiting tasks 21
-rtems_message_queue_receive: available 20
-rtems_message_queue_flush: no messages flushed 8
-rtems_message_queue_flush: messages flushed 12
-rtems_message_queue_delete 29
-*** END OF TEST 9 ***
-
-*** TIME TEST 10 ***
-rtems_message_queue_receive: not available -- NO_WAIT 10
-rtems_message_queue_receive: not available -- caller blocks 38
-*** END OF TEST 10 ***
-
-*** TIME TEST 11 ***
-rtems_message_queue_send: task readied -- preempts caller 37
-*** END OF TEST 11 ***
-
-*** TIME TEST 12 ***
-rtems_message_queue_send: task readied -- returns to caller 23
-*** END OF TEST 12 ***
-
-*** TIME TEST 13 ***
-rtems_message_queue_urgent: task readied -- preempts caller 35
-*** END OF TEST 13 ***
-
-*** TIME TEST 14 ***
-rtems_message_queue_urgent: task readied -- returns to caller 24
-*** END OF TEST 14 ***
-
-*** TIME TEST 15 ***
-rtems_event_receive: obtain current events 0
-rtems_event_receive: not available -- NO_WAIT 5
-rtems_event_receive: not available -- caller blocks 28
-rtems_event_send: no task readied 5
-rtems_event_receive: available 9
-rtems_event_send: task readied -- returns to caller 16
-*** END OF TEST 15 ***
-
-*** TIME TEST 16 ***
-rtems_event_send: task readied -- preempts caller 27
-*** END OF TEST 16 ***
-
-*** TIME TEST 17 ***
-rtems_task_set_priority: preempts caller 39
-*** END OF TEST 17 ***
-
-*** TIME TEST 18 ***
-rtems_task_delete: calling task 83
-*** END OF TEST 18 ***
-
-*** TIME TEST 19 ***
-rtems_signal_catch 5
-rtems_signal_send: returns to caller 12
-rtems_signal_send: signal to self 20
-exit ASR overhead: returns to calling task 15
-exit ASR overhead: returns to preempting task 18
-*** END OF TEST 19 ***
-
-*** TIME TEST 20 ***
-rtems_partition_create 20
-rtems_region_create 40
-rtems_partition_get_buffer: available 11
-rtems_partition_get_buffer: not available 7
-rtems_partition_return_buffer 12
-rtems_partition_delete 11
-rtems_region_get_segment: available 28
-rtems_region_get_segment: not available -- NO_WAIT 29
-rtems_region_return_segment: no waiting tasks 29
-rtems_region_get_segment: not available -- caller blocks 55
-rtems_region_return_segment: task readied -- preempts caller 72
-rtems_region_return_segment: task readied -- returns to caller 58
-rtems_region_delete 25
-rtems_io_initialize 1
-rtems_io_open 1
-rtems_io_close 1
-rtems_io_read 1
-rtems_io_write 1
-rtems_io_control 1
-*** END OF TEST 20 ***
-
-*** TIME TEST 21 ***
-rtems_task_ident 60
-rtems_message_queue_ident 60
-rtems_semaphore_ident 69
-rtems_partition_ident 59
-rtems_region_ident 60
-rtems_port_ident 59
-rtems_timer_ident 61
-rtems_rate_monotonic_ident 60
-*** END OF TEST 21 ***
-
-*** TIME TEST 22 ***
-rtems_message_queue_broadcast: task readied -- returns to caller 32
-rtems_message_queue_broadcast: no waiting tasks 14
-rtems_message_queue_broadcast: task readied -- preempts caller 39
-*** END OF TEST 22 ***
-
-*** TIME TEST 23 ***
-rtems_timer_create 8
-rtems_timer_fire_after: inactive 12
-rtems_timer_fire_after: active 12
-rtems_timer_cancel: active 9
-rtems_timer_cancel: inactive 8
-rtems_timer_reset: inactive 14
-rtems_timer_reset: active 15
-rtems_timer_fire_when: inactive 21
-rtems_timer_fire_when: active 21
-rtems_timer_delete: active 12
-rtems_timer_delete: inactive 11
-rtems_task_wake_when 35
-*** END OF TEST 23 ***
-
-*** TIME TEST 24 ***
-rtems_task_wake_after: yield -- returns to caller 3
-rtems_task_wake_after: yields -- preempts caller 18
-*** END OF TEST 24 ***
-
-*** TIME TEST 25 ***
-rtems_clock_tick 7
-*** END OF TEST 25 ***
-
-*** TIME TEST 26 ***
-_ISR_Disable 1
-_ISR_Flash 0
-_ISR_Enable 0
-_Thread_Disable_dispatch 1
-_Thread_Enable_dispatch 3
-_Thread_Set_state 7
-_Thread_Disptach (NO FP) 16
-context switch: no floating point contexts 12
-context switch: self 2
-context switch: to another task 1
-fp context switch: restore 1st FP task 14
-fp context switch: save idle, restore initialized 3
-fp context switch: save idle, restore idle 13
-fp context switch: save initialized, restore initialized 2
-_Thread_Resume 7
-_Thread_Unblock 6
-_Thread_Ready 5
-_Thread_Get 1
-_Semaphore_Get 1
-_Thread_Get: invalid id 0
-*** END OF TEST 26 ***
-
-*** TIME TEST 27 ***
-interrupt entry overhead: returns to interrupted task 3
-interrupt exit overhead: returns to interrupted task 3
-interrupt entry overhead: returns to nested interrupt 2
-interrupt exit overhead: returns to nested interrupt 2
-interrupt entry overhead: returns to preempting task 4
-interrupt exit overhead: returns to preempting task 20
-*** END OF TEST 27 ***
-
-*** TIME TEST 28 ***
-rtems_port_create 12
-rtems_port_external_to_internal 5
-rtems_port_internal_to_external 6
-rtems_port_delete 12
-*** END OF TEST 28 ***
-
-*** TIME TEST 29 ***
-rtems_rate_monotonic_create 13
-rtems_rate_monotonic_period: initiate period -- returns to caller 20
-rtems_rate_monotonic_period: obtain status 10
-rtems_rate_monotonic_cancel 13
-rtems_rate_monotonic_delete: inactive 17
-rtems_rate_monotonic_delete: active 16
-rtems_rate_monotonic_period: conclude periods -- caller blocks 24
-*** END OF TEST 29 ***
-
-*** TIME CHECKER ***
-Units may not be in microseconds for this test!!!
-0 100000
-Total time = 0
-Average time = 0
-NULL timer stopped at 0
-LOOP (1000) timer stopped at 188
-LOOP (10000) timer stopped at 1875
-LOOP (50000) timer stopped at 9375
-LOOP (100000) timer stopped at 18750
-*** END OF TIME CHECKER ***
-
-*** TIME TEST OVERHEAD ***
-rtems_initialize_executive 0
-rtems_shutdown_executive 0
-rtems_task_create 0
-rtems_task_ident 0
-rtems_task_start 0
-rtems_task_restart 0
-rtems_task_delete 0
-rtems_task_suspend 0
-rtems_task_resume 0
-rtems_task_set_priority 0
-rtems_task_mode 0
-rtems_task_get_note 0
-rtems_task_set_note 0
-rtems_task_wake_when 1
-rtems_task_wake_after 0
-rtems_interrupt_catch 0
-rtems_clock_get 1
-rtems_clock_set 1
-rtems_clock_tick 0
-rtems_timer_create 0
-rtems_timer_delete 0
-rtems_timer_ident 0
-rtems_timer_fire_after 1
-rtems_timer_fire_when 1
-rtems_timer_reset 0
-rtems_timer_cancel 0
-rtems_semaphore_create 0
-rtems_semaphore_delete 0
-rtems_semaphore_ident 0
-rtems_semaphore_obtain 0
-rtems_semaphore_release 0
-rtems_message_queue_create 0
-rtems_message_queue_ident 0
-rtems_message_queue_delete 0
-rtems_message_queue_send 0
-rtems_message_queue_urgent 0
-rtems_message_queue_broadcast 0
-rtems_message_queue_receive 0
-rtems_message_queue_flush 0
-rtems_event_send 0
-rtems_event_receive 0
-rtems_signal_catch 0
-rtems_signal_send 0
-rtems_partition_create 0
-rtems_partition_ident 0
-rtems_partition_delete 0
-rtems_partition_get_buffer 0
-rtems_partition_return_buffer 0
-rtems_region_create 0
-rtems_region_ident 0
-rtems_region_delete 0
-rtems_region_get_segment 0
-rtems_region_return_segment 0
-rtems_port_create 0
-rtems_port_ident 0
-rtems_port_delete 0
-rtems_port_external_to_internal 0
-rtems_port_internal_to_external 0
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-rtems_fatal_error_occurred 0
-rtems_rate_monotonic_create 0
-rtems_rate_monotonic_ident 0
-rtems_rate_monotonic_delete 0
-rtems_rate_monotonic_cancel 0
-rtems_rate_monotonic_period 0
-rtems_multiprocessing_announce 0
-*** END OF TIME OVERHEAD ***
Index: c/src/lib/libbsp/mips/csb350/README
===================================================================
--- c/src/lib/libbsp/mips/csb350/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,9 +1,0 @@
-#
-#  README
-#
-
-BSP for the Cogent CSB350 Au1100 based board
-
-http://www.cogcomp.com/csb_csb350.htm
-
-This BSP will also work with the CSB250 which uses an Au1500.
Index: c/src/lib/libbsp/mips/hurricane/README
===================================================================
--- c/src/lib/libbsp/mips/hurricane/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,46 +1,0 @@
-#
-#  README,v 1.2 1998/01/16 16:56:31 joel Exp
-#
-# @(#)README        08/20/96     1.2
-#
-
-BSP NAME:           hurricane
-BOARD:              Quick Logic Hurricane SBC with V320USC
-BUS:                N/A
-CPU FAMILY:         mips
-CPU:                PMC-Sierra RM5231 
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:      PMON
-
-PERIPHERALS
-===========
-TIMERS:             V320USC internal
-SERIAL PORTS:       PMON controlled
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       V320USC internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A 
-TIMER DRIVER:       V320USC internal
-TTY DRIVER:         uses PMON
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
Index: c/src/lib/libbsp/mips/jmr3904/README
===================================================================
--- c/src/lib/libbsp/mips/jmr3904/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,30 +1,0 @@
-Simple BSP for the TX3904 simulator built into gdb.
-
-Simulator Invocation
-====================
-The following is how the simulator is invoked.
-
-target sim --board=jmr3904
-
-GDB must be configured with a target like "tx39-rtems".  Otherwise,
-the simulator will not be built for the correct instruction
-and peripheral set.
-
-Simulator Information
-=====================
-The simulated system clock counts instructions.  Setting the clock
-source to "clock" and the divider to 1 results in the timer directly
-counting the number of instructions executed.
-
-Status
-======
-
-+ hello.exe locks up while running the global destructors.  This almost
-  has to be a linkcmds issue.
-
-+ Workaround: bspclean.c actually explicits invokes _sys_exit() BEFORE
-  letting the global destructors run.
-
-+ There is a clock tick device driver which has not been calibrated.
-
-+ There is no timer device driver.
Index: c/src/lib/libbsp/mips/malta/STATUS
===================================================================
--- c/src/lib/libbsp/mips/malta/STATUS	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,42 +1,0 @@
-17 Februrary 2011
-
-XXX
-
-This is a BSP for the MIPS Malta board with a 24K CPU on it.
-It has ONLY been tested on Qemu.
-
-Anything not mentioned has not been touched at all and will
-most likely not be in the first release of the BSP.
-
-Working
-=======
-+ Board initialization and shutdown
-+ tty0 working polled
-+ tty1 working polled (see note in issues)
-+ tty2 working polled (see notes in issues)
-+ Clock Tick
-
-
-Issues
-======
-+ We have small hack to Qemu so reset will exit.  This needs to be
-  fixed to follow the PC386 Qemu model where a command line argument
-  selects reset or exit on reset.
-
-+ tty2 is generating an interrupt which causes a TLB fault. We have
-  disabled the interrupt in the CPU interrupt mask for now.
-
-+ tty1 and tty2 are not showing any data on the screen.  This is
-  most likely an issue with qemu since the status bit is changing
-  as the characters are polled out.  
-
-TBD
-===
-+ Conversion to Programmable Interrupt Controller IRQ model
-  using shared infrastructure
-+ tty0 working interrupt driver
-+ tty1 working interrupt driver
-+ tty2 working interrupt driver
-+ PCI Bus Support
-+ AMD AM79C973 NIC
-+ Consider moving mips_interrupt_mask() into BSP.
Index: c/src/lib/libbsp/mips/rbtx4925/README
===================================================================
--- c/src/lib/libbsp/mips/rbtx4925/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,44 +1,0 @@
-#
-#  README
-#
-
-BSP NAME:           rbtx4925
-BOARD:              Toshiba RBTX4925 SBC
-BUS:                N/A
-CPU FAMILY:         mips
-CPU:                TX4925
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:      PMON
-
-PERIPHERALS
-===========
-TIMERS:             TX4925 internal
-SERIAL PORTS:       PMON controlled
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       TX4925 internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A 
-TIMER DRIVER:       TX4925 internal
-TTY DRIVER:         uses PMON
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
Index: c/src/lib/libbsp/mips/rbtx4938/README
===================================================================
--- c/src/lib/libbsp/mips/rbtx4938/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,44 +1,0 @@
-#
-#  README
-#
-
-BSP NAME:           rbtx4938
-BOARD:              Toshiba RBTX4938 SBC
-BUS:                N/A
-CPU FAMILY:         mips
-CPU:                TX4938
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:      PMON
-
-PERIPHERALS
-===========
-TIMERS:             TX4938 internal
-SERIAL PORTS:       PMON controlled
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       TX4938 internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A 
-TIMER DRIVER:       TX4938 internal
-TTY DRIVER:         uses PMON
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
Index: c/src/lib/libbsp/nios2/README
===================================================================
--- c/src/lib/libbsp/nios2/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,76 +1,0 @@
-#  Goal is to have BSPs build almost completely automatically from a template
-#  and information that comes from SOPC Builder as a .PTF file. Most of the
-#  code will go to a shared/ BSP directory.
-#
-#  Ideally, updates to the PTF shouldn't cause any pain for the maintainer
-#  of a specific BSP (possibly with enhancements not covered by the
-#  automatic BSP creation).
-#
-#  Some first steps toward utilizing SOPC Builder PTF output can be found
-#  in top level /tools/cpu/nios2. Also see the README there.
-#
-#   Implemented (in shared/ subdirectory)
-#     Clock driver
-#     Timer driver
-#     Console via JTAG UART
-#
-#   Todo;
-#     Support more peripherals. My priorities:
-#       - (improve) Altera Avalon JTAG UART
-#       - Altera Avalon UART
-#       - OpenCores.org I2C Master
-#       - Altera SPI Core / EPCS Configuration Device
-#       - OpenCores.org 10/100 Ethernet MAC (use existing driver)
-#       - (more) Altera Avalon Timer
-#
-#     Put all drivers aside in a shared/ subdirectory.
-#     Update the "times" file for NIOS2 with and without icache.
-#
-#   Missing (although it looks like it's there)
-#     Data cache handling (for now, don't use the "fast" NIOS2)
-#     SHM support (just taken over the code from no_cpu/no_bsp)
-#
-#  Kolja Waschk, 6/2006
-#    
-
-BSP NAME:           nios2_eb2_1
-BOARD:              Altera Instruction Set Simulator Default plus second timer
-BUS:                Avalon
-CPU FAMILY:         nios2
-CPU:                small
-COPROCESSORS:       none
-MODE:               32 bit mode
-
-DEBUG MONITOR:      none
-
-PERIPHERALS
-===========
-TIMERS:             Altera Avalon Timer
-  RESOLUTION:         .0001 microseconds
-SERIAL PORTS:       Altera Avalon JTAG UART
-REAL-TIME CLOCK:    none
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       Altera Avalon Timer
-IOSUPP DRIVER:      none
-SHMSUPP:            polled
-TIMER DRIVER:       Altera Avalon Timer
-TTY DRIVER:         none
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         JTAG
-BAUD:               115200
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
Index: c/src/lib/libbsp/nios2/nios2_iss/nios2_iss.ptf
===================================================================
--- c/src/lib/libbsp/nios2/nios2_iss/nios2_iss.ptf	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,1800 +1,0 @@
-SYSTEM Nios2_system
-{
-   System_Wizard_Version = "4.10";
-   System_Wizard_Build = "181";
-   WIZARD_SCRIPT_ARGUMENTS 
-   {
-      device_family = "STRATIX";
-      clock_freq = "50000000";
-      generate_hdl = "0";
-      generate_sdk = "0";
-      do_build_sim = "0";
-      hdl_language = "vhdl";
-      view_master_columns = "1";
-      view_master_priorities = "0";
-      board_class = "";
-      name_column_width = "75";
-      desc_column_width = "75";
-      bustype_column_width = "0";
-      base_column_width = "75";
-      end_column_width = "75";
-      view_frame_window = "170:208:1280:900";
-      do_log_history = "0";
-      device_family_id = "STRATIX";
-      BOARD_INFO 
-      {
-         device_is_engineering_sample = "";
-      }
-   }
-   MODULE cpu_0
-   {
-      class = "altera_nios2";
-      class_version = "1.0";
-      iss_model_name = "altera_nios2";
-      HDL_INFO 
-      {
-         PLI_Files = "";
-         Simulation_HDL_Files = "";
-         Synthesis_HDL_Files = "__PROJECT_DIRECTORY__/cpu_0_test_bench.vhd, __PROJECT_DIRECTORY__/cpu_0_mult_cell.vhd, __PROJECT_DIRECTORY__/cpu_0_jtag_debug_module.vhd, __PROJECT_DIRECTORY__/cpu_0_jtag_debug_module_wrapper.vhd, __PROJECT_DIRECTORY__/cpu_0.vhd";
-         Precompiled_Simulation_Library_Files = "";
-         Synthesis_Only_Files = "";
-      }
-      MASTER instruction_master
-      {
-         PORT_WIRING 
-         {
-            PORT i_address
-            {
-               direction = "output";
-               type = "address";
-               width = "28";
-            }
-            PORT i_read
-            {
-               direction = "output";
-               type = "read";
-               width = "1";
-            }
-            PORT i_readdata
-            {
-               direction = "input";
-               type = "readdata";
-               width = "32";
-            }
-            PORT i_readdatavalid
-            {
-               direction = "input";
-               type = "readdatavalid";
-               width = "1";
-            }
-            PORT i_waitrequest
-            {
-               direction = "input";
-               type = "waitrequest";
-               width = "1";
-            }
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "32";
-            Address_Width = "8";
-            Is_Instruction_Master = "1";
-            Has_IRQ = "0";
-            Irq_Scheme = "individual_requests";
-            Interrupt_Range = "0-0";
-            Is_Enabled = "1";
-         }
-      }
-      MASTER data_master
-      {
-         PORT_WIRING 
-         {
-            PORT clk
-            {
-               direction = "input";
-               type = "clk";
-               width = "1";
-            }
-            PORT d_address
-            {
-               direction = "output";
-               type = "address";
-               width = "28";
-            }
-            PORT d_byteenable
-            {
-               direction = "output";
-               type = "byteenable";
-               width = "4";
-            }
-            PORT d_irq
-            {
-               direction = "input";
-               type = "irq";
-               width = "32";
-            }
-            PORT d_read
-            {
-               direction = "output";
-               type = "read";
-               width = "1";
-            }
-            PORT d_readdata
-            {
-               direction = "input";
-               type = "readdata";
-               width = "32";
-            }
-            PORT d_waitrequest
-            {
-               direction = "input";
-               type = "waitrequest";
-               width = "1";
-            }
-            PORT d_write
-            {
-               direction = "output";
-               type = "write";
-               width = "1";
-            }
-            PORT d_writedata
-            {
-               direction = "output";
-               type = "writedata";
-               width = "32";
-            }
-            PORT jtag_debug_module_debugaccess_to_roms
-            {
-               direction = "output";
-               type = "debugaccess";
-               width = "1";
-            }
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Register_Incoming_Signals = "1";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "32";
-            Address_Width = "8";
-            Is_Data_Master = "1";
-            Has_IRQ = "1";
-            Irq_Scheme = "individual_requests";
-            Interrupt_Range = "0-31";
-            Is_Enabled = "1";
-         }
-      }
-      SLAVE oci_core
-      {
-         PORT_WIRING 
-         {
-            PORT byteenable
-            {
-               direction = "input";
-               type = "byteenable";
-               width = "4";
-            }
-            PORT oci_core_address
-            {
-               direction = "input";
-               type = "address";
-               width = "9";
-            }
-            PORT oci_core_begintransfer
-            {
-               direction = "input";
-               type = "begintransfer";
-               width = "1";
-            }
-            PORT oci_core_clk
-            {
-               direction = "input";
-               type = "clk";
-               width = "1";
-            }
-            PORT oci_core_readdata
-            {
-               direction = "output";
-               type = "readdata";
-               width = "32";
-            }
-            PORT oci_core_reset
-            {
-               direction = "input";
-               type = "reset";
-               width = "1";
-            }
-            PORT oci_core_resetrequest
-            {
-               direction = "output";
-               type = "resetrequest";
-               width = "1";
-            }
-            PORT oci_core_select
-            {
-               direction = "input";
-               type = "chipselect";
-               width = "1";
-            }
-            PORT oci_core_write
-            {
-               direction = "input";
-               type = "write";
-               width = "1";
-            }
-            PORT oci_core_writedata
-            {
-               direction = "input";
-               type = "writedata";
-               width = "32";
-            }
-            PORT reset_n
-            {
-               direction = "input";
-               type = "reset_n";
-               width = "1";
-            }
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Read_Wait_States = "1";
-            Write_Wait_States = "1";
-            Register_Incoming_Signals = "1";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Address_Width = "9";
-            Accepts_Internal_Connections = "1";
-            Requires_Internal_Connections = "instruction_master,data_master";
-            Accepts_External_Connections = "0";
-            Is_Enabled = "1";
-            Address_Alignment = "dynamic";
-            Base_Address = "0x08100000";
-            Is_Memory_Device = "1";
-            Is_Printable_Device = "1";
-            Uses_Tri_State_Data_Bus = "0";
-            Has_IRQ = "0";
-            JTAG_Hub_Base_Id = "69702";
-            JTAG_Hub_Instance_Id = "0";
-            MASTERED_BY cpu_0/instruction_master
-            {
-               priority = "1";
-            }
-            MASTERED_BY cpu_0/data_master
-            {
-               priority = "1";
-            }
-            IRQ_MASTER cpu_0/data_master
-            {
-               IRQ_Number = "NC";
-            }
-         }
-      }
-      WIZARD_SCRIPT_ARGUMENTS 
-      {
-         CPU_Architecture = "nios2";
-         do_generate = "1";
-         cpu_selection = "f";
-         CPU_Implementation = "fast";
-         cache_has_dcache = "1";
-         cache_has_icache = "1";
-         cache_dcache_size = "2048";
-         cache_icache_size = "4096";
-         include_debug = "0";
-         include_trace = "0";
-         include_oci = "1";
-         debug_level = "2";
-         oci_offchip_trace = "0";
-         oci_onchip_trace = "0";
-         oci_trace_addr_width = "7";
-         oci_num_xbrk = "0";
-         oci_num_dbrk = "0";
-         oci_dbrk_trace = "0";
-         oci_dbrk_pairs = "0";
-         oci_debugreq_signals = "0";
-         oci_instance_number = "1";
-         hardware_multiply_present = "1";
-         hardware_divide_present = "0";
-         bht_ptr_sz = "8";
-         reset_slave = "onchip_memory_0/s1";
-         reset_offset = "0x00000000";
-         exc_slave = "onchip_memory_0/s1";
-         exc_offset = "0x00000600";
-         break_slave = "cpu_0/jtag_debug_module";
-         break_offset = "0x00000020";
-         altera_internal_test = "0";
-         full_waveform_signals = "0";
-         activate_model_checker = "0";
-         bit_31_bypass_dcache = "1";
-         always_bypass_dcache = "0";
-         always_unsigned_mul = "0";
-         consistent_synthesis = "0";
-         ibuf_ptr_sz = "4";
-         jtb_ptr_sz = "5";
-         performance_counters_present = "0";
-         performance_counters_width = "32";
-         ras_ptr_sz = "4";
-         inst_decode_in_submodule = "0";
-         register_dependency_in_submodule = "0";
-         source_operands_in_submodule = "0";
-         alu_in_submodule = "0";
-         stdata_in_submodule = "0";
-         shift_rot_2N_in_submodule = "0";
-         control_regs_in_submodule = "0";
-         mult_cell_in_submodule = "0";
-         M_inst_result_mux_in_submodule = "0";
-         dcache_load_aligner_in_submodule = "0";
-         hardware_divide_in_submodule = "0";
-         mult_result_mux_in_submodule = "0";
-         shift_rotate_in_submodule = "0";
-         register_file_write_data_mux_in_submodule = "0";
-         avalon_imaster_in_submodule = "0";
-         avalon_dmaster_in_submodule = "0";
-         avalon_load_aligner_in_submodule = "0";
-         hbreak_test = "0";
-         iss_trace_on = "0";
-         iss_trace_warning = "1";
-         iss_trace_info = "1";
-         iss_trace_disassembly = "0";
-         iss_trace_registers = "0";
-         iss_trace_instr_count = "0";
-         iss_software_debug = "0";
-         iss_software_debug_port = "9996";
-         iss_memory_dump_start = "";
-         iss_memory_dump_end = "";
-         CONSTANTS 
-         {
-            CONSTANT __nios_catch_irqs__
-            {
-               value = "1";
-               comment = "Include panic handler for all irqs (needs uart)";
-            }
-            CONSTANT __nios_use_constructors__
-            {
-               value = "1";
-               comment = "Call c++ static constructors";
-            }
-            CONSTANT __nios_use_small_printf__
-            {
-               value = "1";
-               comment = "Smaller non-ANSI printf, with no floating point";
-            }
-            CONSTANT nasys_has_icache
-            {
-               value = "0";
-               comment = "True if instruction cache present";
-            }
-            CONSTANT nasys_icache_size
-            {
-               value = "4096";
-               comment = "Size in bytes of instruction cache";
-            }
-            CONSTANT nasys_icache_line_size
-            {
-               value = "32";
-               comment = "Size in bytes of each icache line";
-            }
-            CONSTANT nasys_icache_line_size_log2
-            {
-               value = "5";
-               comment = "Log2 size in bytes of each icache line";
-            }
-            CONSTANT nasys_has_dcache
-            {
-               value = "0";
-               comment = "True if instruction cache present";
-            }
-            CONSTANT nasys_dcache_size
-            {
-               value = "2048";
-               comment = "Size in bytes of data cache";
-            }
-            CONSTANT nasys_dcache_line_size
-            {
-               value = "4";
-               comment = "Size in bytes of each dcache line";
-            }
-            CONSTANT nasys_dcache_line_size_log2
-            {
-               value = "2";
-               comment = "Log2 size in bytes of each dcache line";
-            }
-         }
-         mainmem_slave = "";
-         datamem_slave = "";
-         maincomm_slave = "";
-         debugcomm_slave = "";
-         germs_monitor_id = "";
-         asp_debug = "0";
-         asp_core_debug = "0";
-         include_third_party_debug_port = "0";
-         oci_data_trace = "0";
-         oci_num_pm = "0";
-         oci_pm_width = "40";
-         oci_trigger_arming = "1";
-         break_slave_override = "";
-         break_offset_override = "0x20";
-         legacy_sdk_support = "0";
-         altera_show_unreleased_features = "0";
-         illegal_instructions_trap = "0";
-         remove_hardware_multiplier = "0";
-         large_dcache_allow_mram = "0";
-         cache_omit_dcache = "0";
-         cache_omit_icache = "0";
-         omit_instruction_master = "0";
-         omit_data_master = "0";
-         num_local_data_masters = "0";
-         num_local_instruction_masters = "0";
-         gui_branch_prediction_type = "Automatic";
-         branch_prediction_type = "Dynamic";
-         bht_index_pc_only = "0";
-         mmu_present = "0";
-         process_id_num_bits = "10";
-         dtlb_ptr_sz = "7";
-         dtlb_num_ways = "4";
-         udtlb_num_entries = "6";
-         itlb_ptr_sz = "7";
-         itlb_num_ways = "4";
-         uitlb_num_entries = "4";
-         fast_tlb_miss_exc_slave = "onchip_memory_0/s1";
-         fast_tlb_miss_exc_offset = "0x00000000";
-         always_encrypt = "1";
-         activate_monitors = "1";
-         activate_test_end_checker = "0";
-         activate_trace = "1";
-         clear_x_bits_ld_non_bypass = "1";
-         hdl_sim_caches_cleared = "1";
-         allow_full_address_range = "0";
-         Boot_Copier = "boot_loader_cfi.srec";
-         Boot_Copier_EPCS = "boot_loader_epcs.srec";
-         license_status = "ocp";
-      }
-      SYSTEM_BUILDER_INFO 
-      {
-         Parameters_Signature = "";
-         Is_CPU = "1";
-         Is_Enabled = "1";
-         Instantiate_In_System_Module = "1";
-         Default_Module_Name = "cpu";
-         View 
-         {
-            MESSAGES 
-            {
-            }
-            Is_Collapsed = "0";
-            Settings_Summary = "Nios II/f
-            <br>&nbsp;&nbsp;4-Kbyte Instruction Cache
-            <br>&nbsp;&nbsp;2-Kbyte Data Cache
-            <br>&nbsp;&nbsp;JTAG Debug Module
-            ";
-         }
-         Required_Device_Family = "STRATIX,STRATIXII,CYCLONE";
-      }
-      SOFTWARE_COMPONENT altera_hal
-      {
-         class = "altera_hal";
-         class_version = "1.0";
-         WIZARD_SCRIPT_ARGUMENTS 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Is_Enabled = "1";
-         }
-      }
-      SOFTWARE_COMPONENT altera_nios2_test
-      {
-         class = "altera_nios2_test";
-         class_version = "2.0";
-         WIZARD_SCRIPT_ARGUMENTS 
-         {
-            CONSTANTS 
-            {
-               CONSTANT debug_on
-               {
-                  value = "0";
-                  comment = "Enable debug features";
-               }
-            }
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Is_Enabled = "0";
-         }
-      }
-      SOFTWARE_COMPONENT altera_plugs_library
-      {
-         class = "altera_plugs_library";
-         class_version = "2.1";
-         WIZARD_SCRIPT_ARGUMENTS 
-         {
-            CONSTANTS 
-            {
-               CONSTANT PLUGS_PLUG_COUNT
-               {
-                  value = "5";
-                  comment = "Maximum number of plugs";
-               }
-               CONSTANT PLUGS_ADAPTER_COUNT
-               {
-                  value = "2";
-                  comment = "Maximum number of adapters";
-               }
-               CONSTANT PLUGS_DNS
-               {
-                  value = "1";
-                  comment = "Have routines for DNS lookups";
-               }
-               CONSTANT PLUGS_PING
-               {
-                  value = "1";
-                  comment = "Respond to icmp echo (ping) messages";
-               }
-               CONSTANT PLUGS_TCP
-               {
-                  value = "1";
-                  comment = "Support tcp in/out connections";
-               }
-               CONSTANT PLUGS_IRQ
-               {
-                  value = "1";
-                  comment = "Run at interrupte level";
-               }
-               CONSTANT PLUGS_DEBUG
-               {
-                  value = "1";
-                  comment = "Support debug routines";
-               }
-            }
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Is_Enabled = "1";
-         }
-      }
-      PORT_WIRING 
-      {
-      }
-      SIMULATION 
-      {
-         DISPLAY 
-         {
-            SIGNAL aaa
-            {
-               format = "Logic";
-               name = "i_readdata";
-               radix = "hexadecimal";
-            }
-            SIGNAL aab
-            {
-               format = "Logic";
-               name = "i_readdatavalid";
-               radix = "hexadecimal";
-            }
-            SIGNAL aac
-            {
-               format = "Logic";
-               name = "i_waitrequest";
-               radix = "hexadecimal";
-            }
-            SIGNAL aad
-            {
-               format = "Logic";
-               name = "i_address";
-               radix = "hexadecimal";
-            }
-            SIGNAL aae
-            {
-               format = "Logic";
-               name = "i_read";
-               radix = "hexadecimal";
-            }
-            SIGNAL aaf
-            {
-               format = "Logic";
-               name = "clk";
-               radix = "hexadecimal";
-            }
-            SIGNAL aag
-            {
-               format = "Logic";
-               name = "reset_n";
-               radix = "hexadecimal";
-            }
-            SIGNAL aah
-            {
-               format = "Logic";
-               name = "d_readdata";
-               radix = "hexadecimal";
-            }
-            SIGNAL aai
-            {
-               format = "Logic";
-               name = "d_waitrequest";
-               radix = "hexadecimal";
-            }
-            SIGNAL aaj
-            {
-               format = "Logic";
-               name = "d_irq";
-               radix = "hexadecimal";
-            }
-            SIGNAL aak
-            {
-               format = "Logic";
-               name = "d_address";
-               radix = "hexadecimal";
-            }
-            SIGNAL aal
-            {
-               format = "Logic";
-               name = "d_byteenable";
-               radix = "hexadecimal";
-            }
-            SIGNAL aam
-            {
-               format = "Logic";
-               name = "d_read";
-               radix = "hexadecimal";
-            }
-            SIGNAL aan
-            {
-               format = "Logic";
-               name = "d_write";
-               radix = "hexadecimal";
-            }
-            SIGNAL aao
-            {
-               format = "Logic";
-               name = "d_writedata";
-               radix = "hexadecimal";
-            }
-            SIGNAL aap
-            {
-               format = "Divider";
-               name = "base pipeline";
-               radix = "";
-            }
-            SIGNAL aaq
-            {
-               format = "Logic";
-               name = "clk";
-               radix = "hexadecimal";
-            }
-            SIGNAL aar
-            {
-               format = "Logic";
-               name = "reset_n";
-               radix = "hexadecimal";
-            }
-            SIGNAL aas
-            {
-               format = "Logic";
-               name = "D_stall";
-               radix = "hexadecimal";
-            }
-            SIGNAL aat
-            {
-               format = "Logic";
-               name = "A_stall";
-               radix = "hexadecimal";
-            }
-            SIGNAL aau
-            {
-               format = "Logic";
-               name = "F_pcb_nxt";
-               radix = "hexadecimal";
-            }
-            SIGNAL aav
-            {
-               format = "Logic";
-               name = "F_pcb";
-               radix = "hexadecimal";
-            }
-            SIGNAL aaw
-            {
-               format = "Logic";
-               name = "D_pcb";
-               radix = "hexadecimal";
-            }
-            SIGNAL aax
-            {
-               format = "Logic";
-               name = "E_pcb";
-               radix = "hexadecimal";
-            }
-            SIGNAL aay
-            {
-               format = "Logic";
-               name = "M_pcb";
-               radix = "hexadecimal";
-            }
-            SIGNAL aaz
-            {
-               format = "Logic";
-               name = "A_pcb";
-               radix = "hexadecimal";
-            }
-            SIGNAL aba
-            {
-               format = "Logic";
-               name = "W_pcb";
-               radix = "hexadecimal";
-            }
-            SIGNAL abb
-            {
-               format = "Logic";
-               name = "F_vinst";
-               radix = "ascii";
-            }
-            SIGNAL abc
-            {
-               format = "Logic";
-               name = "D_vinst";
-               radix = "ascii";
-            }
-            SIGNAL abd
-            {
-               format = "Logic";
-               name = "E_vinst";
-               radix = "ascii";
-            }
-            SIGNAL abe
-            {
-               format = "Logic";
-               name = "M_vinst";
-               radix = "ascii";
-            }
-            SIGNAL abf
-            {
-               format = "Logic";
-               name = "A_vinst";
-               radix = "ascii";
-            }
-            SIGNAL abg
-            {
-               format = "Logic";
-               name = "W_vinst";
-               radix = "ascii";
-            }
-            SIGNAL abh
-            {
-               format = "Logic";
-               name = "F_inst_ram_hit";
-               radix = "hexadecimal";
-            }
-            SIGNAL abi
-            {
-               format = "Logic";
-               name = "F_issue";
-               radix = "hexadecimal";
-            }
-            SIGNAL abj
-            {
-               format = "Logic";
-               name = "F_kill";
-               radix = "hexadecimal";
-            }
-            SIGNAL abk
-            {
-               format = "Logic";
-               name = "D_kill";
-               radix = "hexadecimal";
-            }
-            SIGNAL abl
-            {
-               format = "Logic";
-               name = "D_refetch";
-               radix = "hexadecimal";
-            }
-            SIGNAL abm
-            {
-               format = "Logic";
-               name = "D_issue";
-               radix = "hexadecimal";
-            }
-            SIGNAL abn
-            {
-               format = "Logic";
-               name = "D_valid";
-               radix = "hexadecimal";
-            }
-            SIGNAL abo
-            {
-               format = "Logic";
-               name = "E_valid";
-               radix = "hexadecimal";
-            }
-            SIGNAL abp
-            {
-               format = "Logic";
-               name = "M_valid";
-               radix = "hexadecimal";
-            }
-            SIGNAL abq
-            {
-               format = "Logic";
-               name = "A_valid";
-               radix = "hexadecimal";
-            }
-            SIGNAL abr
-            {
-               format = "Logic";
-               name = "W_valid";
-               radix = "hexadecimal";
-            }
-            SIGNAL abs
-            {
-               format = "Logic";
-               name = "W_wr_dst_reg";
-               radix = "hexadecimal";
-            }
-            SIGNAL abt
-            {
-               format = "Logic";
-               name = "W_dst_regnum";
-               radix = "hexadecimal";
-            }
-            SIGNAL abu
-            {
-               format = "Logic";
-               name = "W_wr_data";
-               radix = "hexadecimal";
-            }
-            SIGNAL abv
-            {
-               format = "Logic";
-               name = "D_en";
-               radix = "hexadecimal";
-            }
-            SIGNAL abw
-            {
-               format = "Logic";
-               name = "E_en";
-               radix = "hexadecimal";
-            }
-            SIGNAL abx
-            {
-               format = "Logic";
-               name = "M_en";
-               radix = "hexadecimal";
-            }
-            SIGNAL aby
-            {
-               format = "Logic";
-               name = "A_en";
-               radix = "hexadecimal";
-            }
-            SIGNAL abz
-            {
-               format = "Logic";
-               name = "F_iw";
-               radix = "hexadecimal";
-            }
-            SIGNAL aca
-            {
-               format = "Logic";
-               name = "D_iw";
-               radix = "hexadecimal";
-            }
-            SIGNAL acb
-            {
-               format = "Logic";
-               name = "E_iw";
-               radix = "hexadecimal";
-            }
-            SIGNAL acc
-            {
-               format = "Logic";
-               name = "E_cancel";
-               radix = "hexadecimal";
-            }
-            SIGNAL acd
-            {
-               format = "Logic";
-               name = "E_pipe_flush";
-               radix = "hexadecimal";
-            }
-            SIGNAL ace
-            {
-               format = "Logic";
-               name = "E_pipe_flush_baddr";
-               radix = "hexadecimal";
-            }
-            SIGNAL acf
-            {
-               format = "Logic";
-               name = "A_status_reg_pie";
-               radix = "hexadecimal";
-            }
-            SIGNAL acg
-            {
-               format = "Logic";
-               name = "A_ienable_reg";
-               radix = "hexadecimal";
-            }
-            SIGNAL ach
-            {
-               format = "Logic";
-               name = "intr_req";
-               radix = "hexadecimal";
-            }
-         }
-      }
-      MASTER data_master2
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Register_Incoming_Signals = "1";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "31";
-            Address_Width = "8";
-            Is_Data_Master = "1";
-            Has_IRQ = "0";
-            Is_Enabled = "0";
-         }
-      }
-      MASTER local_data_master_0
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Register_Incoming_Signals = "0";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "31";
-            Address_Width = "8";
-            Is_Data_Master = "1";
-            Has_IRQ = "0";
-            Is_Enabled = "0";
-         }
-      }
-      MASTER local_data_master_1
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Register_Incoming_Signals = "0";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "31";
-            Address_Width = "8";
-            Is_Data_Master = "1";
-            Has_IRQ = "0";
-            Is_Enabled = "0";
-         }
-      }
-      MASTER local_data_master_2
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Register_Incoming_Signals = "0";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "31";
-            Address_Width = "8";
-            Is_Data_Master = "1";
-            Has_IRQ = "0";
-            Is_Enabled = "0";
-         }
-      }
-      MASTER local_data_master_3
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Register_Incoming_Signals = "0";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "31";
-            Address_Width = "8";
-            Is_Data_Master = "1";
-            Has_IRQ = "0";
-            Is_Enabled = "0";
-         }
-      }
-      MASTER local_instruction_master_0
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Register_Incoming_Signals = "0";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Max_Address_Width = "31";
-            Address_Width = "8";
-            Is_Instruction_Master = "1";
-            Has_IRQ = "0";
-            Is_Enabled = "0";
-         }
-      }
-      MASTER custom_instruction_master
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Bus_Type = "nios_custom_instruction";
-            Data_Width = "32";
-            Address_Width = "8";
-            Max_Address_Width = "8";
-            Base_Address = "N/A";
-            Is_Visible = "0";
-            Is_Custom_Instruction = "0";
-            Is_Enabled = "0";
-         }
-      }
-      SLAVE jtag_debug_module
-      {
-         PORT_WIRING 
-         {
-            PORT jtag_debug_module_address
-            {
-               direction = "input";
-               type = "address";
-               width = "9";
-            }
-            PORT jtag_debug_module_begintransfer
-            {
-               direction = "input";
-               type = "begintransfer";
-               width = "1";
-            }
-            PORT jtag_debug_module_byteenable
-            {
-               direction = "input";
-               type = "byteenable";
-               width = "4";
-            }
-            PORT jtag_debug_module_clk
-            {
-               direction = "input";
-               type = "clk";
-               width = "1";
-            }
-            PORT jtag_debug_module_debugaccess
-            {
-               direction = "input";
-               type = "debugaccess";
-               width = "1";
-            }
-            PORT jtag_debug_module_readdata
-            {
-               direction = "output";
-               type = "readdata";
-               width = "32";
-            }
-            PORT jtag_debug_module_reset
-            {
-               direction = "input";
-               type = "reset";
-               width = "1";
-            }
-            PORT jtag_debug_module_resetrequest
-            {
-               direction = "output";
-               type = "resetrequest";
-               width = "1";
-            }
-            PORT jtag_debug_module_select
-            {
-               direction = "input";
-               type = "chipselect";
-               width = "1";
-            }
-            PORT jtag_debug_module_write
-            {
-               direction = "input";
-               type = "write";
-               width = "1";
-            }
-            PORT jtag_debug_module_writedata
-            {
-               direction = "input";
-               type = "writedata";
-               width = "32";
-            }
-            PORT reset_n
-            {
-               direction = "input";
-               type = "reset_n";
-               width = "1";
-            }
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Read_Wait_States = "1";
-            Write_Wait_States = "1";
-            Register_Incoming_Signals = "1";
-            Bus_Type = "avalon";
-            Data_Width = "32";
-            Address_Width = "9";
-            Accepts_Internal_Connections = "1";
-            Requires_Internal_Connections = "instruction_master,data_master";
-            Accepts_External_Connections = "0";
-            Is_Enabled = "1";
-            Address_Alignment = "dynamic";
-            Base_Address = "0x08200800";
-            Is_Memory_Device = "1";
-            Is_Printable_Device = "0";
-            Uses_Tri_State_Data_Bus = "0";
-            Has_IRQ = "0";
-            JTAG_Hub_Base_Id = "593990";
-            JTAG_Hub_Instance_Id = "0";
-            MASTERED_BY cpu_0/instruction_master
-            {
-               priority = "1";
-            }
-            MASTERED_BY cpu_0/data_master
-            {
-               priority = "1";
-            }
-            IRQ_MASTER cpu_0/data_master
-            {
-               IRQ_Number = "NC";
-            }
-         }
-      }
-   }
-   MODULE onchip_memory_0
-   {
-      class = "altera_avalon_onchip_memory2";
-      class_version = "4.0";
-      iss_model_name = "altera_memory";
-      HDL_INFO 
-      {
-         Precompiled_Simulation_Library_Files = "";
-         Simulation_HDL_Files = "";
-         Synthesis_HDL_Files = "__PROJECT_DIRECTORY__/onchip_memory_1.vhd";
-         Synthesis_Only_Files = "";
-      }
-      WIZARD_SCRIPT_ARGUMENTS 
-      {
-         allow_mram_sim_contents_only_file = "0";
-         ram_block_type = "M-RAM";
-         gui_ram_block_type = "Automatic";
-         Writeable = "1";
-         dual_port = "0";
-         Size_Value = "8192";
-         Size_Multiple = "1024";
-         MAKE 
-         {
-            TARGET delete_placeholder_warning
-            {
-               onchip_memory_1 
-               {
-                  Command1 = "rm -f $(SIMDIR)/contents_file_warning.txt";
-                  Is_Phony = "1";
-                  Target_File = "do_delete_placeholder_warning";
-               }
-            }
-            TARGET hex
-            {
-               onchip_memory_1 
-               {
-                  Command1 = "@echo Post-processing to create $(notdir $@)";
-                  Command2 = "elf2hex $(ELF) 0x00000000 0x7FF --width=32 $(QUARTUS_PROJECT_DIR)/onchip_memory_1.hex --create-lanes=0";
-                  Dependency = "$(ELF)";
-                  Target_File = "$(QUARTUS_PROJECT_DIR)/onchip_memory_1.hex";
-               }
-            }
-            TARGET sim
-            {
-               onchip_memory_1 
-               {
-                  Command1 = "if [ ! -d $(SIMDIR) ]; then mkdir $(SIMDIR) ; fi";
-                  Command2 = "@echo Hardware simulation is not enabled for the target SOPC Builder system. Skipping creation of hardware simulation model contents and simulation symbol files. \(Note: This does not affect the instruction set simulator.\)";
-                  Command3 = "touch $(SIMDIR)/dummy_file";
-                  Dependency = "$(ELF)";
-                  Target_File = "$(SIMDIR)/dummy_file";
-               }
-            }
-         }
-         contents_info = "QUARTUS_PROJECT_DIR/onchip_memory_1.hex 1092402177 ";
-      }
-      SYSTEM_BUILDER_INFO 
-      {
-         Prohibited_Device_Family = "MERCURY, APEX20K, APEX20KE, APEX20KC, APEXII, ACEX1K, FLEX10KE, EXCALIBUR_ARM";
-         Instantiate_In_System_Module = "1";
-         Is_Enabled = "1";
-         Default_Module_Name = "onchip_memory";
-         View 
-         {
-            MESSAGES 
-            {
-            }
-            Is_Collapsed = "1";
-         }
-      }
-      SLAVE s1
-      {
-         PORT_WIRING 
-         {
-            PORT address
-            {
-               direction = "input";
-               type = "address";
-               width = "9";
-            }
-            PORT byteenable
-            {
-               direction = "input";
-               type = "byteenable";
-               width = "4";
-            }
-            PORT chipselect
-            {
-               direction = "input";
-               type = "chipselect";
-               width = "1";
-            }
-            PORT clk
-            {
-               direction = "input";
-               type = "clk";
-               width = "1";
-            }
-            PORT readdata
-            {
-               direction = "output";
-               type = "readdata";
-               width = "32";
-            }
-            PORT write
-            {
-               direction = "input";
-               type = "write";
-               width = "1";
-            }
-            PORT writedata
-            {
-               direction = "input";
-               type = "writedata";
-               width = "32";
-            }
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Bus_Type = "avalon";
-            Is_Memory_Device = "1";
-            Address_Alignment = "dynamic";
-            Address_Width = "21";
-            Data_Width = "32";
-            Has_IRQ = "0";
-            Read_Wait_States = "0";
-            Write_Wait_States = "0";
-            Address_Span = "134217728";
-            Read_Latency = "1";
-            MASTERED_BY cpu_0/instruction_master
-            {
-               priority = "1";
-            }
-            MASTERED_BY cpu_0/data_master
-            {
-               priority = "1";
-            }
-            Base_Address = "0x00000000";
-            IRQ_MASTER cpu_0/data_master
-            {
-               IRQ_Number = "NC";
-            }
-         }
-      }
-      SLAVE s2
-      {
-         PORT_WIRING 
-         {
-         }
-         SYSTEM_BUILDER_INFO 
-         {
-            Bus_Type = "avalon";
-            Is_Memory_Device = "1";
-            Address_Alignment = "dynamic";
-            Address_Width = "21";
-            Data_Width = "32";
-            Has_IRQ = "0";
-            Read_Wait_States = "0";
-            Write_Wait_States = "0";
-            Address_Span = "8388608";
-            Read_Latency = "1";
-            Is_Enabled = "0";
-         }
-      }
-      SIMULATION 
-      {
-         DISPLAY 
-         {
-            SIGNAL a
-            {
-               name = "chipselect";
-               conditional = "1";
-            }
-            SIGNAL b
-            {
-               name = "write";
-               conditional = "1";
-            }
-            SIGNAL c
-            {
-               name = "address";
-               radix = "hexadecimal";
-            }
-            SIGNAL d
-            {
-               name = "byteenable";
-               radix = "binary";
-               conditional = "1";
-            }
-            SIGNAL e
-            {
-               name = "readdata";
-               radix = "hexadecimal";
-            }
-            SIGNAL f
-            {
-               name = "writedata";
-               radix = "hexadecimal";
-               conditional = "1";
-            }
-         }
-      }
-      PORT_WIRING 
-      {
-      }
-   }
-   MODULE jtag_uart_0
-   {
-      class = "altera_avalon_jtag_uart";
-      class_version = "1.0";
-      iss_model_name = "altera_avalon_jtag_uart";
-      SLAVE avalon_jtag_slave
-      {
-         SYSTEM_BUILDER_INFO 
-         {
-            Bus_Type = "avalon";
-            Is_Printable_Device = "1";
-            Address_Alignment = "native";
-            Address_Width = "1";
-            Data_Width = "32";
-            Has_IRQ = "1";
-            Read_Wait_States = "peripheral_controlled";
-            Write_Wait_States = "peripheral_controlled";
-            JTAG_Hub_Base_Id = "0x04006E";
-            JTAG_Hub_Instance_Id = "0";
-            MASTERED_BY cpu_0/data_master
-            {
-               priority = "1";
-            }
-            IRQ_MASTER cpu_0/data_master
-            {
-               IRQ_Number = "2";
-            }
-            Base_Address = "0x08000000";
-         }
-         PORT_WIRING 
-         {
-            PORT clk
-            {
-               type = "clk";
-               direction = "input";
-               width = "1";
-            }
-            PORT rst_n
-            {
-               type = "reset_n";
-               direction = "input";
-               width = "1";
-            }
-            PORT av_chipselect
-            {
-               type = "chipselect";
-               direction = "input";
-               width = "1";
-            }
-            PORT av_address
-            {
-               type = "address";
-               direction = "input";
-               width = "1";
-            }
-            PORT av_read_n
-            {
-               type = "read_n";
-               direction = "input";
-               width = "1";
-            }
-            PORT av_readdata
-            {
-               type = "readdata";
-               direction = "output";
-               width = "32";
-            }
-            PORT av_write_n
-            {
-               type = "write_n";
-               direction = "input";
-               width = "1";
-            }
-            PORT av_writedata
-            {
-               type = "writedata";
-               direction = "input";
-               width = "32";
-            }
-            PORT av_waitrequest
-            {
-               type = "waitrequest";
-               direction = "output";
-               width = "1";
-            }
-            PORT av_irq
-            {
-               type = "irq";
-               direction = "output";
-               width = "1";
-            }
-            PORT dataavailable
-            {
-               direction = "output";
-               type = "dataavailable";
-               width = "1";
-            }
-            PORT readyfordata
-            {
-               direction = "output";
-               type = "readyfordata";
-               width = "1";
-            }
-         }
-      }
-      SYSTEM_BUILDER_INFO 
-      {
-         Instantiate_In_System_Module = "1";
-         Is_Enabled = "1";
-         Iss_Launch_Telnet = "0";
-         View 
-         {
-            Settings_Summary = "<br>Write Depth: 64; Write IRQ Threshold: 8
-                <br>Read  Depth: 64; Read  IRQ Threshold: 8";
-            MESSAGES 
-            {
-            }
-            Is_Collapsed = "1";
-         }
-      }
-      WIZARD_SCRIPT_ARGUMENTS 
-      {
-         write_depth = "64";
-         read_depth = "64";
-         write_threshold = "8";
-         read_threshold = "8";
-         read_char_stream = "";
-         showascii = "1";
-         read_le = "0";
-         write_le = "0";
-      }
-      SIMULATION 
-      {
-         Fix_Me_Up = "";
-         DISPLAY 
-         {
-            SIGNAL av_chipselect
-            {
-               name = "av_chipselect";
-            }
-            SIGNAL av_address
-            {
-               name = "av_address";
-               radix = "hexadecimal";
-            }
-            SIGNAL av_read_n
-            {
-               name = "av_read_n";
-            }
-            SIGNAL av_readdata
-            {
-               name = "av_readdata";
-               radix = "hexadecimal";
-            }
-            SIGNAL av_write_n
-            {
-               name = "av_write_n";
-            }
-            SIGNAL av_writedata
-            {
-               name = "av_writedata";
-               radix = "hexadecimal";
-            }
-            SIGNAL av_waitrequest
-            {
-               name = "av_waitrequest";
-            }
-            SIGNAL av_irq
-            {
-               name = "av_irq";
-            }
-            SIGNAL dataavailable
-            {
-               name = "dataavailable";
-            }
-            SIGNAL readyfordata
-            {
-               name = "readyfordata";
-            }
-         }
-         INTERACTIVE_IN drive
-         {
-            enable = "0";
-            file = "_input_data_stream.dat";
-            mutex = "_input_data_mutex.dat";
-            log = "_in.log";
-            rate = "100";
-            signals = "temp,list";
-            exe = "nios2-terminal";
-         }
-         INTERACTIVE_OUT log
-         {
-            enable = "1";
-            exe = "perl -- atail-f.pl";
-            file = "_output_stream.dat";
-            radix = "ascii";
-            signals = "temp,list";
-         }
-      }
-      HDL_INFO 
-      {
-         Precompiled_Simulation_Library_Files = "";
-         Simulation_HDL_Files = "";
-         Synthesis_HDL_Files = "__PROJECT_DIRECTORY__/jtag_uart_0.vhd";
-         Synthesis_Only_Files = "";
-      }
-      PORT_WIRING 
-      {
-      }
-   }
-   MODULE timer_0
-   {
-      class = "altera_avalon_timer";
-      class_version = "2.1";
-      iss_model_name = "altera_avalon_timer";
-      SLAVE s1
-      {
-         SYSTEM_BUILDER_INFO 
-         {
-            Bus_Type = "avalon";
-            Is_Printable_Device = "0";
-            Address_Alignment = "native";
-            Address_Width = "3";
-            Data_Width = "16";
-            Has_IRQ = "1";
-            Read_Wait_States = "1";
-            Write_Wait_States = "0";
-            MASTERED_BY cpu_0/data_master
-            {
-               priority = "1";
-            }
-            IRQ_MASTER cpu_0/data_master
-            {
-               IRQ_Number = "1";
-            }
-            Base_Address = "0x08001000";
-         }
-         PORT_WIRING 
-         {
-            PORT address
-            {
-               direction = "input";
-               type = "address";
-               width = "3";
-            }
-            PORT chipselect
-            {
-               direction = "input";
-               type = "chipselect";
-               width = "1";
-            }
-            PORT clk
-            {
-               direction = "input";
-               type = "clk";
-               width = "1";
-            }
-            PORT irq
-            {
-               direction = "output";
-               type = "irq";
-               width = "1";
-            }
-            PORT readdata
-            {
-               direction = "output";
-               type = "readdata";
-               width = "16";
-            }
-            PORT reset_n
-            {
-               direction = "input";
-               type = "reset_n";
-               width = "1";
-            }
-            PORT write_n
-            {
-               direction = "input";
-               type = "write_n";
-               width = "1";
-            }
-            PORT writedata
-            {
-               direction = "input";
-               type = "writedata";
-               width = "16";
-            }
-         }
-      }
-      SYSTEM_BUILDER_INFO 
-      {
-         Instantiate_In_System_Module = "1";
-         Is_Enabled = "1";
-         View 
-         {
-            Settings_Summary = "Timer with 1 ms timeout period.";
-            MESSAGES 
-            {
-            }
-            Is_Collapsed = "1";
-         }
-      }
-      WIZARD_SCRIPT_ARGUMENTS 
-      {
-         always_run = "0";
-         fixed_period = "0";
-         snapshot = "1";
-         period = "1";
-         period_units = "ms";
-         reset_output = "0";
-         timeout_pulse_output = "0";
-         mult = "0.001";
-      }
-      HDL_INFO 
-      {
-         Simulation_HDL_Files = "";
-         Synthesis_HDL_Files = "__PROJECT_DIRECTORY__/timer_0.vhd";
-         Precompiled_Simulation_Library_Files = "";
-         Synthesis_Only_Files = "";
-      }
-      PORT_WIRING 
-      {
-      }
-   }
-   MODULE timer_1
-   {
-      class = "altera_avalon_timer";
-      class_version = "2.1";
-      iss_model_name = "altera_avalon_timer";
-      SLAVE s1
-      {
-         SYSTEM_BUILDER_INFO 
-         {
-            Bus_Type = "avalon";
-            Is_Printable_Device = "0";
-            Address_Alignment = "native";
-            Address_Width = "3";
-            Data_Width = "16";
-            Has_IRQ = "1";
-            Read_Wait_States = "1";
-            Write_Wait_States = "0";
-            MASTERED_BY cpu_0/data_master
-            {
-               priority = "1";
-            }
-            IRQ_MASTER cpu_0/data_master
-            {
-               IRQ_Number = "3";
-            }
-            Base_Address = "0x08002000";
-         }
-         PORT_WIRING 
-         {
-            PORT address
-            {
-               direction = "input";
-               type = "address";
-               width = "3";
-            }
-            PORT chipselect
-            {
-               direction = "input";
-               type = "chipselect";
-               width = "1";
-            }
-            PORT clk
-            {
-               direction = "input";
-               type = "clk";
-               width = "1";
-            }
-            PORT irq
-            {
-               direction = "output";
-               type = "irq";
-               width = "1";
-            }
-            PORT readdata
-            {
-               direction = "output";
-               type = "readdata";
-               width = "16";
-            }
-            PORT reset_n
-            {
-               direction = "input";
-               type = "reset_n";
-               width = "1";
-            }
-            PORT write_n
-            {
-               direction = "input";
-               type = "write_n";
-               width = "1";
-            }
-            PORT writedata
-            {
-               direction = "input";
-               type = "writedata";
-               width = "16";
-            }
-         }
-      }
-      SYSTEM_BUILDER_INFO 
-      {
-         Instantiate_In_System_Module = "1";
-         Is_Enabled = "1";
-         View 
-         {
-            Settings_Summary = "Timer with 1 ms timeout period.";
-            MESSAGES 
-            {
-            }
-            Is_Collapsed = "1";
-         }
-      }
-      WIZARD_SCRIPT_ARGUMENTS 
-      {
-         always_run = "0";
-         fixed_period = "0";
-         snapshot = "1";
-         period = "1";
-         period_units = "ms";
-         reset_output = "0";
-         timeout_pulse_output = "0";
-         mult = "0.001";
-      }
-      HDL_INFO 
-      {
-         Simulation_HDL_Files = "";
-         Synthesis_HDL_Files = "__PROJECT_DIRECTORY__/timer_1.vhd";
-         Precompiled_Simulation_Library_Files = "";
-         Synthesis_Only_Files = "";
-      }
-      PORT_WIRING 
-      {
-      }
-   }
-}
Index: c/src/lib/libbsp/nios2/nios2_iss/nios2_iss.sh
===================================================================
--- c/src/lib/libbsp/nios2/nios2_iss/nios2_iss.sh	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,6 +1,0 @@
-#!/bin/sh
-IOD=jtag_uart_0
-PTF=nios2_iss.ptf
-EXE="$1"
-# e.g. hello.nxe
-nios2-iss -c --stdin=${IOD} --stdout=${IOD} --stderr=${IOD} -f "${EXE}" -p "${PTF}"
Index: c/src/lib/libbsp/no_cpu/no_bsp/README
===================================================================
--- c/src/lib/libbsp/no_cpu/no_bsp/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,66 +1,0 @@
-#  This is a sample hardware description file for a BSP.  This comment
-#  block does not have to appear in a real one.  The intention of this
-#  file is to provide a central place to look when searching for
-#  information about a board when starting a new BSP.  For example,
-#  you may want to find an existing timer driver for the chip you are
-#  using on your board.  It is easier to grep for the chip name in
-#  all of the HARDWARE files than to peruse the source tree.  Hopefully,
-#  making the HARDDWARE files accurate will also alleviate the common
-#  problem of not knowing anything about a board based on its BSP
-#  name.
-#
-#  NOTE:  If you have a class of peripheral chip on board which
-#         is not in this list please add it to this file so
-#         others will also use the same name.
-#
-#         Timer resolution is the way it is configured in this BSP.
-#         On a counting timer, this is the length of time which
-#         corresponds to 1 count.
-#
-
-BSP NAME:           fastsbc1
-BOARD:              Fasssst Computers, Fast SBC-1
-BUS:                SchoolBus
-CPU FAMILY:         i386
-CPU:                Intel Hexium
-COPROCESSORS:       Witch Hex87
-MODE:               32 bit mode
-
-DEBUG MONITOR:      HexBug
-
-PERIPHERALS
-===========
-TIMERS:             Intel i8254
-  RESOLUTION:         .0001 microseconds
-SERIAL PORTS:       Zilog Z8530 (with 2 ports)
-REAL-TIME CLOCK:    RTC-4
-DMA:                Intel i8259
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       RTC-4
-IOSUPP DRIVER:      Zilog Z8530 port A
-SHMSUPP:            polled and interrupts
-TIMER DRIVER:       Intel i8254
-TTY DRIVER:         stub only
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-
-(1) 900 Mhz and 950 Mhz versions.
-
-(2) 1 Gb or 2 Gb RAM.
-
-(3) PC compatible if HexBug not enabled.
Index: c/src/lib/libbsp/or1k/generic_or1k/README
===================================================================
--- c/src/lib/libbsp/or1k/generic_or1k/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,34 +1,0 @@
-This BSP can run on or1ksim, QEMU, jor1k [1] and OpenRISC supported FPGA boards.
-
-$ git clone git@github.com:openrisc/or1ksim.git
-$ cd or1ksim
-$ mkdir builddir_or1ksim
-$ cd builddir_or1ksim
-$ ../configure --target=or1k-elf --prefix=/opt/or1ksim
-$ make all
-$ make install
-$ export PATH=/opt/or1ksim/bin:$PATH
-
-Configuration file "sim.cfg" should be provided for complex board
-configurations at the current directory (which you run or1ksim from) or at
-~/.or1k/
-
-The current sim.cfg file that configures or1ksim emulator to RTEMS/or1ksim BSP
-is at the same directory as this README. You can also use or1ksim script from
-rtems-tools/sim-scripts.
-
-From command line type:
-
-$ or1k-elf-sim -f sim.cfg $PATH_TO_RTEMS_EXE
-
-From QEMU:
-
-$ qemu-system-or32 -serial mon:stdio -serial /dev/null -net none -nographic \
-  -m 128M -kernel $PATH_TO_RTEMS_EXE
-
-from sim-scripts:
-
-$ or1ksim $PATH_TO_RTEMS_EXE
-$ qemu-or1k $PATH_TO_RTEMS_EXE
-
-[1] http://s-macke.github.io/jor1k/demos/rtems.html
Index: c/src/lib/libbsp/or1k/generic_or1k/sim.cfg
===================================================================
--- c/src/lib/libbsp/or1k/generic_or1k/sim.cfg	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,105 +1,0 @@
-section memory
-  name     =      "RAM"
-  random_seed = 12345
-  type        = random
-  ce       =          0
-  mc       =          0
-  baseaddr = 0x00000000
-  size     = 0x08000000
-  delayr   =          1
-  delayw   =          2
-end
-
-section immu
-  enabled = 0
-  nsets = 64
-  nways = 1
-  pagesize = 8192
-  hitdelay = 0
-  missdelay = 0
-end
-
-section dmmu
-  enabled = 0
-  nsets = 64
-  nways = 1
-  pagesize = 8192
-  hitdelay = 0
-  missdelay = 0
-end
-section mc
-  enabled = 0
-  baseaddr = 0x90000000
-  POC = 0x0000000a                 /* 32 bit SSRAM */
-  index = 0
-end
-
-section ic
-  enabled   =   1
-  nsets     = 256
-  nways     =   1
-  blocksize =  32
-  hitdelay  =  20
-  missdelay =  60
-end
-
-section dc
-  enabled = 1
-  nsets = 256
-  nways = 1
-  blocksize = 32
-  load_hitdelay = 40
-  load_missdelay = 120
-  store_hitdelay = 40
-  store_missdelay = 120
-end
-
-section pic
-  enabled = 1
-  edge_trigger = 1
-end
-
-section sim
-  verbose  =  1
-  debug    =  0
-  profile  =  0
-  history  =  0
-  clkcycle = 10ns		/* 100MHz clock */
-end
-
-section VAPI
-  enabled = 1
-  server_port = 50000
-  log_enabled = 1
-  vapi_log_file = "vapi.log"
-end
-
-section cpu
-  ver = 0x12
-  cfg = 0x00
-  rev = 0x0001
-  upr = 0x0000075f
-  superscalar = 0
-  hazards = 0
-  dependstats = 0
-  sbuf_len = 100
-end
-
-section debug
- enabled = 1
- rsp_enabled = 1
- rsp_port = 50001
-end
-
-section uart
-  enabled  = 1
-  baseaddr = 0x90000000
- #channel = "xterm"
-  channel = "file:uart0.rx,uart0.tx"
-  irq = 2
-  16550    = 1
-end
-
-section pm
-  enabled = 1
-end
Index: c/src/lib/libbsp/powerpc/beatnik/LICENSE
===================================================================
--- c/src/lib/libbsp/powerpc/beatnik/LICENSE	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,52 +1,0 @@
-/* NOTE: The terms described in this LICENSE file apply only to the
- *       files created by the author (see below). Consult individual
- *       file headers for more details. Some files were ported from
- *       netbsd and/or freebsd and are covered by the respective 
- *       file header copyright notices. E.g., the if_em driver is
- *       covered by it's own network/if_em/LICENSE.
- */
-
-/* 
- * Authorship
- * ----------
- * This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
- *     created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
- * 	   Stanford Linear Accelerator Center, Stanford University.
- * 
- * Acknowledgement of sponsorship
- * ------------------------------
- * The 'beatnik' BSP was produced by
- *     the Stanford Linear Accelerator Center, Stanford University,
- * 	   under Contract DE-AC03-76SFO0515 with the Department of Energy.
- * 
- * Government disclaimer of liability
- * ----------------------------------
- * Neither the United States nor the United States Department of Energy,
- * nor any of their employees, makes any warranty, express or implied, or
- * assumes any legal liability or responsibility for the accuracy,
- * completeness, or usefulness of any data, apparatus, product, or process
- * disclosed, or represents that its use would not infringe privately owned
- * rights.
- * 
- * Stanford disclaimer of liability
- * --------------------------------
- * Stanford University makes no representations or warranties, express or
- * implied, nor assumes any liability for the use of this software.
- * 
- * Stanford disclaimer of copyright
- * --------------------------------
- * Stanford University, owner of the copyright, hereby disclaims its
- * copyright and all other rights in this software.  Hence, anyone may
- * freely use it for any purpose without restriction.  
- * 
- * Maintenance of notices
- * ----------------------
- * In the interest of clarity regarding the origin and status of this
- * SLAC software, this and all the preceding Stanford University notices
- * are to remain affixed to any copy or derivative of this software made
- * or distributed by the recipient and are to be affixed to any copy of
- * software made or distributed by the recipient that contains a copy or
- * derivative of this software.
- * 
- * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
- */ 
Index: c/src/lib/libbsp/powerpc/beatnik/README
===================================================================
--- c/src/lib/libbsp/powerpc/beatnik/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,183 +1,0 @@
-Some information about this BSP
-================================
-
-ACKNOWLEDGEMENTS
-----------------
-Acknowledgements:
- Valuable information was obtained from the following drivers
-   netbsd: Allegro Networks Inc; Wasabi Systems Inc.
-    linux: MontaVista, Software, Inc; Chris Zankel, Mark A. Greer.
-	       Matthew Dharm, rabeeh, Manish Lachwani, Ralf Baechle.  
-    rtems: Brookhaven National Laboratory; Shuchen Kate Feng
- This BSP also builds on top of the work of others who have contributed
- to similar RTEMS (powerpc) BSPs, most notably Eric Valette, Eric Norum
- and others.
-
- In particular, the Author wishes to thank Shuchen Kate Feng (BNL) for many
- inspiring discussions and Dayle Kotturi (SLAC) for her contributions, support
- and extensive testing.
-
-LICENSE
--------
-See ./LICENSE file.
-
-Note that not all files that are part of this BSP were written by
-me (most notably, the ethernet drivers if_gfe [netbsd port] and
-if_em [freebsd port]). Consult individual file headers for copyright
-and authorship information.
-
-BUILD INFO
-----------
-(relevant only if you received this BSP unbundled from the RTEMS distribution)
-
-  prepare:
-  - get up-to date RTEMS release
-  - untar beatnik.tgz into c/src/lib/libbsp/powerpc
-  - copy beatnik.cfg into make/custom
-  - patch c/src/lib/libsp/powerpc/acinclude.ac
-  - run 'bootstrap' from top directory; make sure RTEMS
-    autoXXX are found first in your PATH
-  configure:
-  - configure with your favorite options. BSP name is 'beatnik'
-    I recommend passing RTEMS_CFLAGS=-g to 'configure'
-
-TARGET
-------
-Even though this BSP is binary compatible with the MVME5500 it's primary
-target was and is the MVME6100 board which in some respects is quite different.
-In particular, the discovery chip and the VME bridge exhibit significant
-differences.
-I am sometimes asked why this BSP provides yet another port of the gfe
-and em BSD drivers (which had previously been ported for the mvme5500
-BSP by Shuchen Kate Feng [BNL]). The answer is simply a matter of time:
-Once support for the 6100 board was completed I found it easier to use
-the set of 'quick-and-dirty' wrappers (found in network/porting) that I had
-developed for other projects and to do a new port from scratch using that
-framework rather than modifying the mvme5500 BSP's drivers. mvme5500 support was
-added to this BSP because we own a few of those boards we occasionally
-play with but we don't want to build and support an additional BSP for them.
-An important detail -- hardware cache snooping -- was borrowed from
-Shuchen Kate Feng's gfe driver port, though.
-
-HARDWARE SUPPORT
-===============
-(some of the headers mentioned below contain more
-detailed information)
-
-NOTE:  The BSP supports both, the mvme6100 and the mvme5500 boards.
-       It detects relevant hardware at run-time.
-
-WARNING: It is extremely important that a MOTLoad "waitProbe", "netShut"
-         sequence be executed before booting RTEMS. Otherwise, network
-         interface interrupt handlers installed by MOTLoad may cause memory
-         corruption
-
-CONSOLE: 2 serial devices, UART driver from 'shared' - no surprises
-       ("/dev/ttyS0", [="/dev/console"], "/dev/ttyS1"). (Only
-       /dev/ttyS0 is accessible from the front panel.)
-
-CLOCK: Decrementer, same as other PPC BSPs. (FIXME: a discovery timer
-       could be used.)
-
-PIC (interrupt controller) (bsp/irq.h): Marvell hostbridge
-       does not implement interrupt priorities. The driver supports
-       priorities in software (masking lower priority lines during
-       execution of higher priority ISR). I believe the design of the
-       IRQ subsystem is as efficient as possible with focus on low
-       latencies.
-       In addition to the rtems IRQ API, calls are available to
-       change IRQ priority and to enable/disable interrupts at the PIC.
-
-EXCEPTIONS: (bspException.h) Routines to install a user callback
-       for (PPC) exception handling.
-
-PCI (bsp/pci.h): The BSP hides the fact that there are effectively
-       two 'root' busses (AKA 'hoses') behind the discovery bridge.
-	   Devices are addressed by bus/slot/function-triples and the PCI
-	   subsystem transparently figures out what hose to use.
-       In addition to rtems' PCI API, a call is available to scan
-       all devices executing a user callback on each device.
-       BSP_pciConfigDump() is a convenience wrapper dumping essential
-       information (IDs, BAs, IRQ pin/line) to the console or a file.
-
-MEMORY MAP: CHRP; all addresses (MEM + I/O) read from PCI config. space
-       are CPU addresses. For sake of portability, drivers should still
-       use the _IO_BASE, PCI_MEM_BASE, PCI_DRAM_OFFSET constants.
-
-NVRAM: Address constants are defined in bsp.h
-
-FLASH (bsp/flashPgm.h): Routines to write flash. Highest level
-      wrapper writes a file to flash.
-	  NOTE: Writing to flash is disabled by default;
-	        call BSP_flashWriteEnable().
-
-I2C (bsp.h, rtems/libi2c.h, libchip/i2c-xxx.h):  temp. sensor and eeprom
-      are available as device files (bsp.h); lower-level interface is
-      provided by libi2c.h.
-	  NOTE: The I2C devices are not registered and the driver is not
-	        initialized by default. Call BSP_i2c_initialize() to do that;
-			this will create
-				/dev/i2c0.vpd-eeprom
-				/dev/i2c0.usr-eeprom
-				/dev/i2c0.ds1621
-	        You can then read the board temperature:
-			    fd = open("/dev/i2c0.ds1621",O_RDONLY)
-				read(fd,&temp,1)
-				close(fd);
-				printf("Board Temp. is %idegC\n",(int)temp);
-
-VME: (bsp/VME.h, bsp/vme_am_defs.h, bsp/VMEDMA.h).
-      *always* use VME.h API, if possible; do *not* use chip drivers
-	  (vmeUniverse.h, vmeTsi148.h) directly unless you know what you are
-	  doing (i.e., if you need specific features provided by the particular
-	  chip; currently, both of the mentioned chip drivers expose entry points
-	  that are designed to be compatible).
-
-      VMEConfig.h should not be used by applications as it makes them
-      dependent on BSP internals. VMEConfig.h is intended to be used
-	  by BSP designers only.
-
-      VME interrupt priorities: the VME bridge(s) do not implement
-      priorities in hardware.
-      However, on the 5500/6100 multiple physical interrupt
-      lines/wires connect the VME bridge to the PIC. Hence, it is possible
-      to assign the different wires different priorities at the PIC
-      (see above) and to route VME interrupts to different wires according
-      to their priority. You need to call driver specific routines
-      for this (vmeXXXIntRoute()), however (for driver-specific API
-	  consult bsp/vmeUniverse.h, bsp/vmeTsi148.h).
-
-	  For VME DMA *always* use the bsp/VMEDMA.h API. DO NOT use
-	  chip-specific features. Applications written using the bsp/VMEDMA.h
-	  API are portable between the UniverseII and the Tsi148.
-
-HARDWARE TIMERS: (bsp/gt_timer.h). Programmable general-purpose (GPT) and
-      watchdog timers. Routines are provided to setup, start and stop
-	  GPTs. The setup routine allows for specifying single-shot or periodic
-	  mode and dispatches a user ISR when the GPT expires.
-
-	  The watchdog timer - when started - issues a hard-reset of the
-	  board if not 'petted' within a configurable timeout period.
-
-NETWORK: (bsp/bsp_bsdnet_attach.h). The BSP offers a call to list
-      all available interfaces (name, description, 'attach'-method)
-      for the application to make a selection.
-      Alternatively, there are BSP_auto_network_driver_name and
-      BSP_auto_enet_attach(), the latter with the capability to configure
-      the first NIC with a 'live' link status.
-      All drivers (rewritten 'mve' for the mv64360 NIC (6100) and BSD ports
-      'gfe'/'em' (5500)) support the SIOCSIFMEDIA/SIOCGIFMEDIA ioctls
-      (rtems/rtems_mii_ioctl.h provides helpers to convert strings from/to
-      control words).
-
-VPD: (bsp/vpd.h). The board's VPD (vital-product-data such as S/N,
-      MAC addresses and so forth) can be retrieved.
-
-BOOTING: BSP has a relocator-header. Clear MSR and jump to the first
-      instruction in the binary. R3 and R4, if non-null, point to the
-      start/end of an optional command line string that is copied into
-      BSP_commandline_string. The BSP is compatible with 'netboot'.
-
-Have fun.
-
--- Till Straumann <strauman@slac.stanford.edu>, 2005-2007.
Index: c/src/lib/libbsp/powerpc/gen5200/README
===================================================================
--- c/src/lib/libbsp/powerpc/gen5200/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,65 +1,0 @@
-#
-#  README
-#
-
-BSP NAME:           gen5200
-BOARD:              various boards based on MPC5200 Controller:
-                    MicroSys PM520 with Carrier board CR825
-BUS:                N/A
-CPU FAMILY:         ppc
-CPU:                PowerPC MPC5200
-COPROCESSORS:       Hardware FPU 
-MODE:               32 bit mode, I and D cache enabled
-DEBUG MONITOR:      None
-
-PERIPHERALS
-===========
-TIMERS:             GPT
-SERIAL PORTS:       3 PSCs                     
-                    2 CAN IFs
-                    1 I2C IF
-REAL-TIME CLOCK:    PCF8563
-DMA:                for Ethernet and CompactFlash
-VIDEO:              none
-SCSI:               none
-IDE:                1 CompactFlash Slot supported
-NETWORKING:         1 FEC Fast Ethernet
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       using one GPT
-IOSUPP DRIVER:      none
-SHMSUPP:            none
-TIMER DRIVER:       Timebase register (lower 32 bits only)
-
-STDIO
-=====
-PORT:               PSC1
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-On-chip resources:
-	PSC1		/dev/console /dev/tty00
-	PSC2		/dev/tty01
-	PSC3		/dev/tty02
-
-
-Board description
------------------
-
-Clock rate:	external clock: 33MHz 
-Bus width:	32 bit Flash, 32 bit SDRAM
-FLASH:		8MByte
-RAM:		64MByte SDRAM 
-
-
-Debugging/ Code loading:
-------------------------
-
-Tested using the Lauterbach TRACE32 ICD debugger.
-
Index: c/src/lib/libbsp/powerpc/gen5200/README.IceCube
===================================================================
--- c/src/lib/libbsp/powerpc/gen5200/README.IceCube	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,34 +1,0 @@
-IceCube is the nickname for the FreeScale MPC5200LITE evaluation board
-which seems to be the basis for boards from a number of other vendors.
-The most complete and up to date information will be found on the
-RTEMS Wiki.  We know of the following boards which are the IceCube:
-
- + FreeScale MPC5200LITE
- + Embedded Planets EP52000 (does not ship with U-Boot)
-
-U-Boot supports this board very well. When using U-Boot the following
-command sequence is used to transform an ELF file into a U-Boot image.
-
-powerpc-rtems4.8-objcopy -R -S -O binary hello.exe hello.bin
-cat hello.bin | gzip -9 >hello.gz
-/opt/embedded/tools/usr/bin/mkimage \
-  -A ppc -O rtems -T kernel -a 0x10000 -e 0x10000 -n "RTEMS" \
-  -d hello.gz hello.img 
-
-These ttcp results were between an EP5200 and Dell Insprion 9400
-running Fedora 7.  A private network was used.
-
->>> ttcp -t -s 192.168.1.210
-ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001  tcp  -> 192.168.1.210
-ttcp-t: socket
-ttcp-t: connect
-ttcp-t: 16777216 bytes in 1.58 real seconds = 10385.86 KB/sec +++
-ttcp-t: 2048 I/O calls, msec/call = 0.79, calls/sec = 1298.23
-ttcp-t: 0.0user 1.5sys 0:01real 100% 0i+0d 0maxrss 0+0pf 0+0csw
->>> ttcp -r -s
-ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001  tcp
-ttcp-r: socket
-ttcp-r: accept from 192.168.1.210
-ttcp-r: 16777216 bytes in 1.78 real seconds = 9194.86 KB/sec +++
-ttcp-r: 3499 I/O calls, msec/call = 0.52, calls/sec = 1963.67
-
Index: c/src/lib/libbsp/powerpc/gen83xx/README.mpc8313erdb
===================================================================
--- c/src/lib/libbsp/powerpc/gen83xx/README.mpc8313erdb	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,28 +1,0 @@
-SPI:
-
-In master mode SCS (SPI_D) cannot be used as GPIO[31].  Unfortunately this pin
-is connected to the SD Card slot. See also [1] SPI 5.
-
-TSEC:
-
-The interrupt vector values are switched at the IPIC.  See also [1] IPIC 1.
-
-REFERENCES:
-
-[1]	MPC8313ECE Rev. 3, 3/2008: "MPC8313E PowerQUICCâ¢ II Pro Integrated Host
-	Processor Device Errata"
-
-Example U-Boot Sequence
-=======================
-setenv ethact TSEC1
-setenv ipaddr 192.168.96.106
-setenv serverip 192.168.96.31
-tftp 1000000 ticker.img
-bootm
-
-Making a U-Boot Image
-=====================
-powerpc-rtems4.9-objcopy -O binary ticker.exe ticker.bin
-gzip -9 ticker.bin
-mkimage -A ppc -O rtems -T kernel -C gzip -a 100 -e 10000 -n "RTEMS
-Test" -d ticker.bin.gz ticker.img
Index: c/src/lib/libbsp/powerpc/gen83xx/README.mpc8349eamds
===================================================================
--- c/src/lib/libbsp/powerpc/gen83xx/README.mpc8349eamds	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,42 +1,0 @@
-BSP NAME:           gen83xx
-BOARD:              Freescale MPC8349 board MPC8349EAMDS
-BUS:                PCI (unused)
-CPU FAMILY:         ppc
-CPU:                PowerPC e300 (SW compatible to 603e)
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:      U-Boot 
-
-PERIPHERALS
-===========
-TIMERS:             PPC internal Timebase register
-  RESOLUTION:         ???
-SERIAL PORTS:       2 internal PSCs
-REAL-TIME CLOCK:    (not yet supported)
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         2xTSEC triple speed ethernet channels
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       PPC internal
-TTY DRIVER:         PPC internal
-
-STDIO
-=====
-PORT:               Console port 1
-ELECTRICAL:         na
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             N
-STOP BITS:          1
-
-Notes
-=====
-
-<tbd>
Index: c/src/lib/libbsp/powerpc/haleakala/README
===================================================================
--- c/src/lib/libbsp/powerpc/haleakala/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,51 +1,0 @@
-# Adapted from Virtex BSP
-
-BSP NAME:           Haleakala
-BOARD:              AMCC/UDTech Haleakala 405Exr eval board
-BUS:                N/A
-CPU FAMILY:         ppc
-CPU:                PowerPC 405EXr
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:
-
-PERIPHERALS
-===========
-TIMERS:             405EXr internal
-SERIAL PORTS:       405EXr internal
-REAL-TIME CLOCK:    DS1338
-DMA:                405EXr internal
-VIDEO:              none
-SCSI:               none
-NETWORKING:         405EXr internal
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC Decrementer
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       N/A
-TTY DRIVER:         shared
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               9600-115200
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-Notes
-=====
-
-Board description
------------------
-clock rate:	400 MHz
-ROM:		64MByte FLASH
-RAM:		256MByte DDR DRAM
-
-
-Porting
--------
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/BOOTING
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/BOOTING	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,92 +1,0 @@
-This file documents the on board monitor (PPCBUG) configuration used
-to be able to boot the archives located in powerpc-rtems/c/mcp750/bin.
-This information was provided by Eric Valette <valette@crf.canon.fr>
-
-NOTE (by Till Straumann <strauman@slac.stanford.edu>, 2003):
-Apparently, PPCBug fails to shut down the network interface after
-loading an image. This means that the ethernet chip is still able
-to write into its descriptors and network buffer memory which
-can result in the loaded system to be corrupted if that system
-relocates itself!. The proper place to shut down the interface
-would be PPCBug itself or a 'PPCBug startup script' - unfortunately,
-PPCBug doesn't offer such a feature. Therefore, the bootloader
-is by default compiled with the
-#ifdef USE_PPCBUG
-compile-time option ENABLED. It will then use a PPCBug system
-call to shut down the ethernet chip during an early stage of
-the boot process.
-NOTE: THIS (i.e. the system call) WILL FAIL IF YOU USE SOFTWARE
-OTHER THAN PPCBUG TO BOOT THE BSP. In such a case, you must
-recompile with #undef USE_PPCBUG and make sure the ethernet
-interface is quiet by other means.
-
------------------------ ENV command--------------
-PPC1-Bug>env
-Bug or System environment [B/S] = B? 
-Field Service Menu Enable [Y/N] = N? 
-Probe System for Supported I/O Controllers [Y/N] = Y? 
-Auto-Initialize of NVRAM Header Enable [Y/N] = Y? 
-Network PReP-Boot Mode Enable [Y/N] = Y?                <====================
-SCSI Bus Reset on Debugger Startup [Y/N]   = N? 
-Primary SCSI Bus Negotiations Type [A/S/N] = A? 
-Primary SCSI Data Bus Width [W/N]          = N? 
-Secondary SCSI Identifier                  = "07"? 
-NVRAM Boot List (GEV.fw-boot-path) Boot Enable [Y/N]           = Y? 
-NVRAM Boot List (GEV.fw-boot-path) Boot at power-up only [Y/N] = Y? 
-NVRAM Boot List (GEV.fw-boot-path) Boot Abort Delay            = 5? 
-Auto Boot Enable [Y/N]           = Y? 
-Auto Boot at power-up only [Y/N] = Y? 
-Auto Boot Scan Enable [Y/N]      = Y? 
-Auto Boot Scan Device Type List  = FDISK/CDROM/TAPE/HDISK/? 
-Auto Boot Controller LUN   = 14? 
-Auto Boot Device LUN       = 40? 
-Auto Boot Partition Number = 03? 
-Auto Boot Abort Delay      = 7? 
-Auto Boot Default String [NULL for an empty string] = ? 
-ROM Boot Enable [Y/N]            = N? 
-ROM Boot at power-up only [Y/N]  = Y? 
-ROM Boot Abort Delay             = 5? 
-ROM Boot Direct Starting Address = FFF00000? 
-ROM Boot Direct Ending Address   = FFFFFFFC? 
-Network Auto Boot Enable [Y/N]           = N? 
-Network Auto Boot at power-up only [Y/N] = N? 
-Network Auto Boot Controller LUN = 00? 
-Network Auto Boot Device LUN     = 00? 
-Network Auto Boot Abort Delay    = 5? 
-Network Auto Boot Configuration Parameters Offset (NVRAM) = 00001000? 
-Memory Size Enable [Y/N]         = Y? 
-Memory Size Starting Address     = 00000000? 
-Memory Size Ending Address       = 02000000? 
-DRAM Speed in NANO Seconds       = 60? 
-ROM First Access Length (0 - 31) = 10? 
-ROM Next Access Length  (0 - 15) = 0? 
-DRAM Parity Enable [On-Detection/Always/Never - O/A/N]    = O? 
-L2Cache Parity Enable [On-Detection/Always/Never - O/A/N] = O? 
-PCI Interrupts Route Control Registers (PIRQ0/1/2/3) = 0A050000? 
-Serial Startup Code Master Enable [Y/N] = N? 
-Serial Startup Code LF Enable [Y/N] =     N? 
----------------------NIOT ---------------------------
-PPC1-Bug>niot
-Controller LUN =00? 
-Device LUN     =00? 
-Node Control Memory Address =03F9E000? 
-Client IP Address      =194.2.81.157? 
-Server IP Address      =194.2.81.241? 
-Subnet IP Address Mask =255.255.255.0? 
-Broadcast IP Address   =255.255.255.255? 
-Gateway IP Address     =194.2.81.254? 
-Boot File Name ("NULL" for None)     =debug-ppc? 
-Argument File Name ("NULL" for None) =? 
-Boot File Load Address         =001F0000? 
-Boot File Execution Address    =001F0000? 
-Boot File Execution Delay      =00000000? 
-Boot File Length               =00000000? 
-Boot File Byte Offset          =00000000? 
-BOOTP/RARP Request Retry       =05? 
-TFTP/ARP Request Retry         =05? 
-Trace Character Buffer Address =00000000? 
-BOOTP/RARP Request Control: Always/When-Needed (A/W)=W? 
-BOOTP/RARP Reply Update Control: Yes/No (Y/N)       =Y? 
---------------------------------------------------------
-
-
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,44 +1,0 @@
-BSP NAME:           MCP750
-BOARD:              MCP750 from motorola
-BUS:                PCI
-CPU FAMILY:         ppc
-CPU:                PowerPC 750
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:      PPCBUG mode 
-
-PERIPHERALS
-===========
-TIMERS:             PPC internal Timebase register
-  RESOLUTION:         ???
-SERIAL PORTS:       simulated via bug
-REAL-TIME CLOCK:    PPC internal Decrementer register
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         DEC21140
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       PPC internal
-TTY DRIVER:         PPC internal
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         na
-BAUD:               na
-BITS PER CHARACTER: na
-PARITY:             na
-STOP BITS:          na
-
-Notes
-=====
-
-Based on papyrus bsp which only really supports
-the PowerOpen ABI with an ELF assembler.
-
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README.MVME2100
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README.MVME2100	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,128 +1,0 @@
-The MVME2100 is a Motorola VMEbus board which is similar to the other
-Motorola PowerPC boards supported by this BSP.  But it does not support
-the Motorola CPU Configuration Register.  This makes it impossible to
-dynamically probe and determine that you are executing on this board
-variant.  So this BSP variant must be explicitly built to only support
-the MVME2100.  The complete list of differences found so far is:
-
-  * No CPU Configuration Register
-  * one COM port
-  * COM port is on PCI IRQ not ISA IRQ
-  * limited on RAM (32 or 64 MB)
-  * uses the EPIC interrupt controller on the MPC8240
-  * does not have an ISA bus but has an ISA I/O address space
-  * cannot set DBAT2 in bspstart like other variants because
-    there are PCI/ISA Interrupt Acknowledge registers at this space
-    This BSP may have left some PCI memory uncovered
-  * PPCBug starts programs with vectors still in ROM
-
-Supported Features:
-  - Interrupt driven console using termios
-  - Network device driver
-  - Real-Time Clock driver
-  - Clock Tick Device Driver
-
-Things to address:
-  - Does not return to monitor
-  - Level 1 cache is disabled for now
-  - Check on trying to read CPU Configuration Register for CHRP/Prep for PCI
-    and report a failure if in the wrong mode.  May be able to set the model
-    but it may be hard to test if we break PPCBug.
-  - Use NVRAM for network configuration information
-
-BSP Features Not Implemented:
-  - VMEbus mapped in but untested
-  - OpenPIC features not required for BSP are not supported
-
-Memory Map
-==========
-                                                     BAT Mapping
-
-    ffff ffff   |------------------------------------| ----- ffff ffff
-                | ROM/FLASH Bank 0                   |   |
-    fff0 0000   |------------------------------------|   |
-                | System I/O                         |   |
-    ffe0 0000   |------------------------------------|   |
-                | Replicated ROM/FLASH Bank 0        |   |
-                | Replicated System I/O              |   |
-    ff80 0000   |------------------------------------|   |
-                | ROM/FLASH Bank 1                   | DBAT3
-    ff00 0000   |------------------------------------|  - Supervisor R/W
-                | PCI Interrupt Acknowledge          |  - Cache Inhibited
-    fef0 0000   |------------------------------------|  - Guarded
-                | PCI Configuration Data Register    |   |
-    fee0 0000   |------------------------------------|   | 
-                | PCI Configuration Address Register |   | 
-    fec0 0000   |------------------------------------|   | 
-                | PCI I/O Space                      |   | 
-    fe80 0000   |------------------------------------|   | 
-                | PCI/ISA I/O Space                  |   | 
-    fe00 0000   |------------------------------------|   | 
-                | PCI/ISA Memory Space               |   | 
-    fd00 0000   |------------------------------------|   | 
-                |                                    |   | 
-                |                      xxxxxxxxxxxxxx| ----- f000 0000
-                |                      x not mapped  |   |
-                |                      xxxxxxxxxxxxxx| ----- a000 0000 
-                |                                    |   | 
-                |                                    |   |
-                |                                    | DBAT0
-                |                                    |  - Supervisor R/W
-                |                                    |  - Cache Inhibited
-                |                                    |  - Guarded
-                |                                    |   |
-                |                                    |   | 
-                |                                    | ----- 9000 0000
-                |                                    |   |
-                |                                    |   |
-                | PCI Memory Space                   | DBAT2
-                |                                    |  - Supervisor R/W
-                |                                    |  - Cache Inhibited 
-                |                                    |  - Guarded
-                |                                    |   |
-                |                                    |   |
-                |                                    |   |
-    8000 0000   |------------------------------------| ----- 8000 0000
-                |                      x             |   
-                |                      x not mapped  |
-                | Reserved             xxxxxxxxxxxxxx| ----- 1000 0000
-                |                                    |   |
-                |                                    |   |
-    0200 0000   |------------------------------------|   |
-                |                                    |   |
-                |                                    |   |
-                |                                    |   |
-                |                                    |   |
-                | DRAM (32MB)                        | DBAT1/IBAT1
-                |                                    |  - Supervisor R/W
-                |                                    |   |
-                |                                    |   |
-                |                                    |   |
-                |                                    |   |
-    0000 0000   |------------------------------------| ----- 0000 0000
-                
-
-TTCP Performance on First Day Run
-=================================
-Fedora Core 1 on (according to /proc/cpuinfo) a 300 Mhz P3 using Netgear
-10/100 CardBus NIC on a dedicated 10BaseT LAN.  
-
-ON MVME2100:            ttcp -t -s 192.168.2.107
-REPORTED ON MVME2100:
-ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001  tcp  -> 192.168.2.107
-ttcp-t: socket
-ttcp-t: connect
-ttcp-t: 16777216 bytes in 20.80 real seconds = 787.69 KB/sec +++
-ttcp-t: 2048 I/O calls, msec/call = 10.40, calls/sec = 98.46
-ttcp-t: 0.0user 20.8sys 0:20real 100% 0i+0d 0maxrss 0+0pf 0+0csw
-
-ON MVME2100:            ttcp -t -s 192.168.2.107
-REPORTED ON MVME2100:
-ttcp -r -s
-ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001  tcp
-ttcp-r: socket
-ttcp-r: accept from 192.168.2.107
-ttcp-r: 16777216 bytes in 15.41 real seconds = 1063.21 KB/sec +++
-ttcp-r: 11588 I/O calls, msec/call = 1.36, calls/sec = 751.98
-ttcp-r: 0.0user 15.4sys 0:15real 100% 0i+0d 0maxrss 0+0pf 0+0csw
-
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README.MVME2300
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README.MVME2300	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,39 +1,0 @@
-This BSP was adapted from Eric Valette MCP750 Generic motorola
-port to MVME2300 by Jay Kulpinski <jskulpin@eng01.gdds.com>.
-In other to work correctly, the Tundra Universe chip must
-be turned off using PPCBug as explained below.
-
-
-
-
-The Tundra Universe chip is a bridge between the PCI and VME buses.
-It has four programmable mapping windows in each direction, much like
-the Raven.  PPCBUG lets you specify the mappings if you don't want
-to do it in your application.  The mappings on our board, which may
-or not be the default Motorola mappings, had one window appearing
-at 0x01000000 in PCI space.  This is the same place the bootloader
-code remapped the Raven registers.  The windows' mappings are 
-very likely to be application specific, so I wouldn't worry too
-much about setting them in the BSP, but it would be nice to have
-a standard interface to do so.  Whoever needs that first can 
-incorporate the ppcn_60x BSP code for the Universe chip. :-)
-
-These options in PPCBUG's ENV command did the job:
-
-VME3PCI Master Master Enable [Y/N] = Y?
-PCI Slave Image 0 Control                = 00000000?   <-----
-PCI Slave Image 0 Base Address Register  = 00000000?
-PCI Slave Image 0 Bound Address Register = 00000000?
-PCI Slave Image 0 Translation Offset     = 00000000?
-PCI Slave Image 1 Control                = 00000000?   <-----
-PCI Slave Image 1 Base Address Register  = 01000000?
-PCI Slave Image 1 Bound Address Register = 20000000?
-PCI Slave Image 1 Translation Offset     = 00000000?
-PCI Slave Image 2 Control                = 00000000?   <-----
-PCI Slave Image 2 Base Address Register  = 20000000?
-PCI Slave Image 2 Bound Address Register = 22000000?
-PCI Slave Image 2 Translation Offset     = D0000000?
-PCI Slave Image 3 Control                = 00000000?   <-----
-PCI Slave Image 3 Base Address Register  = 2FFF0000?
-PCI Slave Image 3 Bound Address Register = 30000000?
-PCI Slave Image 3 Translation Offset     = D0000000?        
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README.MVME2400
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README.MVME2400	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,29 +1,0 @@
-The generic motorla_powerpc BSP was adapted to work on a MVME2432 by
-Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>.
-
-The main steps needed were adaptions to the "Hawk" controller, which
-replaces the MVME2300 Raven and Falcon chips.
-
-This board now runs with the same BSP configuration as the MCP750, so
-select the mcp750 BSP.
-
-The following settings in the PPCBUG's ENV were also important (taken
-from the "README.MVME2300" file:)
-
-VME3PCI Master Master Enable [Y/N] = Y?
-PCI Slave Image 0 Control                = 00000000?   <-----
-PCI Slave Image 0 Base Address Register  = 00000000?
-PCI Slave Image 0 Bound Address Register = 00000000?
-PCI Slave Image 0 Translation Offset     = 00000000?
-PCI Slave Image 1 Control                = 00000000?   <-----
-PCI Slave Image 1 Base Address Register  = 01000000?
-PCI Slave Image 1 Bound Address Register = 20000000?
-PCI Slave Image 1 Translation Offset     = 00000000?
-PCI Slave Image 2 Control                = 00000000?   <-----
-PCI Slave Image 2 Base Address Register  = 20000000?
-PCI Slave Image 2 Bound Address Register = 22000000?
-PCI Slave Image 2 Translation Offset     = D0000000?
-PCI Slave Image 3 Control                = 00000000?   <-----
-PCI Slave Image 3 Base Address Register  = 2FFF0000?
-PCI Slave Image 3 Bound Address Register = 30000000?
-PCI Slave Image 3 Translation Offset     = D0000000?        
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README.OTHERBOARDS
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README.OTHERBOARDS	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,93 +1,0 @@
-This BSP is designed to support multiple Motorola PowerPC boards.  The
-following extract from some email from Eric Valette should provide
-the basic information required to use this BSP on other models.
-
-
-Joel>      + I am sure there are other Motorola boards which this BSP should
-Joel>        support.  If you know of other models that should work, list
-Joel>        them off to me.  I will make them aliases and note them as
-Joel>        untested in the status.
-
-Extract of motorola.c :
-
-static const mot_info_t mot_boards[] = {
-  {0x300, 0x00, "MVME 2400"},
-  {0x010, 0x00, "Genesis"},
-  {0x020, 0x00, "Powerstack (Series E)"},
-  {0x040, 0x00, "Blackhawk (Powerstack)"},
-  {0x050, 0x00, "Omaha (PowerStack II Pro3000)"},
-  {0x060, 0x00, "Utah (Powerstack II Pro4000)"},
-  {0x0A0, 0x00, "Powerstack (Series EX)"},
-  {0x1E0, 0xE0, "Mesquite cPCI (MCP750)"},
-  {0x1E0, 0xE1, "Sitka cPCI (MCPN750)"},
-  {0x1E0, 0xE2, "Mesquite cPCI (MCP750) w/ HAC"},
-  {0x1E0, 0xF6, "MTX Plus"},
-  {0x1E0, 0xF7, "MTX wo/ Parallel Port"},
-  {0x1E0, 0xF8, "MTX w/ Parallel Port"},
-  {0x1E0, 0xF9, "MVME 2300"},
-  {0x1E0, 0xFA, "MVME 2300SC/2600"},
-  {0x1E0, 0xFB, "MVME 2600 with MVME712M"},
-  {0x1E0, 0xFC, "MVME 2600/2700 with MVME761"},
-  {0x1E0, 0xFD, "MVME 3600 with MVME712M"},
-  {0x1E0, 0xFE, "MVME 3600 with MVME761"},
-  {0x1E0, 0xFF, "MVME 1600-001 or 1600-011"},
-  {0x000, 0x00, ""}
-};
-
-In theory, each board starting with 0x1E0 should be really straighforward
-to port (604 proc or above and raven host bridge...).
-
-Joel> Then we just have to add README.BOARD_MODEL and TIMES.BOARD_MODEL
-
-I should also make a README to explain that some file containing
-switch statement should be completed (e.g libbsp/powerpc/shared/irq_init.c 
-[NOTE: This is that README. :) ]
-
-       ------------------------------
-  if ( (currentBoard == MESQUITE) ) {
-    VIA_isa_bridge_interrupts_setup();
-    known_cpi_isa_bridge = 1;
-  }
-  if (!known_cpi_isa_bridge) {
-    printk("Please add code for PCI/ISA bridge init to libbsp/shared/irq/irq_init.c\n");
-    printk("If your card works correctly please add a test and set known_cpi_isa_bridge to true\n");
-  }
-       ------------------------------
-
-and libbsp/powerpc/mpc6xx/execeptions/raw_exception.c
-
-       -------------------------------
-
-int mpc604_vector_is_valid(rtems_vector vector)
-{
-  /*
-   * Please fill this for MVME2307
-   */
-  printk("Please complete libcpu/powerpc/XXX/raw_exception.c\n");
-  return 0;
-}
-
-int mpc60x_set_exception  (const rtems_raw_except_connect_data* except)
-{
-    unsigned int level;
-
-    if (current_ppc_cpu == PPC_750) {
-      if (!mpc750_vector_is_valid(except->exceptIndex)){
-        return 0;
-      }
-      goto exception_ok;
-    }
-    if (current_ppc_cpu == PPC_604) {
-      if (!mpc604_vector_is_valid(except->exceptIndex)){
-        return 0;
-      }
-      goto exception_ok;
-    }
-    printk("Please complete libcpu/powerpc/XXX/raw_exception.c\n");
-    return 0;
-    -----------------------------------
-
-NB : re readding the code I should have done a switch... TSSSS.A future patche
-     I think.
-
-
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README.dec21140
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README.dec21140	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,1 +1,0 @@
-The dec21140 network driver is found in libchip/networking.
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README.mtx603e
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README.mtx603e	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,58 +1,0 @@
-#
-#  README.mtx603e
-#
-
-BSP NAME:           mtx603e
-BOARD:              MTX-60X boards from motorola
-BUS:                PCI, W83C554
-CPU FAMILY:         ppc
-CPU:                PowerPC 603e
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:      PPCBUG mode 
-
-PERIPHERALS
-===========
-TIMERS:             PPC internal Timebase register
-  RESOLUTION:         ???
-SERIAL PORTS:       simulated via bug
-REAL-TIME CLOCK:    PPC internal Decrementer register
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         DEC21140
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       PPC internal
-TTY DRIVER:         PPC internal
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         na
-BAUD:               na
-BITS PER CHARACTER: na
-PARITY:             na
-STOP BITS:          na
-
-Notes
-=====
-
-This bsp is an instantiation of the generic motorola_powerpc BSP.  It is
-"virtual" in the sense it does not supply any per-bsp files.  Instead,
-it is defined by the aclocal and make/custom config files which supply
-#defines that adapt the shared powerpc code.  This is seen in the
-bootloader and irq setup files.
-
-Although created for a MTX-603e board, this bsp should be readily
-portable to any of the Motorola MTX boards, and has in fact run on a
-MCP750 board.
-
-Some MTX boards have multiple processors, at this time RTEMS does not
-support SMP and there is no internal awareness of the architecture.
-
Index: c/src/lib/libbsp/powerpc/motorola_powerpc/README.qemu
===================================================================
--- c/src/lib/libbsp/powerpc/motorola_powerpc/README.qemu	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,124 +1,0 @@
-The 'qemuprep'/'qemuprep-altivec' BSPs are variants of
-'motorola_powerpc' that can run under QEMU. They are *not*
-binary compatible with other variants of 'motorola_powerpc'
-(nor with each other).
-
-Most significant differences to real hardware:
- - no OpenPIC, just a 8259 PIC (even though qemu implements an openpic
-   at least to some extent it is not configured into the prep platform
-   as of qemu-0.14.1).
- - no VME (absense of the VME controller is detected by the BSP)
- - the only network chip supported by both, qemu and vanilla RTEMS
-   is the ISA NE2000 controller. Note that the default interrupt line
-   settings used by RTEMS and QEMU differ: RTEMS uses 5 and QEMU 9.
-   This can be addressed by passing a RTEMS commandline option
-   --ne2k-irq=9.
-   Other controllers (i8559, e1000, pcnet) implemented by qemu can
-   also be used but require unbundled RTEMS drivers (libbsdport).
-   Note that the bundled 'if_fxp' has not been ported to PPC and works
-   on x86 only.
- - unlike a real motorola board you can run qemu emulating a 7400 CPU
-   which features altivec. I.e., you can use this BSP (altivec-enabled
-   variant) to test altivec-enabled code.
-
-Compatibility: qemu had quite a few bugs related to the PREP platform.
-Version 0.12.4, for example, required patches. 0.14.1 seems to have
-fixed the show-stoppers. Hence, you *need* at least qemu-0.14.1 for
-this BSP; it should work without the need for patching QEMU.
-
-BIOS: qemu requires you to use a BIOS. The one that came with qemu
-0.12.4 didn't work for me so I created a minimal dummy that provides
-enough functionality for the RTEMS bootloader to work.
-
-BSP Variants:
-You can compile the BSP for either a 604 CPU or a 7400 (altivec-enabled).
-Note that you cannot run the altivec-enabled BSP variant on a CPU w/o
-altivec/SIMD hardware. The non-altivec variant is called 'qemuprep'
-and the altivec-enabled one 'qemuprep-altivec'. Hence, you can
-configure RTEMS:
-
-604/non-altivec variant only:
-  configure --target=powerpc-rtems --enable-rtemsbsp=qemuprep
-7400/altivec variant only:
-  configure --target=powerpc-rtems --enable-rtemsbsp=qemuprep-altivec
-both variants:
-  configure --target=powerpc-rtems --enable-rtemsbsp='qemuprep qemuprep-altivec'
-
-Building QEMU:
-In case you have no pre-built qemu-0.14.1 you can
-compile it yourself:
-
-cd qemu-0.14.1
-configure --target-list=ppc-softmmu
-make
-
-Running QEMU:
-A number of command-line options are important (BTW: make sure
-you run the PPC/PREP emulator and not a natively installed i386/PC
-emulating 'qemu')
-
--M prep         --- select machine type: prep
--cpu 604        --- select 604 CPU for non-altivec variant
--cpu 7400       --- select 7400 CPU for altivec variant
-
-              NOTE: the 7455 and 7457 emulations are buggy as of
-              qemu-0.14.1 and they won't work.
-
--bios <rtems-install-prefix>/powerpc-rtems/qemuprep/qemu_fakerom.bin
--bios <rtems-install-prefix>/powerpc-rtems/qemuprep-altivec/qemu_fakerom.bin
-                --- select proprietary dummy 'BIOS'
-
--nographic      --- redirect serial/IO to console where qemu is run
-
--kernel <path>  --- path to your RTEMS executable (.ralf file, e.g., 'hello.ralf')
--no-reboot      --- terminate after one run
--append <arg>   --- RTEMS kernel comand line (use e.g., to modify
-                    ne2000 driver interrupt line)
-
-Networking:
-(We assume your RTEMS application is correctly configured and
-built for networking using the ne2k adapter [other adapters 
-can be used with unbundled/libbsdport drivers])
-
-I use networking with a 'tap' interface on the host machine
-and can then communicate with the emulated target in any
-desired way.  The Ethernet address specified in the RTEMS network interface
-configuration and the Qemu command line must match, otherwise uni-cast frames
-are not received.  It is best to use a NULL pointer in the RTEMS network
-interface configuration for the Ethernet address, so that the default from Qemu
-is used.  Make sure that your firewall settings allow communication between
-different Qemu instances and your host.
-
-On (linux) host:
-
-# create a 'permanent' tap device that can be used by myself
-# (as non-root user).
-sudo tunctl -u `id -u`
-# configure tap0 interface
-sudo ifconfig tap0 10.1.1.1 netmask 255.255.255.0 up
-# provide a suitable dhcpd config file (for the emulated
-# platform to boot: IP address etc.
-#
-# execute dhcp on host
-sudo dhcpd -d tap0
-
-Start emulated prep platform:
-
-ppc-softmmu/qemu-system-ppc                               \
-    -M prep                                               \
-    -cpu 7400                                             \
-    -bios  <rtems-prefix>/powerpc-rtems/qemuprep-altivec/lib/qemu_fakerom.bin \
-    -kernel <my_path>/my_app.ralf                         \
-	-append --ne2k-irq=9                                  \
-    -nographic                                            \
-    -no-reboot                                            \
-    -net nic,model=ne2k_isa                               \
-    -net tap,vlan=0,ifname=tap0,script=no,downscript=no 
-
-Again: if you use the non-altivec BSP variant, use -cpu 604
-and if you use the altivec-enabled variant then you MUST use
--cpu 7400.
-
-Have fun.
-
-Till Straumann, 2011/07/18
Index: c/src/lib/libbsp/powerpc/mpc55xxevb/README
===================================================================
--- c/src/lib/libbsp/powerpc/mpc55xxevb/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,15 +1,0 @@
-Supported MCUs:
-
- o MPC5516
- o MPC5554
- o MPC5566
- o MPC5643L
- o MPC5674F
-
-Supported boards:
-
- o embedded brains GmbH GWLCFM
- o phyCORE MPC5554
- o Freescale MPC5566EVB
- o Freescale XKT564L KIT
- o Axiom MPC567XADAT516 / MPC567XEVBFXMB
Index: c/src/lib/libbsp/powerpc/mpc8260ads/README
===================================================================
--- c/src/lib/libbsp/powerpc/mpc8260ads/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,331 +1,0 @@
-BSP NAME:           mpc8260ads
-BOARD:              Motorola MPC8260 ADS Evaluation board
-BUS:                N/A
-CPU FAMILY:         ppc
-CPU:                PowerPC MPC8260
-COPROCESSORS:       Hardware FPU (except on revision 2J24M)
-MODE:               32 bit mode, I and D cache disabled
-DEBUG MONITOR:      None
-
-PERIPHERALS
-===========
-TIMERS:             Decrementer
-RESOLUTION:         0.1 microsecond
-SERIAL PORTS:       4 SCCs (SSC1 and 2 are connectd to RS232 drivers)
-                    SCC3 is used in HDLC mode to transport IP frames.
-                    SMCs, FCCs, SPI, I2C are unused.
-REAL-TIME CLOCK:    
-DMA:                Each serial port
-VIDEO:              none
-SCSI:               none
-NETWORKING:         IP over HDLC (8 Mbps) on SCC3 (MPC8260)
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       Decrementer
-IOSUPP DRIVER:      SCC1, SCC2
-SHMSUPP:            none
-TIMER DRIVER:       Timebase register (lower 32 bits only)
-
-STDIO
-=====
-PORT:               SCC2
-ELECTRICAL:         RS-232
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-NOTES
-=====
-On-chip resources:
-	SCC1		console
-	SCC2		console
-	SCC3		network
-	SCC4		
-	CLK1		
-	CLK2		
-	CLK3
-	CLK4
-	CLK5		network
-	CLK6
-	CLK7
-	CLK8
-	BRG1		console
-	BRG2		console
-	BRG3		console
-	BRG4		network
-	RTC
-	PIT		
-	TB		timer
-	DEC		clock
-	SWT	
-	*CS0		8M FLASH
-	*CS1		Config registers
-	*CS2		60X SDRAM
-	*CS3		
-	*CS4		LCL SDRAM
-	*CS5		ATM
-	*CS6		
-	*CS7		
-	*CS8
-	*CS9
-	*CS10
-	*CS11				
-	UPMA
-	UPMB
-	IRQ0		
-	IRQ1		
-	IRQ2		
-	IRQ3		
-	IRQ4		
-	IRQ5
-	IRQ6	
-	IRQ7
-
-
-Board description
------------------
-
-Clock rate:	40MHz (board can run up 66MHz with alternate OSC)
-Bus width:	32 bit Flash, 64 bit SDRAM
-FLASH:		8M SIMM
-RAM:		16M SDRAM DIMM
-
-The board is marked with "Rev PILOT"
-U17 is marked with "MPC8260ADS Pilot 00"
-The processor is marked with "XPC8260ZU166 166/133/66 MHz"
-
-
-Board Configuration:
---------------------
-
-The evaluation board has a number of configurable options:
-
-DIP switch settings used:
-DS1: 1-"off", 2-"on", 3-"off", 4-"on", 5-"off", 6-"off", 7-"off", 8-"off"
-DS2: all "on"
-DS3: all "on"
-
-A 40MHz oscillator is fitted to U16.
-
-
-Board Connections:
-------------------
-
-Connect a serial terminal to PA3 (SCC2) configured for 9600,n,8,1 to
-get console I/O. A 9way male-female straight-through cable is required to 
-connect to a PC.
-
-If you require the network connections (see README in network directory)
-you need to connect 3VTTL - RS422 level convertors to the CPM expansion 
-connector, P4. The signals, as numbered on the connector itself
-(beware: the numbering on the PCB does not agree):
-
-TX Data  (SCC3 TXD) (output) Pin a25
-TX Clock (BRG4O)    (output) Pin a11
-Rx Data  (SCC3 RXD) (input)  Pin c15
-Rx Clock (CLK5)     (input)  Pin d28
-Ground   (GND)      (n/a)    Pin c1
-
-
-Debugging/ Code loading:
-------------------------
-
-Tested using the Metrowerks debugger and Macraigor OCDemon (Raven).  
-The OCD connects via the parallel port and allows you to download code 
-to the board.  It may be possible to use some other debugger if you
-don't already have Metrowerks CodeWarrior.
-
-
-
-Verification
--------------------------------
-
-*** TESTING IN PROGRESS - DO NOT BELIEVE THESE RESULTS ***
-
-Single processor tests:  Passed
-Multi-processort tests:  not applicable
-Timing tests:
-	Context Switch
-
-	context switch: self 9
-	context switch: to another task 10
-	context switch: no floating point contexts 23
-	fp context switch: restore 1st FP task 24
-	fp context switch: save initialized, restore initialized 11
-	fp context switch: save idle, restore initialized 11
-	fp context switch: save idle, restore idle 23
-
-	Task Manager
-
-	rtems_task_create 83
-	rtems_task_ident 84
-	rtems_task_start 30
-	rtems_task_restart: calling task 48
-	rtems_task_restart: suspended task -- returns to caller 36
-	rtems_task_restart: blocked task -- returns to caller 47
-	rtems_task_restart: ready task -- returns to caller 35
-	rtems_task_restart: suspended task -- preempts caller 56 
-	rtems_task_restart: blocked task -- preempts caller 116
-	rtems_task_restart: ready task -- preempts caller 93
-	rtems_task_delete: calling task 102
-	rtems_task_delete: suspended task 74
-	rtems_task_delete: blocked task 76
-	rtems_task_delete: ready task 80
-	rtems_task_suspend: calling task 37
-	rtems_task_suspend: returns to caller 14
-	rtems_task_resume: task readied -- returns to caller 16
-	rtems_task_resume: task readied -- preempts caller 30
-	rtems_task_set_priority: obtain current priority 12
-	rtems_task_set_priority: returns to caller 23
-	rtems_task_set_priority: preempts caller 52
-	rtems_task_mode: obtain current mode 5
-	rtems_task_mode: no reschedule 6
-	rtems_task_mode: reschedule -- returns to caller 15
-	rtems_task_mode: reschedule -- preempts caller 43
-	rtems_task_wake_after: yield -- returns to caller 8
-	rtems_task_wake_after: yields -- preempts caller 30
-	rtems_task_wake_when: 49
-
-	Interrupt Manager
-
-	interrupt entry overhead: returns to nested interrupt 7
-	interrupt entry overhead: returns to interrupted task 31
-	interrupt entry overhead: returns to preempting task 14
-	interrupt exit overhead: returns to nested interrupt 10
-	interrupt exit overhead: returns to interrupted task 8
-	interrupt exit overhead: returns to preempting task 45
-
-	Clock Manager
-
-	rtems_clock_set 28
-	rtems_clock_get 0
-	rtems_clock_tick 36
-
-	Timer Manager
-
-	rtems_timer_create 11
-	rtems_timer_ident 82
-	rtems_timer_delete: inactive 14
-	rtems_timer_delete: active 16
-	rtems_timer_fire_after: inactive 20
-	rtems_timer_fire_after: active 22
-	rtems_timer_fire_when: inactive 24
-	rtems_timer_fire_when: active 24
-	rtems_timer_reset: inactive 18
-	rtems_timer_reset: active 21
-	rtems_timer_cancel: inactive 11
-	rtems_timer_cancel: active 12
-
-	Semaphore Manager
-
-	rtems_semaphore_create 56
-	rtems_semaphore_ident 94
-	rtems_semaphore_delete 34
-	rtems_semaphore_obtain: available 13
-	rtems_semaphore_obtain: not available -- NO_WAIT 13
-	rtems_semaphore_obtain: not available -- caller blocks 48
-	rtems_semaphore_release: no waiting tasks 16
-	rtems_semaphore_release: task readied -- returns to caller 36
-	rtems_semaphore_release: task readied -- preempts caller   36
-
-	Message Queue Manager
-
-	rtems_message_queue_create 110
-	rtems_message_queue_ident 82
-	rtems_message_queue_delete 43
-	rtems_message_queue_send: no waiting tasks 28
-	rtems_message_queue_send: task readied -- returns to caller 31
-	rtems_message_queue_send: task readied -- preempts caller 46
-	rtems_message_queue_urgent: no waiting tasks 28
-	rtems_message_queue_urgent: task readied -- returns to caller 31
-	rtems_message_queue_urgent: task readied -- preempts caller 46
-	rtems_message_queue_broadcast: no waiting tasks 22
-	rtems_message_queue_broadcast: task readied -- returns to caller 81
-	rtems_message_queue_broadcast: task readied -- preempts caller 75
-	rtems_message_queue_receive: available 26
-	rtems_message_queue_receive: not available -- NO_WAIT 15
-	rtems_message_queue_receive: not available -- caller blocks 48
-	rtems_message_queue_flush: no messages flushed 14
-	rtems_message_queue_flush: messages flushed 14
-
-	Event Manager
-
-	rtems_event_send: no task readied 12
-	rtems_event_send: task readied -- returns to caller 38
-	rtems_event_send: task readied -- preempts caller 21
-	rtems_event_receive: obtain current events 1
-	rtems_event_receive: available 19
-	rtems_event_receive: not available -- NO_WAIT 11
-	rtems_event_receive: not available -- caller blocks 36
-
-	Signal Manager
-
-	rtems_signal_catch: 31
-	rtems_signal_send: returns to caller 21
-	rtems_signal_send: signal to self 39
-	exit ASR overhead: returns to calling task 30
-	exit ASR overhead: returns to preempting task 33
-
-	Partition Manager
-
-	rtems_partition_create 59
-	rtems_partition_ident 82
-	rtems_partition_delete 20
-	rtems_partition_get_buffer: available 19
-	rtems_partition_get_buffer: not available 13
-	rtems_partition_return_buffer 20
-
-	Region Manager
-
-	rtems_region_create 37
-	rtems_region_ident 84
-	rtems_region_delete 20
-	rtems_region_get_segment: available 19
-	rtems_region_get_segment: not available -- NO_WAIT 23
-	rtems_region_get_segment: not available -- caller blocks 75
-	rtems_region_return_segment: no waiting tasks 21
-	rtems_region_return_segment: task readied -- returns to caller 55
-	rtems_region_return_segment: task readied -- preempts caller 82
-
-	Dual-Ported Memory Manager
-
-	rtems_port_create 23
-	rtems_port_ident 82
-	rtems_port_delete 21
-	rtems_port_internal_to_external 10
-	rtems_port_external_to_internal 11
-
-	IO Manager
-
-	rtems_io_initialize 1
-	rtems_io_open 1
-	rtems_io_close 1
-	rtems_io_read 1
-	rtems_io_write 1
-	rtems_io_control 1
-
-	Rate Monotonic Manager
-
-	rtems_rate_monotonic_create 43
-	rtems_rate_monotonic_ident 82
-	rtems_rate_monotonic_cancel 23
-	rtems_rate_monotonic_delete: active 28
-	rtems_rate_monotonic_delete: inactive 25
-	rtems_rate_monotonic_period: obtain status 17
-	rtems_rate_monotonic_period: initiate period -- returns to caller 32
-	rtems_rate_monotonic_period: conclude periods -- caller blocks 30
-
-Network tests:
-       TCP throughput (as measured by ttcp):
-               Receive: 1324 kbytes/sec
-               Transmit: 1037 kbytes/sec
-
-
-
-
-
-
-
-
Index: c/src/lib/libbsp/powerpc/mvme3100/KNOWN_PROBLEMS
===================================================================
--- c/src/lib/libbsp/powerpc/mvme3100/KNOWN_PROBLEMS	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,77 +1,0 @@
-I have observed what seem to be strange
-initialization problems with the ethernet
-driver:
-
-I usually configure RTEMS networking by
-BOOTP (the problem has nothing to do with
-BOOTP but I just want to describe my
-environment). Sometimes (it can actually
-happen quite frequently, like 1 out of 4
-attempts but since yesterday when I decided
-to hunt this down more systematically
-the problem seems to have gone - typical!)
-networking fails to initialize properly:
-
-BOOTP requests are sent (to the MAC),
-TX interrupts occur and the TX MIB
-counters increment - i.e., everything
-seems normal but no data can be seen on
-the wire. Also, even though we are on
-a quite busy network, the receiver
-doesn't see anything, i.e., 0 RX
-interrupts, RX MIB counters for broadcast
-packets remain steady at zero etc.
-In brief, everyting seems normal at the
-MAC and higher layers but no connection
-to the wire seems to be established.
-
-Some further tests reveal (system under
-test is in the 'bad' state):
- 1 communication with the BCM5461 PHY
-   is normal. Registers can be read/written
-   and everything seems normal. In particular,
-   the link status is reported OK: disconnect
-   the cable and MII - BMSR bit 1<<2 is clear,
-   reconnect the cable and BMSR[2] is set.
-   Restart autoneg, the link goes and comes
-   back after a short while.
- 2 setting the loopback bit in the TSEC's
-   MACCFG1 register correctly feeds packets
-   back into the RX, RX MIB counters now
-   increment and indicate data flow.
-   There are RX interrupts and all indicates
-   (I haven't actually looked at RX packet
-   data) that the RX would work normally.
-   After switching MACCFG1[LOOP_BACK] off
-   no RX traffic can be seen anymore.
- 3 resetting the PHY (BMCR = 0x8000) and/or
-   restarting autoneg (BMCR = 0x1200) seems
-   to perform the desired action (registers
-   take on expected values) but still no luck
-   with communication all the way through
-   to the wire.
-
-Especially point 2 seems to indicate that
-the problem is likely to be between the
-wire and the MAC somewhere but re-setting
-the PHY doesn't change things. Analysis is
-much complicated by the fact that there
-is no documentation on the BCM5461 chip
-available.
-
-Noteworthy is also that if the system
-initializes OK then it continues to work
-normally; if initialization fails then
-only resetting the board and restarting
-helps.
-
-I wanted to test if it makes a difference
-if MotLoad used the chip prior to RTEMS
-being booted (in case MotLoad did some
-magic step during initialization) but 
-before I could really test this the
-problem went away.
-
-Big Mystery...
-
-12/12/2007, T.S.
Index: c/src/lib/libbsp/powerpc/mvme3100/LICENSE
===================================================================
--- c/src/lib/libbsp/powerpc/mvme3100/LICENSE	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,49 +1,0 @@
-/* NOTE: The terms described in this LICENSE file apply only to the
- *       files created by the author (see below). Consult individual
- *       file headers for more details.
- */
-
-/* 
- * Authorship
- * ----------
- * This software ('mvme3100' RTEMS BSP) was
- *     created by Till Straumann <strauman@slac.stanford.edu>, 2007,
- * 	   Stanford Linear Accelerator Center, Stanford University.
- * 
- * Acknowledgement of sponsorship
- * ------------------------------
- * The 'mvme3100' BSP was produced by
- *     the Stanford Linear Accelerator Center, Stanford University,
- * 	   under Contract DE-AC03-76SFO0515 with the Department of Energy.
- * 
- * Government disclaimer of liability
- * ----------------------------------
- * Neither the United States nor the United States Department of Energy,
- * nor any of their employees, makes any warranty, express or implied, or
- * assumes any legal liability or responsibility for the accuracy,
- * completeness, or usefulness of any data, apparatus, product, or process
- * disclosed, or represents that its use would not infringe privately owned
- * rights.
- * 
- * Stanford disclaimer of liability
- * --------------------------------
- * Stanford University makes no representations or warranties, express or
- * implied, nor assumes any liability for the use of this software.
- * 
- * Stanford disclaimer of copyright
- * --------------------------------
- * Stanford University, owner of the copyright, hereby disclaims its
- * copyright and all other rights in this software.  Hence, anyone may
- * freely use it for any purpose without restriction.  
- * 
- * Maintenance of notices
- * ----------------------
- * In the interest of clarity regarding the origin and status of this
- * SLAC software, this and all the preceding Stanford University notices
- * are to remain affixed to any copy or derivative of this software made
- * or distributed by the recipient and are to be affixed to any copy of
- * software made or distributed by the recipient that contains a copy or
- * derivative of this software.
- * 
- * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
- */ 
Index: c/src/lib/libbsp/powerpc/mvme3100/README
===================================================================
--- c/src/lib/libbsp/powerpc/mvme3100/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,134 +1,0 @@
-Some information about this BSP
-================================
-
-ACKNOWLEDGEMENTS
-----------------
-Acknowledgements:
-
- Valuable information was obtained from the following drivers
-
-    linux: (BCM54xx) Maciej W. Rozycki, Amy Fong.
-
- This BSP also builds on top of the work of others who have contributed
- to similar RTEMS (powerpc) BSPs, most notably Eric Valette, Eric Norum
- and others.
-
- This BSP was produced by the Stanford Linear Accelerator Center, 
- Stanford University under contract with the US Department of Energy.
-
-LICENSE
--------
-See ./LICENSE file.
-
-Note that not all files that are part of this BSP were written by
-myself. Consult individual file headers for copyright
-and authorship information.
-
-HARDWARE SUPPORT
-===============
-(some of the headers mentioned below contain more
-detailed information)
-
-NOTE:  The BSP supports the mvme3100 board.
-
-WARNING: It is extremely important that a MOTLoad "waitProbe", "netShut"
-         sequence be executed before booting RTEMS. Otherwise, network
-         interface interrupt handlers installed by MOTLoad may cause memory
-         corruption
-
-CONSOLE: 2 serial devices, UART driver from 'shared' - no surprises
-       ("/dev/ttyS0", [="/dev/console"], "/dev/ttyS1"). (Only
-       /dev/ttyS0 is accessible from the front panel.)
-
-CLOCK: Decrementer, same as other PPC BSPs. (FIXME: a openpic timer
-       could be used.) The bookE decrementer is slightly different
-	   from the classic PPC decrementer but the differences are
-	   hidden from the user.
-
-PIC (interrupt controller) (bsp/irq.h): OpenPIC integrated with
-       the MPC8540. (see also: bsp/openpic.h).
-
-PCI (bsp/pci.h): 
-       In addition to rtems' PCI API, a call is available to scan
-       all devices executing a user callback on each device.
-       BSP_pciConfigDump() is a convenience wrapper dumping essential
-       information (IDs, BAs, IRQ pin/line) to the console or a file.
-
-MEMORY MAP: MotLoad; all addresses (MEM + I/O) read from PCI config. space
-       are CPU addresses. For sake of portability, drivers should still
-       use the _IO_BASE, PCI_MEM_BASE, PCI_DRAM_OFFSET constants.
-
-NVRAM: No NVRAM.
-
-FLASH (bsp/flashPgm.h): Routines to write flash. Highest level
-      wrapper writes a file to flash.
-	  NOTE: Writing to flash is disabled by default;
-	        call BSP_flashWriteEnable().
-
-I2C (bsp.h, rtems/libi2c.h, libchip/i2c-xxx.h):  temp. sensor, eeprom
-      and real-time clock (RTC) are available as device files (bsp.h);
-	  lower-level interface is provided by libi2c.h.
-
-	  Available i2c devices are:
-
-				/dev/i2c0.vpd-eeprom
-				/dev/i2c0.usr-eeprom
-				/dev/i2c0.usr1-eeprom
-				/dev/i2c0.ds1621
-				/dev/i2c0.ds1621-raw
-				/dev/i2c0.ds1375-raw
-
-      You can e.g., read the board temperature:
-			    fd = open("/dev/i2c0.ds1621",O_RDONLY)
-				read(fd,&temp,1)
-				close(fd);
-				printf("Board Temp. is %idegC\n",(int)temp);
-
-VME: (bsp/VME.h, bsp/vme_am_defs.h, bsp/VMEDMA.h).
-      *always* use VME.h API, if possible; do *not* use chip driver
-	  (vmeTsi148.h) directly unless you know what you are
-	  doing (i.e., if you need specific features provided by the particular
-	  chip)
-
-      VMEConfig.h should not be used by applications as it makes them
-      dependent on BSP internals. VMEConfig.h is intended to be used
-	  by BSP designers only.
-
-      VME interrupt priorities: the VME bridge(s) do not implement
-      priorities in hardware.
-      However, on the 3100 multiple physical interrupt
-      lines/wires connect the VME bridge to the PIC. Hence, it is possible
-      to assign the different wires different priorities at the PIC
-      (see bsp/openpic.h) and to route VME interrupts to different
-	  wires according to their priority.
-	  You need to call driver specific routines
-      for this (vmeXXXIntRoute()), however (for driver-specific API
-	  consult bsp/vmeTsi148.h).
-
-	  For VME DMA *always* use the bsp/VMEDMA.h API. DO NOT use
-	  chip-specific features. Applications written using the bsp/VMEDMA.h
-	  API are portable between the UniverseII and the Tsi148.
-
-HARDWARE TIMERS: (bsp/openpic.h). Programmable general-purpose 
-      timers. Routines are provided to setup, start and stop
-	  GPTs. The setup routine allows for specifying single-shot or periodic
-	  mode and dispatches a user ISR when the GPT expires.
-
-NETWORK: (bsp/if_tsec_pub.h). In addition to the standard bsdnet
-      'attach' function the driver offers a low-level API that
-	  can be used to implement alternate communication links
-	  which are totally decoupled from BSDNET.
-
-	  Consult 'KNOWN_PROBLEMS'.
-
-VPD: (bsp/vpd.h). The board's VPD (vital-product-data such as S/N,
-      MAC addresses and so forth) can be retrieved.
-
-BOOTING: BSP has a relocator-header. Clear MSR and jump to the first
-      instruction in the binary. R3 and R4, if non-null, point to the
-      start/end of an optional command line string that is copied into
-      BSP_commandline_string. The BSP is compatible with 'netboot'.
-
-Have fun.
-
--- Till Straumann <strauman@slac.stanford.edu>, 2007.
Index: c/src/lib/libbsp/powerpc/mvme5500/LICENSE
===================================================================
--- c/src/lib/libbsp/powerpc/mvme5500/LICENSE	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,112 +1,0 @@
-
-     EPICS Open License Terms
-
-       The following is derived from the EPICS Open software license
-       agreement which applies to many of the unbundled EPICS extensions
-       and support modules.
-
-       --------------------------------------------------------------
-
-       Copyright Â© 2004, Brookhaven National Laboratory and
-			 Shuchen K. Feng <feng1@bnl.gov>
-
-       The "RTEMS-MVME5500 Board Support Package" is distributed
-       subject to the following license conditions:
-
-         SOFTWARE LICENSE AGREEMENT
-         Software: RTEMS-MVME5500 Board Support Package (BSP)
-
-          1. The "Software", below, refers to the aforementioned Board Support
-             package (in either source code, or binary form and accompanying
-             documentation)
-
-             Each licensee is addressed as "you" or "Licensee."
-
-          1a.Part of the software was derived from the "RTEMS-PowerPC
-             BSPs", "NetBSD Project by Allegro Networks, Inc., and
-             Wasabi Systems, In.". The original Copyrights pertaining to
-             these items are contained in the individual source files, 
-             and they are covered by their own License.
-          2. The copyright holders shown above and their third-party
-             licensors hereby grant Licensee a royalty-free nonexclusive
-             license, subject to the limitations stated herein and U.S.
-             Government license rights.
-          3. You may modify and make a copy or copies of the Software for use
-             within your organization, if you meet the following conditions:
-                a. Copies in source code must include the copyright notice
-                   and this Software License Agreement.
-                b. Copies in binary form must include the copyright notice
-                   and this Software License Agreement in the documentation
-                   and/or other materials provided with the copy.
-
-          4. You may modify a copy or copies of the Software or any portion
-             of it, thus forming a work based on the Software, and distribute
-             copies of such work outside your organization, if you meet all
-             of the following conditions:
-                a. Copies in source code must include the copyright notice
-                   and this Software License Agreement;
-                b. Copies in binary form must include the copyright notice
-                   and this Software License Agreement in the documentation
-                   and/or other materials provided with the copy;
-                c. Modified copies and works based on the Software must carry
-                   prominent notices stating that you changed specified
-                   portions of the Software.
-
-          5. Portions of the Software resulted from work developed under a
-             U.S. Government contract and are subject to the following
-             license:  the Government is granted for itself and others acting
-             on its behalf a paid-up, nonexclusive, irrevocable worldwide
-             license in this computer software to reproduce, prepare
-             derivative works, and perform publicly and display publicly.
-          6. WARRANTY DISCLAIMER. THE SOFTWARE IS SUPPLIED "AS IS" WITHOUT
-             WARRANTY OF ANY KIND. THE COPYRIGHT HOLDERS, THEIR THIRD PARTY
-             LICENSORS, THE UNITED STATES, THE UNITED STATES DEPARTMENT OF
-             ENERGY, AND THEIR EMPLOYEES: (1) DISCLAIM ANY WARRANTIES,
-             EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
-             WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
-             TITLE OR NON-INFRINGEMENT, (2) DO NOT ASSUME ANY LEGAL LIABILITY
-             OR RESPONSIBILITY FOR THE ACCURACY, COMPLETENESS, OR USEFULNESS
-             OF THE SOFTWARE, (3) DO NOT REPRESENT THAT USE OF THE SOFTWARE
-             WOULD NOT INFRINGE PRIVATELY OWNED RIGHTS, (4) DO NOT WARRANT
-             THAT THE SOFTWARE WILL FUNCTION UNINTERRUPTED, THAT IT IS
-             ERROR-FREE OR THAT ANY ERRORS WILL BE CORRECTED.
-          7. LIMITATION OF LIABILITY. IN NO EVENT WILL THE COPYRIGHT HOLDERS,
-             THEIR THIRD PARTY LICENSORS, THE UNITED STATES, THE UNITED
-             STATES DEPARTMENT OF ENERGY, OR THEIR EMPLOYEES: BE LIABLE FOR
-             ANY INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL OR PUNITIVE
-             DAMAGES OF ANY KIND OR NATURE, INCLUDING BUT NOT LIMITED TO LOSS
-             OF PROFITS OR LOSS OF DATA, FOR ANY REASON WHATSOEVER, WHETHER
-             SUCH LIABILITY IS ASSERTED ON THE BASIS OF CONTRACT, TORT
-             (INCLUDING NEGLIGENCE OR STRICT LIABILITY), OR OTHERWISE, EVEN
-             IF ANY OF SAID PARTIES HAS BEEN WARNED OF THE POSSIBILITY OF
-             SUCH LOSS OR DAMAGES.
-
-	Brookhaven National Laboratory Notice
-	*************************************
-
-	Acknowledgment of sponsorship
-	- - - - - - - - - - - - - - - -
-	This software was produced by the National Synchrotron Light Source,
-        Brookhaven National Laboratory, under Contract DE-AC02-98CH10886 with
-        the Department of Energy.
-
-	Government disclaimer of liability
-	- - - - - - - - - - - - - - - - -
-	Neither the United States nor the United States Department of Energy,
-	nor any of their employees, makes any warranty, express or implied,
-	or assumes any legal liability or responsibility for the accuracy,
-	completeness, or usefulness of any data, apparatus, product, or process
-	disclosed, or represents that its use would not infringe privately
-	owned rights.
-
-        Brookhaven disclaimer of liability
-        - - - - - - - - - - - - - - - - -
-        Brookhaven National Laboratory makes no representations or warranties,
-        express or implied, nor assumes any liability for the use of this software.
-
-	Maintenance of notice
-	- - - - - - - - - - -
-	In the interest of clarity regarding the origin and status of this
-	software, Brookhaven National Laboratory requests that any recipient of 
-        it maintain this notice affixed to any distribution by the recipient that
-        contains a copy or derivative of this software.
Index: c/src/lib/libbsp/powerpc/mvme5500/README
===================================================================
--- c/src/lib/libbsp/powerpc/mvme5500/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,129 +1,0 @@
-Please reference README.booting for the boot/load process.
-
-For the priority setting of the Interrupt Requests (IRQs), please
-reference README.irq 
-
-The BSP is built and tested on the 4.7.1 and 4.7.99.2 CVS RTEMS release.
-
-I believe in valuable real-time programming, where technical neatness,
-performance and truth are.  I hope I still believe. Any suggestion,
-bug reports, or even bug fixes (great!) would be highly appreciated
-so that I still believe what I believe.
-
-
-ACKNOWLEDGEMENTS
-----------------
-Acknowledgements:
-
-Valuable information was obtained from the following:
-1) Marvell NDA document for the discovery system controller.
-Other related documents are listed at :
-http://www.aps.anl.gov/epics/meetings/2006-06/RTEMS_Primer_SIG/RTEMS_BSP_MVME5500.pdf
-2) netBSD: For the two NICS and some headers :
-           Allegro Networks, Inc., Wasabi Systems, Inc.  
-3) RTEMS:  This BSP also builds on top of the work of others who have
- contributed to similar RTEMS powerpc shared and motorola_powerpc BSPs, most
- notably Eric Valette, Till Straumann (SVGM1 BSP, too), Eric Norum and others.
-
-LICENSE
--------
-See ./LICENSE file.
-
-BSP NAME:           mvme5500
-BOARD:              MVME5500 by Motorola
-BUS:                PCI
-CPU FAMILY:         ppc
-CPU:                MPC7455 @ 1GHZ
-COPROCESSORS:       N/A
-MODE:               32/64 bit mode (support 32 bit for now)
-DEBUG MONITOR:      MOTLoad
-SYSTEM CONTROLLER:  GT64260B
-
-PERIPHERALS
-===========
-TIMERS:             Eight, 32 bit programmable
-SERIAL PORTS:       2 NS 16550 on GT64260B
-REAL-TIME CLOCK:    MK48T37V
-32K NVSRAM:         MK48T37V
-WATCHDOG TIMER:     use the one in GT-64260B
-DMA:                8 channel DMA controller (GT-64260B)
-VIDEO:              none
-NETWORKING:         Port 1: Intel 82544EI Gigabit Ethernet Controller
-		    10/100/1000Mb/s routed to front panel RJ-45
-	            Port 2: 10/100 Mb ethernet unit integrated on the
-                    Marvell's GT64260 system controller 
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       PPC internal
-TTY DRIVER:         PPC internal
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         na
-BAUD:               na
-BITS PER CHARACTER: na
-PARITY:             na
-STOP BITS:          na
-
-
-Jumpers
-=======
-
-1) The BSP is tested with the 60x bus mode instead of the MPX bus mode.
-   ( No jumper or a jumper across pins 1-2 on J19 selects the 60x bus mode)
-
-2) On the mvme5500 board, Ethernet 1 is the Gigabit Ethernet port and is
-   front panel only. Ethernet 2 is 10/100 BaseT Ethernet. For front-panel
-   Ethernet2, install jumpers across pins 1-2 on all J6, J7, J100 and
-   J101 headers.
-
-3) Enable SROM initialization at startup. (No jumper or a jumper across
-   pins 1-2 on J17)
-
-In fact, (if I did not miss anything) the mvme5500 board should function
-properly if one keeps all the jumpers at factory configuration.
-One can leave out the jumper on J30 to disable EEPROM programming.
-
-Notes
-=====
-
-BSP BAT usage
-----------------------
-DBAT0 and IBAT0
-0x00000000
-0x0fffffff  1st 256M, for MEMORY access (caching enabled)
-
-DBAT1 and IBAT1
-0x00000000
-0x0fffffff  2nd 256M, for MEMORY access (caching enabled)
-
-UPDATE: (2004/5).
-The BSP now uses page tables for mapping the entire 512MB
-of RAM. DBAT0 and DBAT1 is hence free for use by the 
-application. A simple 1:1 (virt<->phys) mapping is employed.
-The BSP write-protects the text and read-only data
-areas of the application.  Special acknowledgement to Till
-Straumann <strauman@slac.stanford.edu> for providing inputs in
-porting the memory protection software he wrote (BSP_pgtbl_xxx())
-to MVME5500.
-
-
-The default VME configuration uses DBAT0 to map
-more PCI memory space for use by the universe VME
-bridge:
-
-DBAT0
-0x90000000	PCI memory space <-> VME
-0x9fffffff
-
-Port  VME-Addr   Size       PCI-Adrs   Mode:
-0:    0x20000000 0x0F000000 0x90000000 A32, Dat, Sup
-1:    0x00000000 0x00FF0000 0x9F000000 A24, Dat, Sup
-2:    0x00000000 0x00010000 0x9FFF0000 A16, Dat, Sup
-
-
Index: c/src/lib/libbsp/powerpc/mvme5500/README.VME
===================================================================
--- c/src/lib/libbsp/powerpc/mvme5500/README.VME	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,19 +1,0 @@
-README.VME: written by S. Kate Feng <feng1@bnl.gov> , 7/22/04
-
-
-Some VME modules(e.g. Oms58 motor controller) might require a PCI sync
-command following the out_xx() function (e.g. out_be16()) if mvme5500 is
-used as the SBC.  The mechanism is a hardware hook to help software
-synchronize between the CPU and PCI activities. The PCI sync is
-implemented in pci/pci_interface.c. For more example of the usage,one
-can reference the drvOMS58.cc file that is posted in synAppRTEMS of 
-http://www.nsls.bnl.gov/organization/UserScience/Detectors/Software/Default.htm.
-
-
-In spite of the PCI sync overhead for the Oms58 motor controller, I do
-not see the runtime performance of RTEMS-mvme5500 being compromised as
-compared with that of RTEMS-mvme2307.  For example, it takes the same
-time to run motor_init() of synAppRTEMS for 48 motor initializations
-running either RTEMS-mvme2307 or RTEMS-mvme5500.
-
-  
Index: c/src/lib/libbsp/powerpc/mvme5500/README.booting
===================================================================
--- c/src/lib/libbsp/powerpc/mvme5500/README.booting	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,60 +1,0 @@
-README.booting: written by S. Kate Feng <feng1@bnl.gov>, Aug. 28, 2007
-
-The bootloader is adapted from Till Straumann's Generic Mini-loader,
-which he wrote originally for the SVGM powerpc board. 
-The BSP is built and tested on the 4.7 CVS RTEMS release.
-
-Booting requirement :
--------------------------
-
-1) One needs to setup BOOTP/DHCP and TFTP servers and /etc/bootptab(BOOTP)
-   or /etc/dhcpd.conf (DHCP) properly to boot the system.
-   (Note : EPICS needs a NTP server).
- 
-2) Please copy the prebuilt RTEMS binary (e.g. misc/rtems5500-cexp.bin)
-   and perhaps others (e.g. misc/st.sys) to the /tftpboot/epics/hostname/bin/
-   directory or the TFTPBOOT one you specified in the 'tftpGet'
-   command of the boot script (as shown in the following example).
-
-3) Example of the boot script setup carried out on the MOTLoad 
-   command line : 
-
-MVME5500> gevEdit mot-script-boot
-(Blank line terminates input.)
-waitProbe
-tftpGet -a4000000 -cxx.xx.xx.xx -sxx.xx.xx.xx -m255.255.254.0 -d/dev/enet0 -fepics/hostname/bin/rtems5500-cexp.bin
-netShut
-go -a4000000
-
-
-Update Global Environment Area of NVRAM (Y/N) ? Y
-MVME5500>
-
-Note : (cxx.xx.xx.xx is the client IP address and 
-        sxx.xx.xx.xx is the server IP address)
-
-WARNING : It is extremely important that the MOTLoad "waitProbe", "netShut"
-          sequence be executed before booting RTEMS. Otherwise, network
-          interface interrupt handlers installed by MOTLoad may cause memory
-          corruption
-
-4) Other reference web sites for mvme5500 BSP:
-http://lansce.lanl.gov/EPICS/presentations/KateFeng%20RTEMS-mvme55001.ppt
-http://www.nsls.bnl.gov/facility/expsys/software/EPICS/
-http://www.nsls.bnl.gov/facility/expsys/software/EPICS/FAQ.txt
-
-5) When generating code (especially C++) for this system, one should
-   use at least gcc-3.2 (preferrably a copy downloaded from the RTEMS
-   site [snapshot area] )
-
-6) To reboot the RTEMS-MVME5500 (board reset), one can invoke the
-   bsp_reset() command at Cexp> prompt.
- 
-7) Please reference http://www.slac.stanford.edu/~strauman/rtems
-for the source code and installation guidance of cexp, GeSys and
-other useful utilities such as telnet, nfs, and so on. 
-
-8) To get started with RTEMS/EPICS and to build development
-tools and BSP, I would recommend one to reference
-http://www.aps.anl.gov/epics/base/RTEMS/tutorial/
-in additional to the RTEMS document.
Index: c/src/lib/libbsp/powerpc/psim/README
===================================================================
--- c/src/lib/libbsp/powerpc/psim/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,48 +1,0 @@
-BSP NAME:           psim
-BOARD:              PowerPC Simulator
-BUS:                N/A
-CPU FAMILY:         ppc
-CPU:                PowerPC 603, 603e, 604
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:      BUG mode (emulates Motorola debug monitor)
-
-PERIPHERALS
-===========
-TIMERS:             PPC internal Timebase register
-  RESOLUTION:         ???
-SERIAL PORTS:       simulated via bug
-REAL-TIME CLOCK:    PPC internal Decrementer register
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC internal
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       PPC internal
-TTY DRIVER:         PPC internal
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         na
-BAUD:               na
-BITS PER CHARACTER: na
-PARITY:             na
-STOP BITS:          na
-
-Notes
-=====
-
-Based on papyrus bsp which only really supports
-the PowerOpen ABI with an ELF assembler.
-
-For the multiprocessing tests to run, you must have a modified version of
-the PowerPC Simulator psim which supports an area of UNIX shared memory
-and UNIX semaphore mapped into the PowerPC address space.
-
Index: c/src/lib/libbsp/powerpc/psim/vectors/README
===================================================================
--- c/src/lib/libbsp/powerpc/psim/vectors/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,21 +1,0 @@
-The location of the vectors file object is critical.
-
-From the comments at the head of vectors.s:
-
-  The issue with this file is getting it loaded at the right place.
-  The first vector MUST be at address 0x????0100.
-  How this is achieved is dependant on the tool chain.
-
-  However the basic mechanism for ELF assemblers is to create a
-  section called ".vectors", which will be loaded to an address
-  between 0x????0000 and 0x????0100 (inclusive) via a link script.
-
-  The basic mechanism for XCOFF assemblers is to place it in the
-  normal text section, and arrange for this file to be located
-  at an appropriate position on the linker command line.
-
-  The variable 'PPC_VECTOR_FILE_BASE' must be defined to be the
-  offset from 0x????0000 to the first location in the file.  This
-  will usually be 0x0000 or 0x0100.
-
-Andrew Bray 18/8/1995
Index: c/src/lib/libbsp/powerpc/qemuppc/README
===================================================================
--- c/src/lib/libbsp/powerpc/qemuppc/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,28 +1,0 @@
-This BSP is designed to operate on the PPC simulator provided by qemu.
-We are using the Courverture Project's qemu source tree.
-
-Couverture Project to add tracing/coverage to qemu
-  http://libre.adacore.com/libre/tools/coverage/
-
-Their source repository
-  http://forge.open-do.org/scm/?group_id=8
-
-That has instructions on checking it out.
-
-If you check it out into ${BASE} directory, then the
-directory with their modified qemu is:
-
-  ${BASE}/couverture/trunk/couverture/tools/qemu-r6588
-
-My BASE is /home/joel/qemu-coverage.  I configured like this
-from within the qemu source tree.
-
-  ./configure --prefix=/home/joel/qemu-coverage/install
-  make
-  make install
-
-This gives all simulated targets supported.  
-
-See the Makefile for more details.
-
-  
Index: c/src/lib/libbsp/powerpc/qoriq/README
===================================================================
--- c/src/lib/libbsp/powerpc/qoriq/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,29 +1,0 @@
-Board support package for the Freescale QorIQ platform:
-
-  http://en.wikipedia.org/wiki/QorIQ
-
-Boards known to work P1020RDB, MVME2500, T2080RDB and T4240RDB.
-
-Boot via U-Boot and FDT support is mandatory.  Use
-
-  mkimage -A ppc -O linux -T kernel -a 0x4000 -e 0x4000 -n RTEMS -d app.bin.gz app.img
-
-to create a bootable image.  You must use the "linux" image type to enable the
-dynamic FDT adjustment by U-Boot.  Boot it for example via the
-
-  tftp 1000000 app.img
-  tftp c00000 p1020rdb.dtb
-  bootm 1000000 - c00000
-
-U-Boot commands.
-
-For a Topaz hypervisor guest configuration use:
-
-  rtems/configure --enable-rtemsbsp=qoriq_e6500_32 \
-    QORIQ_IS_HYPERVISOR_GUEST=1 \
-    QORIQ_UART_0_ENABLE=0 \
-    QORIQ_UART_1_ENABLE=0 \
-    QORIQ_TLB1_ENTRY_COUNT=16
-
-You may have to adjust the linker command file according to your partition
-configuration.
Index: c/src/lib/libbsp/powerpc/ss555/README
===================================================================
--- c/src/lib/libbsp/powerpc/ss555/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,282 +1,0 @@
-This is a README file for the Intec SS555 of RTEMS 4.6.0
-
-The SS555 port was sponsored by Defence Research and Development 
-Canada - Suffield, and is Copyright (C) 2004, Real-Time Systems Inc.
-
-Please send any comments, improvements, or bug reports to:
-
-David Querbach
-querbach@realtime.bc.ca
-
-
-Summary
--------
-
-BSP NAME:           ss555
-BOARD:              Intec Automation Inc. SS555
-BUS:                None 
-CPU FAMILY:         PowerPC
-CPU:                PowerPC MPC555
-COPROCESSORS:       Built-in Motorola TPU
-MODE:               32 bit mode
-
-DEBUG MONITOR:      None
-
-PERIPHERALS
-===========
-TIMERS:             PIT / Timebase
-  RESOLUTION:       1 microsecond (4 MHz crystal / 4)
-SERIAL PORTS:       2 SCI
-REAL-TIME CLOCK:    On-chip.
-DMA:                None.
-VIDEO:              None.
-SCSI:               None.
-NETWORKING:         None.
-		   
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       yes
-CONSOLE DRIVER:     yes
-SHMSUPP:            N/A
-TIMER DRIVER:       yes
-NETWORK DRIVER:	    no
-
-NOTES
-=====
-On-chip resources:
-	SCI1		serial port
-	SCI2		serial port (console)
-	PIT		clock
-	TB		timing test support
-	DEC
-	SWT		watchdog timer -- enable in startup/iss555.c
-	*CS0		external 512k 2-1-1-1 Burst SRAM
-	*CS1
-	*CS2
-	*CS3		CPLD
-	IRQ0
-	IRQ1
-	IRQ2		
-	IRQ3		
-	IRQ4		
-	IRQ5	
-	IRQ6
-	IRQ7
-	IRQ_LVL0	
-	IRQ_LVL1
-	IRQ_LVL2
-	IRQ_LVL3
-	IRQ_LVL4
-	IRQ_LVL5	SCI
-	IRQ_LVL6	PIT
-	IRQ_LVL7
-	
-
-Board description
------------------
-Clock rate:     40 MHz development/embeddable board
-Bus width:      32-bit on-board RAM, 16-bit off-board I/O
-FLASH:	        512k on-chip
-RAM:            512k 2-1-1-1 burst SRAM
-
-
-Installation
-------------
-
-The ss555 port uses the Intec SS555's external RAM in two different ways,
-depending on whether or not it is built for debugging by giving the
-VARIANT=DEBUG switch to make:
-
-	make VARIANT=DEBUG all
-
-1.  In the debugging case, the linker script concanttenates the .text,
-.data, and .bss sections starting at location zero, so they all can be
-loaded into the external RAM for debugging.  We assume that the debugger
-disables the internal Flash ROM and enables the external RAM before loading
-the code into the external RAM.
-
-2.  In the normal (non-debugging) case, the linker script still places the
-.text section near zero, but places the start of the .data and .bss sections
-at the start location of the MPC555's internal RAM.  The system startup code
-then configures the external RAM just after the internal RAM in memory,
-forming one large block from the two RAM devices.
-
-
-Console driver
----------------
-
-This BSP includes an termios-capable asynchronous serial line driver that
-supports SCI1 and SCI2. The RTEMS console is selected at configuration time
-with the CONSOLE_MINOR variable (see .../ss555/configure.ac).  We default to
-SCI2 for the console, since SCI1 has some extra features which may be
-desired for application use.
-
-The BSP console supports three different modes of operation:
-
-  1. polled I/O done with termios support,
-  2. polled I/O done without termios support,
-  3. interrupt-driven I/O with termios support.
-     
-The mode of operation of the serial driver is determined at configure time in
-part by the value of the UARTS_IO_MODE variable (see .../ss555/configure.ac).
-
-  0 - polled I/O.
-  1 - interrupt-driven I/O.
-  
-Also, set the value of UARTS_USE_TERMIOS to select whether termios should be
-used to perform buffering and input/output processing. Without termios
-support, input processing is limited to the substitution of LF for a
-received CR, and output processing is limited to the transmission of a CR
-following the transmission of a LF. The choices for UARTS_USE_TERMIOS are:
-
-  0 - do not use termios
-  1 - use termios
-
-In most real-time applications, the driver should be configured to use
-termios and interrupt-driven I/O. Special requirements may dictate otherwise.
-
-Polled I/O must be used when running the timing tests. It must also be used
-to run some other tests and some samples, such as the cdtest. Some tests
-change the interrupt mask and will hang interrupt-driven I/O indefinitely.
-Others, such as cdtest, perform console output from the static constructors
-before the console is opened, causing the test to hang. Still other tests
-produce output that is supposed to be in some specific order. For these
-tests, termios should not be used, as termios buffers output and the
-transmission of the buffers occur at somewhat unpredictable times.
-
-The real solution is to fix the tests so that they work with interrupt-driven
-I/O and termios.
-
-
-printk() and debug output
------------------------
-
-The implementation of printk() in RTEMS is mostly independent of most system
-services. The printk() function can therefore be used to print messages to a
-debug console, particularly when debugging startup code or device drivers,
-i.e. code that runs before the console driver is opened or that runs with
-interrupts disabled.
-
-Support is provided to send printk output to either port. Specify the
-desired port at configure time by setting the value of PRINTK_MINOR to one
-of SCI1_MINOR or SCI2_MINOR.
-
-printk() always uses polled I/O, and never uses termios.
-
-If the printk() port is opened by RTEMS, then UARTS_IO_MODE must be set for
-polled I/O, otherwise the I/O functions will be in conflict.  Using printk()
-before the port is initialized is, of course, not possible.  This
-initialization occurs in console_initialize(), which is called by
-rtems_initialize_executive_early().
-
-
-Watchdog Timer
---------------
-
-The MPC555 watchdog timer can be enabled at configuration time by defining
-the WATCHDOG_TIMEOUT variable.  This variable sets the watchdog timeout
-period in steps of
-
-	  2048          2048
-	---------  =  ---------  =  51.2 usec
-	 Fsystem       40 MHz
-
-or about 1/20 msec.  When WATCHDOG_TIMEOUT is left undefined, the watchdog
-timer is disabled.
-
-
-Miscellaneous
--------------
-
-Most code came from the mbx8xx port, except for the floating-point handling
-which came from the mpc8260ads.
-
-
-Host System
------------
-
-The port was developed on an x86 box running Debian 3.0.  The toolchain was
-built from the sources at rtems.org, except for the autotools which came
-from the Debian distribution.
-
-
-Test Configuration
-------------------
-
-Board:                Intec SS555 v1.1
-CPU:                  Motorola MPC555LFMZP40, mask 1K83H
-Clock Speed:          Crystal 4.0 MHz, CPU 40.0 MHz
-RAM:                  512K bytes of 2-1-1-1 Burst SRAM
-Times Reported in:    Microseconds
-Timer Source:         Timebase clock
-GCC Flags:            -O4 -fno-keep-inline-functions -mcpu=(821/860) 
-Console:              Operates in polled mode on SMC2. No I/O through EPPC-Bug.    
-
-
-Test Results
-------------
-
-Single processor tests:  
-  All tests passed, except that:
-    - sp09 aborts due to memory shortage
-    - sp20 needs to be run with output buffering enabled (see
-      buffer_test_io.h)
-
-Multi-processor tests:  
-  Not applicable.
-
-Library tests:
-  All tests passed.  Note that the termios test only works if the system is
-  rebuilt with termios enabled.                         
-
-Posix tests:
-  All tests passed, except that:
-    - the message queue test failed with "errno (91 - File or path name too
-      long)"
-
-Timing tests:
-  Due to memory limitations, many of the tests will not run unless you set
-  OPERATION_COUNT=20 at configuration time.
-
-  To run tm27 (the interrupt latency timer test), short CN5-48 to CN5-50 on
-  the SS555 board.
-
-  All tests run cleanly, except for tm26, which gives a "PANIC 12" after it
-  exits.  This doesn't seem to cause a problem otherwise.
-
-  See the times file for the results of the timing tests.
-
-Network tests:  
-  Not applicable.
-
-Sample programs:
-  These run correctly, except that:
-    - The "minimum" sample is not designed to run properly on any system.
-    - The loopback, fileio, unilimited, and pppd tests fail due to memory
-      limitations.
-    - The paranoia program dies on a floating-point assist exception.
-
-Various non-BSP-dependent support routines.
-
-timer -		Support for the RTEMS timer tick, using the Programmable
-		Interval Timer (PIT).
-
-console-generic	- Console support via the on-chip dual SCI port in the QSMCM
-		module.
-
-exception -	Installation and deinstallation of exception handlers, by
-		manipulation of exception vector table.
-
-irq -		Exception handler for all external and decrementer interrupts. 
-		Generalized interrupt handler which calls specific handlers
-		via entries in the interrupt connection table.  Interrupt
-		connection table maintenance routines.  USIU and UIMB
-		interrupt masking and level control.
-
-timer -		Support for RTEMS timer tests, using the PowerPC timebase
-		(TB) registers.
-
-vectors -	Compressed MPC5XX exception vector table, exception handler
-		prologues, default exception handler.  Code to initialize
-		table with default handlers.
Index: c/src/lib/libbsp/powerpc/t32mppc/README
===================================================================
--- c/src/lib/libbsp/powerpc/t32mppc/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,5 +1,0 @@
-Board support package for the Lauterbach Trace32 PowerPC simulator.
-
-  http://www.lauterbach.com
-
-See also files "init.cmm" and "configsim.t32" in this directory.
Index: c/src/lib/libbsp/powerpc/t32mppc/configsim.t32
===================================================================
--- c/src/lib/libbsp/powerpc/t32mppc/configsim.t32	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,5 +1,0 @@
-PBI=SIM
-SCREEN=
-HEADER=Simulator
-FONT=DEC
-FONT=SMALL
Index: c/src/lib/libbsp/powerpc/t32mppc/init.cmm
===================================================================
--- c/src/lib/libbsp/powerpc/t32mppc/init.cmm	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,19 +1,0 @@
-; Set CPU
-system.cpu mpc8540
-system.up
-
-; Set PVR
-per.s spr:0x11f %long %be 0x80200000
-
-; Load application
-Data.LOAD.Elf /home/sh/build/t32mppc/powerpc-rtems4.11/c/t32mppc/testsuites/samples/ticker/ticker.exe
-
-; Configure memory-based terminal
-term.reset
-term.method buffere v.address("messagebufferout") v.address("messagebufferin") 
-term.gate
- 
-; Initialize RTOS support
-task.config ~~/demo/powerpc/kernel/rtems/rtems.t32
-menu.reprogram ~~/demo/powerpc/kernel/rtems/rtems.men
-task.stack.pattern 0xa5
Index: c/src/lib/libbsp/powerpc/tqm8xx/README
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,137 +1,0 @@
-This is a README file for the tqm8xx BSP
-
-
-Summary
--------
-
-BSP NAME:           tqm8xx
-BOARD:              various boards based on TQ Components TQM8xx modules
-BUS:                No backplane. 
-CPU FAMILY:         PowerPC
-CPU:                PowerPC MPC860 or MPC866
-COPROCESSORS:       Built-in Motorola QUICC
-MODE:               32 bit mode
-
-BOOT MONITOR:       TQMon 
-
-PERIPHERALS
-===========
-TIMERS:             PIT / Timebase
-  RESOLUTION:       1 microsecond / frequency = clock-speed / 16
-SERIAL PORTS:       1-4 SCCs, 1-2 SMC
-REAL-TIME CLOCK:    <none>
-DMA:                Each SCC and SMC.
-VIDEO:              <none>
-SCSI:               <none>
-NETWORKING:         Ethernet 10 Mbps on SCC1 and/or 
-                    10/100Mbps on FEC (for MPC866T)		    
-		   
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       yes
-CONSOLE DRIVER:     yes
-SHMSUPP:            N/A
-TIMER DRIVER:       yes
-NETWORK DRIVER:	    yes
-
-NOTES
-=====
-On-chip resources:
-	SCC1		network or serial port
-	SCC2		serial port
-	SCC3		serial port
-	SCC4		serial port
-	SMC1		serial port
-	SMC2		serial port
-	CLK1		network
-	CLK2		network
-	CLK3
-	CLK4
-	CLK5
-	CLK6
-	CLK7
-	CLK8
-	BRG1		console
-	BRG2		console
-	BRG3		console
-	BRG4		console
-	RTC
-	PIT		clock
-	TB
-	DEC
-	SWT	
-	UPMA
-	UPMB
-	IRQ0
-	IRQ1
-	IRQ2		
-	IRQ3		
-	IRQ4		
-	IRQ5	
-	IRQ6
-	IRQ7
-	IRQ_LVL0	
-	IRQ_LVL1
-	IRQ_LVL2
-	IRQ_LVL3
-	IRQ_LVL4
-	IRQ_LVL5
-	IRQ_LVL6
-	IRQ_LVL7
-	
-
-Board description
------------------
-Clock rate:     50MHz - 133MHz.
-Bus width:      32 bit Flash, 32 bit DRAM
-FLASH:	        2-8MB
-RAM:            32-256MB SDRAM
-
-
-Installation
-------------
-<tbd>
-
-
-Port Description
-Console driver
----------------
-
-This BSP contains a console driver for polled and interrupt-driven
-operation. It supports SCCs and SMCs.
-During BSP configuration, various variables can be set to activate a
-certain channels and to specify the console channel:
-
-CONS_SMC1_MODE, CONS_SMC2_MODE, CONS_SCC[1-4]_MODE can be set to
-CONS_MODE_UNUSED, CONS_MODE_POLLED or CONS_MODE_IRQ
-
-The driver always uses termios. 
-
-printk() and debug output
------------------------
-<tbd>
-
-Floating-point
---------------
-
-The MPC8xx do not have floating-point units. All code should
-get compiled with the appropriate -mcpu flag. The nof variants of the gcc
-runtime libraries should be used for linking.
-
-
-
-Miscellaneous
--------------
-
-All development was based on the mbx8xx and gen68360 port.
-
-Test Configuration
-------------------
-
-Board:                pghplus (
-CPU:                  Motorola MPC866T
-Clock Speed:          133MHz
-RAM:                  64MByte
-Cache Configuration:  Instruction cache on; data cache on, copyback mode.
-
Index: c/src/lib/libbsp/powerpc/virtex/README
===================================================================
--- c/src/lib/libbsp/powerpc/virtex/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,81 +1,0 @@
-# Adapted from vitex BSP
-
-BSP NAME:           Virtex
-BOARD:              Xilinx ML-403 and (hopefully) any vitex/PPC based board
-BUS:                N/A
-CPU FAMILY:         ppc
-CPU:                PowerPC 405GP
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:
-
-PERIPHERALS
-===========
-TIMERS:             405GP internal
-SERIAL PORTS:       Xilinx consolelite
-REAL-TIME CLOCK:    none
-DMA:                Xilinx vitex internal
-VIDEO:              none
-SCSI:               none
-NETWORKING:         Xilinx TEMAC
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC Decrementer
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       N/A
-TTY DRIVER:         consoleelite
-
-STDIO
-=====
-PORT:               Console port 0
-ELECTRICAL:         RS-232
-BAUD:               as defined in FPGA design
-BITS PER CHARACTER: 8
-PARITY:             None
-STOP BITS:          1
-
-Notes
-=====
-
-Board description
------------------
-clock rate:	234 MHz
-ROM:		16MByte FLASH
-RAM:		64MByte DRAM
-
-Virtex only supports single processor operations.
-
-Configuration
--------------
-
-This board support package is written for a typical virtex/PPC FPGA
-system. The rough features of such a board are described above.
-
-When a new virtex FPGA system is created (using the Xilinx design
-software), a parameter file "xparameters.h" is also created, which
-describes the basic features of the hardware (like peripherals
-included, interrupt routing etc.).
-
-This BSP normally takes its basic HW description for the file
-"xparameters_dflt.h", which describes my FPGA system. When this BSP
-should run on a different hardware, a path to the proper
-"xparameters.h" can be provided on the "configure" command line.
-
-For adapting this BSP to other boards, you can specify several configuration
-options at the configure command line (use "./configure --help" in this
-directory).  Here is an example for the top-level configure invocation:
-
-/path/to/rtems/sources/configure \
-  --target=powerpc-rtems4.11 \
-  --enable-rtemsbsp=virtex \
-  --enable-maintainer-mode \
-  --enable-posix \
-  --enable-tests \
-  --disable-networking \
-  'RTEMS_XPARAMETERS_H="/path/to/xparameters.h"' \
-  VIRTEX_RAM_ORIGIN=0xfffc0000 \
-  VIRTEX_RAM_LENGTH=0x3ffec \
-  VIRTEX_RESET_ORIGIN=0xffffffec
Index: c/src/lib/libbsp/powerpc/virtex4/README
===================================================================
--- c/src/lib/libbsp/powerpc/virtex4/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,86 +1,0 @@
-# Adapted from virtex BSP
-
-BSP NAME:           virtex4
-BOARD:              N/A
-BUS:                N/A
-CPU FAMILY:         ppc
-CPU:                PowerPC 405D5
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:
-
-PERIPHERALS
-===========
-TIMERS:             405 internal
-SERIAL PORTS:       none
-REAL-TIME CLOCK:    none
-DMA:                Xilinx virtex internal
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC Decrementer
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       N/A
-TTY DRIVER:         N/A
-
-STDIO
-=====
-PORT:               N/A
-ELECTRICAL:         N/A
-BAUD:               N/A
-BITS PER CHARACTER: N/A
-PARITY:             N/A
-STOP BITS:          N/A
-
-Notes
-=====
-
-Board description
------------------
-clock rate:	350 MHz
-ROM:		N/A
-RAM:		128MByte DRAM
-
-Virtex only supports single processor operations.
-
-Porting
--------
-This board support package is written for a naked Virtex 4/PPC FPGA
-system. The rough features of such a board are described above.
-The BSP itself makes no assumptions on what is loaded in the FPGA,
-other than that the CPU has access to some memory, either on-board
-or external, from which code can be run.
-
-This BSP has been constructed so that an application of both firmware
-and software can be layered on top of it by supplying implementations
-for the various 'weak' symbols.  These symbols are prefaced with the
-term 'app_'.  Applications can thus be built outside of the RTEMS
-directory tree by linking with the appropriate libraries.
-
-The linkcmds file describes the memory layout.  Included in this
-definition is a section of memory named MsgArea.  Output sent to
-stdout is recorded in this area and can be dumped using the JTAG
-interface, for example.
-
-For adapting this BSP to other boards, the following files should be
-modified:
-
-- c/src/lib/libbsp/powerpc/virtex4/startup/linkcmds
-	for the memory layout required
-
-- c/src/lib/libbsp/powerpc/virtex4/startup/bspstart.c
-	Here you can select the clock source for the timers and the
-        serial interface (system clock or external clock pin), the
-        clock rates, etc.
-
-- c/src/lib/libbsp/powerpc/virtex4/include/bsp.h
-	some BSP-related constants
-
-- c/src/lib/libbsp/powerpc/virtex4/*
-	well, they should be generic, so there _should_ be no reason
-	to mess around there (but who knows...)
Index: c/src/lib/libbsp/powerpc/virtex5/README
===================================================================
--- c/src/lib/libbsp/powerpc/virtex5/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,86 +1,0 @@
-# Adapted from virtex BSP
-
-BSP NAME:           virtex5
-BOARD:              N/A
-BUS:                N/A
-CPU FAMILY:         ppc
-CPU:                PowerPC 440x5
-COPROCESSORS:       N/A
-MODE:               32 bit mode
-
-DEBUG MONITOR:
-
-PERIPHERALS
-===========
-TIMERS:             440 internal
-SERIAL PORTS:       none
-REAL-TIME CLOCK:    none
-DMA:                Xilinx virtex internal
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       PPC Decrementer
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       N/A
-TTY DRIVER:         N/A
-
-STDIO
-=====
-PORT:               N/A
-ELECTRICAL:         N/A
-BAUD:               N/A
-BITS PER CHARACTER: N/A
-PARITY:             N/A
-STOP BITS:          N/A
-
-Notes
-=====
-
-Board description
------------------
-clock rate:	465 MHz
-ROM:		N/A
-RAM:		4GByte DRAM
-
-Virtex only supports single processor operations.
-
-Porting
--------
-This board support package is written for a naked Virtex 5/PPC FPGA
-system. The rough features of such a board are described above.
-The BSP itself makes no assumptions on what is loaded in the FPGA,
-other than that the CPU has access to some memory, either on-board
-or external, from which code can be run.
-
-This BSP has been constructed so that an application of both firmware
-and software can be layered on top of it by supplying implementations
-for the various 'weak' symbols.  These symbols are prefaced with the
-term 'app_'.  Applications can thus be built outside of the RTEMS
-directory tree by linking with the appropriate libraries.
-
-The linkcmds file describes the memory layout.  Included in this
-definition is a section of memory named MsgArea.  Output sent to
-stdout is recorded in this area and can be dumped using the JTAG
-interface, for example.
-
-For adapting this BSP to other boards, the following files should be
-modified:
-
-- c/src/lib/libbsp/powerpc/virtex5/startup/linkcmds
-	for the memory layout required
-
-- c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c
-	Here you can select the clock source for the timers and the
-        serial interface (system clock or external clock pin), the
-        clock rates, etc.
-
-- c/src/lib/libbsp/powerpc/virtex5/include/bsp.h
-	some BSP-related constants
-
-- c/src/lib/libbsp/powerpc/virtex5/*
-	well, they should be generic, so there _should_ be no reason
-	to mess around there (but who knows...)
Index: c/src/lib/libbsp/sh/gensh1/README
===================================================================
--- c/src/lib/libbsp/sh/gensh1/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,51 +1,0 @@
-#  Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
-#
-
-BSP NAME:           generic SH1 (gensh1)
-BOARD:              n/a
-BUS:                n/a
-CPU FAMILY:         Hitachi SH
-CPU:                SH 7032
-COPROCESSORS:	    none
-MODE:               n/a
-
-DEBUG MONITOR:      gdb
-
-PERIPHERALS
-===========
-TIMERS:             on-chip
-  RESOLUTION:         cf. Hitachi SH 703X Hardware Manual (Phi/4)
-SERIAL PORTS:       on-chip (with 2 ports)
-REAL-TIME CLOCK:    none
-DMA:                not used
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       on-chip timer
-IOSUPP DRIVER:      default
-SHMSUPP:            default
-TIMER DRIVER:       on-chip timer
-TTY DRIVER:         /dev/null (stub)
-
-STDIO
-=====
-PORT:               /dev/null (stub)
-ELECTRICAL:         n/a
-BAUD:               n/a
-BITS PER CHARACTER: n/a
-PARITY:             n/a
-STOP BITS:          n/a
-
-NOTES
-=====
-
-(1) The stub console driver (null) is enabled by default.
-
-(2) The driver for the on-chip serial devices (sci) is still in its infancy
-    and not fully tested. It may even be non-functional and therefore is
-    disabled by default. Please let us know any problems you encounter with
-    it.
-    To activate it edit libbsp/sh/gensh1/include/bsp.h
Index: c/src/lib/libbsp/sh/gensh2/README
===================================================================
--- c/src/lib/libbsp/sh/gensh2/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,57 +1,0 @@
-#  Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
-#  Adapted by: John Mills (jmills@tga.com)
-#  Corrections: Radzislaw Galler (rgaller@et.put.poznan.pl)
-
-
-BSP NAME:           generic SH2 (gensh2)
-BOARD:              EVB7045F (note 2)
-BUS:                n/a
-CPU FAMILY:         Hitachi SH
-CPU:                SH 7045F
-COPROCESSORS:	    none
-MODE:               n/a
-
-DEBUG MONITOR:      gdb
-
-PERIPHERALS
-===========
-TIMERS:             on-chip
-  RESOLUTION:         cf. Hitachi SH 704X Hardware Manual (Phi/16)
-SERIAL PORTS:       on-chip (with 2 ports)
-REAL-TIME CLOCK:    none
-DMA:                not used
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       on-chip timer
-IOSUPP DRIVER:      default
-SHMSUPP:            default
-TIMER DRIVER:       on-chip timer
-TTY DRIVER:         /dev/console
-
-STDIO
-=====
-PORT:               /dev/sci0
-ELECTRICAL:         SCI0
-BAUD:               9600
-BITS PER CHARACTER: 8
-PARITY:             NONE
-STOP BITS:          1
-
-NOTES
-=====
-
-(1) The present 'hw_init.c' file provides 'early_hw_init'(void) which
-    is normally called from 'start.S' to provide such minimal HW setup
-    as is conveniently written in 'C' and can make use of global
-    symbols for 7045F processor elements. It also provides
-    'void bsp_hw_init (void)' normally called from 'bspstart.c', shortly
-    before RTEMS itself is started.
-
-    These are both minimal functions intended to support the RTEMS test
-    suites.
-
-(2) See README.EVB7045F
Index: c/src/lib/libbsp/sh/gensh2/README.EVB7045F
===================================================================
--- c/src/lib/libbsp/sh/gensh2/README.EVB7045F	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,149 +1,0 @@
-#  Author: Radzislaw Galler (rgaller@et.put.poznan.pl)
-#
-
-
-Getting started with EVB7045F and gensh2
-========================================
-This is a capture of success path to put a RTEMS sample
-'hello.exe' on the evaluation board EVB7045F.
-
- What you need
----------------
-   * Computer with two operating systems: Linux and Wndows 2000 (tm) -
-     that was in my case (see section 'Variations')
-
-   * Flash Development Toolkit (FDT) - available on HMSE homepage
-     (http://www.hmse.com/products/fdt/support.htm)
-
-   * 'gdbstubs' - available on SourceForge
-     (http://sourceforge.net/projects/gdbstubs/) 
-
-   * working GNU C compiler for Hitach SH processors; do-it-yourself
-     (on Linux) or download ready stuff for Windows'9x/NT/2k from
-     (http://www.hitachi-eu.com/hel/ecg/) or from Hitach Databook 2001
-     CD-ROM (if no luck try to search on the net for gnu99r1p1.zip)
-     
-   * GDB compiled for target sh-rtems  - do-it-yourself or download
-     from ftp://ftp.oarcorp.com:21/pub/rtems/snapshots/c_tools/
-
-   * RTEMS (ofcourse) you probably already have if you are reading this
-     document
-
- Instalation of 'gdbstubs'
---------------------------
-  Once you downladed and unzipped gdbstubs you have to compile
-  it. First modify the Makefile to use the compiler installed on your
-  machine.  Then issue the command:
-
-  $ make 
-
-  This should produce the default target sh2-7045edk.out. This is the
-  S-record file which should be added to FDT project (renaming it to
-  *.mot extension helps a bit). 
-  If you are lucky you will be able to put the file into the FLASH
-  following the instuctions in FDT and EVB manuals. 
-  
-  Well I wasn't lucky so I had to bypass the Universal Programming
-  Board (see EVB7045F User Manual) and manually put the processor into
-  BOOT mode. This can be done by shortening the capacitor C8 (or C108
-  on schematics) which puts the UPB into permanent reset state, and by
-  removing jumper JP4 (or JP104 on schematics) and connecting its
-  middle pin to the ground. After pressing CRES button the processor
-  is in BOOT mode. In FDT select "direct connection":
-
-  Menu Project->Properties->Device->Select Interface
-
-  After that there should be no problem in putting the program into the
-  FLASH. 
-
- Loading 'hello.exe' on board
-------------------------------
-  I assume you are able to compile RTEMS with 'gensh2' BSP and
-  necessary tools. If not please refer to 'started.pdf' document which
-  describes the procedure (http://www.oarcorp.com/).
-
-  At the time of writing this document 'gdbstubs' default
-  communication port was SCI1. So it was the default port for
-  /dev/console in RTEMS. To avoid problems I had check these settings
-  both in 'gdbstubs' and $RTEMS_ROOT/c/src/lib/libbsp/sh/gensh2/include/bsp.h
-
-  After changing the line 
-
-  #define BSP_CONSOLE_DEVNAME "/dev/sci1"
-
-  to
-
-  #define BSP_CONSOLE_DEVNAME "/dev/sci0"
-
-  in 'bsp.h' and rebuilding RTEMS there should no problem in running
-  'hello.exe' and other samples. 
-
-  For downloading connect a serial cable to computer and EVB. You will
-  also need a second cable and second serial port to see the effects
-  of your work.
-
-  Assuming you are working in Linux and Xwindows fire up two terminal
-  windows. In the first one run sh-rtems-gdb, in the second run a
-  serial port terminal (for example 'minicom'). Set up the serial
-  terminal to a port connected to SCI0 and leave the window in a
-  visible place on the desktop. The debugger should be invoked best
-  from the directory where 'hello.exe' is placed. Assuming that here
-  is a GDB session:
-
-  --------start------
-  $ sh-rtems-gdb hello.exe 
-  GNU gdb 5.0
-  Copyright 2000 Free Software Foundation, Inc.
-  GDB is free software, covered by the GNU General Public License, and you are
-  welcome to change it and/or distribute copies of it under certain conditions.
-  Type "show copying" to see the conditions.
-  There is absolutely no warranty for GDB.  Type "show warranty" for details.
-  This GDB was configured as "--host=i686-pc-linux-gnu --target=sh-rtems"...
-  (gdb) set remotebaud 115200
-  (gdb) target remote /dev/ttyS0
-  Remote debugging using /dev/ttyS0
-  0x0 in ?? ()
-  (gdb) load 
-  Loading section .text, size 0x12d70 lma 0x444000
-  Loading section .data, size 0xb80 lma 0x456df0
-  Loading section .stack, size 0x10 lma 0xfffffec0
-  Start address 0x444000 , load size 80128
-  Transfer rate: 58274 bits/sec, 153 bytes/write.
-  (gdb) continue 
-  Continuing.
-
-  Program received signal 0, Signal 0.
-  0x44ec36 in exit (code=0) at exit.c:70
-  70	exit.c: No such file or directory.
-  (gdb) 
-  --------end-------
-  
-  And here is a capture from the serial terminal window:
-
-*** HELLO WORLD TEST ***
-Hello World
-*** END OF HELLO WORLD TEST ***
-
-  Beautiful, isn't it? That's all!
-  
-
-
- Variations
-------------
-  I'm sure that not every one can afford having two operating systems
-  on one computer. I believe there will be a day that nobody will need
-  an MS stuff anymore... ;)
-
-  It is possible to repeat the success on MS Windows only. To do the
-  same on Linux only you need a tool to downlad 'gdbstubs' on the
-  board. This should be no problem to find it on the net but right now
-  I don't know about it.
-
-  For your convenience there are several graphical interfaces for GDB
-  available on the net. I just name two of them:
-
-  DDD - stands for Data Display Debugger
-        (http://www.gnu.org/software/ddd/)
-
-  Insight - a Tcl/Tk interface available both for MS Windows and
-            Xwindows (http://sources.redhat.com/insight/)
Index: c/src/lib/libbsp/sh/gensh4/README
===================================================================
--- c/src/lib/libbsp/sh/gensh4/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,91 +1,0 @@
-#  Author: Alexandra Kossovsky <sasha@oktet.ru>
-#          Victor Vengerov     <vvv@oktet.ru>
-#   OKTET Ltd, http://www.oktet.ru
-#
-
-BSP NAME:           generic SH4 (gensh4)
-BOARD:              n/a
-BUS:                n/a
-CPU FAMILY:         Hitachi SH
-CPU:                SH 7750
-COPROCESSORS:	    none
-MODE:               n/a
-
-DEBUG MONITOR:      gdb (sh-ipl-g+ loader/stub)
-
-PERIPHERALS
-===========
-TIMERS:             on-chip
-SERIAL PORTS:       on-chip (with 2 ports)
-REAL-TIME CLOCK:    none
-DMA:                not used
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       on-chip timer
-IOSUPP DRIVER:      default
-SHMSUPP:            n/a
-TIMER DRIVER:       on-chip timer
-TTY DRIVER:         /dev/console
-
-STDIO
-=====
-PORT:               /dev/console
-ELECTRICAL:         n/a
-BAUD:               n/a
-BITS PER CHARACTER: n/a
-PARITY:             n/a
-STOP BITS:          n/a
-
-NOTES
-=====
-
-(1) Driver for the on-chip serial devices is tested only with 1st serial
-    port. We cannot test it on serial port with FIFO.
-
-    Console driver has 4 modes -- 2 with termios (interrupt-driven & 
-    poll-driven modes), one raw mode working with serial port directly,
-    without termios, and one mode working with gdb stub (using 'trapa'
-    handled by sh-ipl-g+).
-
-(2) The present 'hw_init.c' file provides 'early_hw_init'(void) which
-    is normally called from 'start.S' to provide such minimal HW setup.
-    It is written in C, but it should be noted that any accesses to memory
-    (except hardware registers) are prohibited until hardware not
-    initialized. To avoid access to stack, hw_init.c should be compiled with
-    -fomit-frame-pointer.
-
-    hw_init.c also provides 'bsp_cache_on'(void) normally called from
-    'start.S' after copying all data from rom to ram.
-
-(3) In 'configure.ac' you should properly set 'CPU_CLOCK_RATE_HZ'.
-    It is frequency fed to the CPU core (external clock frequency can be
-    multiplied by on-chip PLLs). Please note that it is not a frequency of
-    external oscillator! See Hardware Manual, section 10, for details.
-    Global variable 'SH4_CPU_HZ_Frequency' is declared in 'bsp.h' and 
-    initilized in 'bspstart.c' to ${HZ}. It is used by sci driver, 
-    which exists in 'libcpu/sh/sh7750'. 
-
-(4) There is SH4_WITH_IPL macro in console driver 'sh4_uart.h'. 
-    When it is defined, the application works under 
-    gdb-stub (it is able to turn cache on by 'trapa', use gdb mode in console
-    driver and get out from gdb to use other console modes).
-
-(5) There are 3 likcmds: 
-    - linkcmds: code and data loaded to RAM. No code/data moving required.
-    - linkcmds.rom: code executed from the ROM; .data section moved to the
-    RAM on initialization.
-    - linkcmds.rom2ram: execution started from the ROM (after reset); code
-    and data moved to the RAM and execution continued from RAM.
-
-    The same 'start.S' is used for all cases.
-
-(6) You can get gdb stub from http://www.oktet.ru/download/sh4/sh-ipl.tar.gz.
-    It is based on 'sh-ipl-g+' package used in sh-linux project.
-
-(7) This project was done in cooperation with Transas company
-    http://www.transas.com
-
Index: c/src/lib/libbsp/sh/shsim/README
===================================================================
--- c/src/lib/libbsp/sh/shsim/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,42 +1,0 @@
-Simple BSP for the SH simulator built into gdb.
-
-Simulator Invocation
-====================
-sh-rtems[elf|]-gdb <executable>
-(gdb) target sim
-(gdb) set archi [sh|sh2]
-(gdb) load <executable>
-(gdb) run
-
-Status
-======
-
-* The simulator invocation procedure outlined above produces error messages
-with gdb-5.0, nevertheless seems to work. With gdb versions > 5.0 these
-error messages are gone. I.e. if you plan to seriously work with the gdb
-simulator better use gdb versions > 5.0.
-
-* gdb's simulator is not able to correctly emulate memory areas esp. shadowing
-and non-consecutive memory. I.e. access to memory areas besides area 0 will 
-(bogusly) generate SIGBUS exceptions.  This includes access to area 5 
-(On-chip peripherials) and prevents simulation of configuration and access
-to on-chip peripherials.
-
-* Due to limitations of the simulator you will only be able to run
-applications which do not try to access any SH control registers.
-
-Currently, this excludes all applications, which apply timers and serial 
-devices, i.e. almost any real world application.
-
-* This BSP supports 3 different console devices (cf. configure --help):
-- trap34, an interface base on gdb's trap34 emulation. Known to work with
-  gdb-5.0.
-- gdbsci1, a stripped down sci device driver adapted to apply gdb's sci1
-emulation. This is known to fail with gdb-5.0, because of a bug in gdb-5.0's 
-sh-sim, a patch is submitted, but .. ~==
-- devnull, redirection of console io to /dev/null. Try to single step this,
-if you want to understand the details on how SH-RTEMS console redirection
-works.
-
-NOTE: the trap34 interface is incomplete and is temporarily disabled
-inside of configure.in.
Index: c/src/lib/libbsp/sparc/erc32/README
===================================================================
--- c/src/lib/libbsp/sparc/erc32/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,78 +1,0 @@
-#
-#  Description of SIS as related to this BSP
-#
-
-BSP NAME:           sis
-BOARD:              any based on the European Space Agency's ERC32
-BUS:                N/A
-CPU FAMILY:         sparc
-CPU:                ERC32 (SPARC V7 + on-CPU peripherals)
-                    based on Cypress 601/602
-COPROCESSORS:       on-chip 602 compatible FPU
-MODE:               32 bit mode
-
-DEBUG MONITOR:      none
-
-PERIPHERALS
-===========
-TIMERS:
-  NAME:             General Purpose Timer  
-  RESOLUTION:         50 nanoseconds - 12.8 microseconds
-  NAME:             Real Time Clock Timer  
-  RESOLUTION:         50 nanoseconds - 3.2768 milliseconds
-  NAME:             Watchdog Timer  
-  RESOLUTION:         XXX
-SERIAL PORTS:       2 using on-chip UART
-REAL-TIME CLOCK:    none
-DMA:                on-chip
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       ERC32 internal Real Time Clock Timer
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       ERC32 internal General Purpose Timer
-CONSOLE DRIVER:     ERC32 internal UART 
-
-STDIO
-=====
-PORT:               Channel A
-ELECTRICAL:         na since using simulator
-BAUD:               na
-BITS PER CHARACTER: na
-PARITY:             na
-STOP BITS:          na
-
-Notes
-=====
-
-ERC32 BSP only supports single processor operations.
-
-A nice feature of this BSP is that the RAM and PROM size are set in the 
-linkcmds file and the startup code programs the Memory Configuration
-Register based on those sizes.
-
-The Watchdog Timer is disabled.
-
-This code was developed and tested entirely using the SPARC Instruction 
-Simulator (SIS) for the ERC32.  All tests were known to run correctly
-against sis v1.7.
-
-
-Memory Map
-==========
-
-0x00000000 - 0x00000000 + _PROM_SIZE      code and initialized data
-0x01f80000                                on chip peripherals
-0x00000000 - 0x02000000 + _RAM_SIZE       destination for initialized data
-                                          BSS (i.e. unitialized data)
-                                          C Heap (i.e. malloc area)
-                                          RTEMS Workspace
-
-The C heap is assigned all memory between the end of the BSS and the 
-RTEMS Workspace.  The size of the RTEMS Workspace is based on that 
-specified in the application's configuration table.
-  
Index: c/src/lib/libbsp/sparc/leon2/README
===================================================================
--- c/src/lib/libbsp/sparc/leon2/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,78 +1,0 @@
-#
-#  Description of SIS as related to this BSP
-#
-
-BSP NAME:           sis
-BOARD:              any based on the European Space Agency's ERC32
-BUS:                N/A
-CPU FAMILY:         sparc
-CPU:                ERC32 (SPARC V7 + on-CPU peripherals)
-                    based on Cypress 601/602
-COPROCESSORS:       on-chip 602 compatible FPU
-MODE:               32 bit mode
-
-DEBUG MONITOR:      none
-
-PERIPHERALS
-===========
-TIMERS:
-  NAME:             General Purpose Timer  
-  RESOLUTION:         50 nanoseconds - 12.8 microseconds
-  NAME:             Real Time Clock Timer  
-  RESOLUTION:         50 nanoseconds - 3.2768 milliseconds
-  NAME:             Watchdog Timer  
-  RESOLUTION:         XXX
-SERIAL PORTS:       2 using on-chip UART
-REAL-TIME CLOCK:    none
-DMA:                on-chip
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       ERC32 internal Real Time Clock Timer
-IOSUPP DRIVER:      N/A
-SHMSUPP:            N/A
-TIMER DRIVER:       ERC32 internal General Purpose Timer
-CONSOLE DRIVER:     ERC32 internal UART 
-
-STDIO
-=====
-PORT:               Channel A
-ELECTRICAL:         na since using simulator
-BAUD:               na
-BITS PER CHARACTER: na
-PARITY:             na
-STOP BITS:          na
-
-Notes
-=====
-
-ERC32 BSP only supports single processor operations.
-
-A nice feature of this BSP is that the RAM and PROM size are set in the 
-linkcmds file and the startup code programs the Memory Configuration
-Register based on those sizes.
-
-The Watchdog Timer is disabled.
-
-This code was developed and tested entirely using the SPARC Instruction 
-Simulator (SIS) for the ERC32.  All tests were known to run correctly
-against sis v1.7.
-
-
-Memory Map
-==========
-
-0x00000000 - 0x00000000 + _PROM_SIZE      code and initialized data
-0x01f80000                                on chip peripherals
-0x00000000 - 0x02000000 + _RAM_SIZE       destination for initialized data
-                                          BSS (i.e. unitialized data)
-                                          C Heap (i.e. malloc area)
-                                          RTEMS Workspace
-
-The C heap is assigned all memory between the end of the BSS and the 
-RTEMS Workspace.  The size of the RTEMS Workspace is based on that 
-specified in the application's configuration table.
-  
Index: c/src/lib/libbsp/sparc/leon3/README
===================================================================
--- c/src/lib/libbsp/sparc/leon3/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,35 +1,0 @@
-#
-#  LEON3 BSP README
-#
-#
-#
-
-BSP NAME:           leon3
-BUS:                AMBA Plug & Play 
-CPU FAMILY:         sparc
-CPU:                LEON3
-                    
-
-DRIVERS
-=======
-Timer Driver, Console Driver, Opencores Ethernet Driver
-
-Notes
-=====
-
-This BSP supports single LEON3-processor system with minimum peripheral
-configuration of one UART. BSP reads system configuration area to get
-information such as memory mapping and usage of interrupt resources and
-installs device drivers based on this information.
-
-There are no restrictions on memory mapping of UARTS. Console driver
-operates in polled mode.
-
-Console driver uses timer 0 of General Purpose Timer and must be configured
-to use separate interrupts for each timer. No restrictions on memory mapping.
-Interrupt request signal can not be shared with other devices.  
-
-Ethernet MAC core can be mapped in arbitrary memory address space and use
-arbitrary interrupt request signal. Interrupt request signal can not be
-shared with other devices.
-
Index: c/src/lib/libbsp/sparc64/niagara/README
===================================================================
--- c/src/lib/libbsp/sparc64/niagara/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,65 +1,0 @@
-BSP NAME:           niagara
-BOARD:              
-BUS:                n/a
-CPU FAMILY:         SPARC V9 with UltraSPARC Architecture 2005 (a.k.a. sun4v)
-CPU:                UltraSPARC T1 (OpenSPARC T1)
-COPROCESSORS:       
-MODE:               n/a
-
-DEBUG MONITOR:      
-
-PERIPHERALS
-===========
-TIMERS:             TICK and STICK registers (ASRs 4 and 24)
-  RESOLUTION:         CPU clock resolution
-SERIAL PORTS:       
-REAL-TIME CLOCK:    
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       
-IOSUPP DRIVER:      
-SHMSUPP:            
-TIMER DRIVER:       
-TTY DRIVER:         
-
-STDIO
-=====
-PORT:               
-ELECTRICAL:         
-BAUD:               
-BITS PER CHARACTER: 
-PARITY:             
-STOP BITS:          
-
-NOTES
-=====
-
-Board description
------------------
-clock rate:     
-bus width:      
-ROM:            
-RAM:            
-
-This BSP is designed to operate on the UltraSPARC T1 (Niagara) SPARC64 
-and similar processors.
-
-This BSP has been run on the Simics simulator with the niagara target, which 
-simulates the OpenSPARC T1 Niagara implementation.
-
-This BSP has been run on the M5 simulator with the SPARC_FS target, which
-simulates the OpenSPARC T1 Niagara implementation.
-
-Simics:
-A commercially available simulator licensed by Virtutech.
-https://www.simics.net/
-
-M5:
-An open-source simulator.
-http://www.m5sim.org/wiki/index.php/Main_Page
-
Index: c/src/lib/libbsp/sparc64/usiii/README
===================================================================
--- c/src/lib/libbsp/sparc64/usiii/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,57 +1,0 @@
-BSP NAME:           usiii
-BOARD:              
-BUS:                n/a
-CPU FAMILY:         SPARC V9 (a.k.a. sun4u)
-CPU:                UltraSPARC III
-COPROCESSORS:       
-MODE:               n/a
-
-DEBUG MONITOR:      
-
-PERIPHERALS
-===========
-TIMERS:             TICK register (ASR 4)
-  RESOLUTION:         CPU clock resolution
-SERIAL PORTS:       
-REAL-TIME CLOCK:    
-DMA:                none
-VIDEO:              none
-SCSI:               none
-NETWORKING:         none
-
-DRIVER INFORMATION
-==================
-CLOCK DRIVER:       
-IOSUPP DRIVER:      
-SHMSUPP:            
-TIMER DRIVER:       
-TTY DRIVER:         
-
-STDIO
-=====
-PORT:               
-ELECTRICAL:         
-BAUD:               
-BITS PER CHARACTER: 
-PARITY:             
-STOP BITS:          
-
-NOTES
-=====
-
-Board description
------------------
-clock rate:     
-bus width:      
-ROM:            
-RAM:            
-
-This BSP is designed to operate on the UltraSPARC III SPARC64 
-and similar processors.
-
-This BSP has been run on the Simics simulator with the serengeti target.
-
-Simics:
-A commercially available simulator licensed by Virtutech.
-https://www.simics.net/
-
Index: c/src/lib/libbsp/v850/gdbv850sim/README
===================================================================
--- c/src/lib/libbsp/v850/gdbv850sim/README	(revision 8eb264d34782f143e567f44737cd9879cb854410)
+++ 	(revision )
@@ -1,7 +1,0 @@
-This directory contains a family of BSPs for the v850 simulator
-found in the GNU Debugger. A variant is provided for each CPU
-model option flag found in the GCC SVN head as of 30 May 2012.
-
-This simulator is an instruction simulator and does not include
-devices for a clock tick or benchmark timer driver. Traps are used
-to provide console I/O.
