Changeset eac9871 in rtems
- Timestamp:
- 04/27/98 15:30:59 (25 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- b0aba4c4
- Parents:
- 0153d180
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/exec/score/cpu/m68k/cpu_asm.s
r0153d180 reac9871 113 113 * execute twice if a higher priority interrupt is 114 114 * acknowledged before _Thread_Dispatch_disable is 115 * incre amented and the higher priority interrupt116 * p reforms a context switch after executing. The lower117 * priority int terrupt will execute (1) at the end of the115 * incremented and the higher priority interrupt 116 * performs a context switch after executing. The lower 117 * priority interrupt will execute (1) at the end of the 118 118 * higher priority interrupt in the new context if 119 119 * permitted by the new interrupt level mask, and (2) when
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