Changeset eac9871 in rtems

Timestamp:

04/27/98 15:30:59 (25 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

b0aba4c4

Parents:

0153d180

Message:

Fixed spelling errors.

File:

• c/src/exec/score/cpu/m68k/cpu_asm.s (modified) (1 diff)

c/src/exec/score/cpu/m68k/cpu_asm.s

@@ -113 +113 @@
  *  execute twice if a higher priority interrupt is
  *  acknowledged before _Thread_Dispatch_disable is
- *  increamented and the higher priority interrupt
- *  preforms a context switch after executing. The lower
- *  priority intterrupt will execute (1) at the end of the
+ *  incremented and the higher priority interrupt
+ *  performs a context switch after executing. The lower
+ *  priority interrupt will execute (1) at the end of the
  *  higher priority interrupt in the new context if
  *  permitted by the new interrupt level mask, and (2) when