Changeset e9d98071 in rtems


Ignore:
Timestamp:
May 22, 2014, 6:21:38 AM (5 years ago)
Author:
Chris Johns <chrisj@…>
Branches:
4.11, master
Children:
3cbedb1
Parents:
18bd35bc
git-author:
Chris Johns <chrisj@…> (05/22/14 06:21:38)
git-committer:
Chris Johns <chrisj@…> (05/22/14 06:53:25)
Message:

bsp/zynq: Add BSP_ZYNQ_RAM_LENGTH to allow a user to override the RAM length.

The Zynq BSPs can be used with varations of hardware such as memory size.
This option lets you set a length.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/xilinx-zynq/configure.ac

    r18bd35bc re9d98071  
    5656# Zynq Memory map can be controlled from the configure command line. Use ...
    5757#
    58 #   ..../configure --target=arm-rtems4.11 ... ZYNQ_RAM_LENGTH=256M
     58#   ..../configure --target=arm-rtems4.11 ... BSP_ZYNQ_RAM_LENGTH=256M
    5959#
     60RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_a9_qemu],[256M])
     61RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_zc702],[1024M])
     62RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_zc706],[1024M])
     63RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_zedboard],[512M])
     64RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[*],[256M])
     65RTEMS_BSPOPTS_HELP([BSP_ZYNQ_RAM_LENGTH],[override a BSP's default RAM length])
     66
    6067AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu],
    6168      [ZYNQ_RAM_ORIGIN="0x00000000"
    62        ZYNQ_RAM_LENGTH="256M"
    6369       ZYNQ_RAM_MMU="0x0fffc000"
    6470       ZYNQ_RAM_MMU_LENGTH="16k"
    6571       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN}"
    66        ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 16k"
     72       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 16k"
    6773       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
    6874       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     
    7278AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc702],
    7379      [ZYNQ_RAM_ORIGIN="0x00100000"
    74        ZYNQ_RAM_LENGTH="1024M"
    7580       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
    7681       ZYNQ_RAM_MMU_LENGTH="16k"
    7782       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
    78        ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 1M - 16k"
     83       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"
    7984       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
    8085       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     
    8489AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc706],
    8590      [ZYNQ_RAM_ORIGIN="0x00400000"
    86        ZYNQ_RAM_LENGTH="1024M"
    8791       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
    8892       ZYNQ_RAM_MMU_LENGTH="16k"
    8993       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
    90        ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 4M - 16k"
     94       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 4M - 16k"
    9195       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
    9296       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     
    96100AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zedboard],
    97101      [ZYNQ_RAM_ORIGIN="0x00100000"
    98        ZYNQ_RAM_LENGTH="512M"
    99102       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
    100103       ZYNQ_RAM_MMU_LENGTH="16k"
    101104       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
    102        ZYNQ_RAM_LENGTH_AVAILABLE="${ZYNQ_RAM_LENGTH} - 1M - 16k"
     105       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"
    103106       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
    104107       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
     
    113116ZYNQ_LINKCMD([ZYNQ_CPUS],[Number of active cores],[${ZYNQ_CPUS}])
    114117ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN],[normal RAM region origin],[${ZYNQ_RAM_ORIGIN}])
    115 ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH],[normal RAM region length],[${ZYNQ_RAM_LENGTH}])
     118ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQ_RAM_LENGTH}])
    116119ZYNQ_LINKCMD([ZYNQ_RAM_MMU],[MMU region origin],[${ZYNQ_RAM_MMU}])
    117120ZYNQ_LINKCMD([ZYNQ_RAM_MMU_LENGTH],[MMU region length],[${ZYNQ_RAM_MMU_LENGTH}])
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